CN112131065A

CN112131065A - Method, device and system for verifying DAC (digital-to-analog converter) interface

Info

Publication number: CN112131065A
Application number: CN202011211058.2A
Authority: CN
Inventors: 陈定昌; 王炳全; 陈恒; 谭卢海; 易冬柏; 马颖江
Original assignee: Gree Electric Appliances Inc of Zhuhai; Zhuhai Zero Boundary Integrated Circuit Co Ltd
Current assignee: Gree Electric Appliances Inc of Zhuhai; Zhuhai Zero Boundary Integrated Circuit Co Ltd
Priority date: 2020-11-03
Filing date: 2020-11-03
Publication date: 2020-12-25

Abstract

The application discloses a method, a device and a system for verifying a DAC interface. Wherein, the method comprises the following steps: inputting a test signal to a DAC interface of a chip to be tested; and acquiring a test result for testing the chip to be tested. The method and the device solve the technical problem of low testing efficiency in the related art.

Description

Method, device and system for verifying DAC (digital-to-analog converter) interface

Technical Field

The application relates to the field of testing, in particular to a method, a device and a system for verifying a DAC interface.

Background

After the chip sample flow is back, the relevant functions of the chip, especially the digital-to-analog converter (DAC) function of the chip, need to be verified in the laboratory stage. Digital-to-analog converters (DACs) have a wide range of applications, and as a bridge for the communication between the digital domain and the analog domain, DACs have important applications in many important situations. When DAC verification is carried out in the traditional laboratory stage, excitation is manually injected from each channel, therefore, when the number of channels is large, all the channels need to be traversed for the accuracy of test results, for example, 12 channels need to be traversed, and the total traversal needs to be sequentially traversed from 12 0 channels to 12 1 channels, so that the work is heavy, but the repeated operation is high, the work is tedious, and errors are easy to occur.

In view of the above problems, no effective solution has been proposed.

Disclosure of Invention

The embodiment of the application provides a method, a device and a system for verifying a DAC interface, so as to at least solve the technical problem of low test efficiency in the related art.

According to an aspect of an embodiment of the present application, there is provided a verification system for a DAC interface, including: a chip to be tested, the chip to be tested having a digital-to-analog conversion DAC interface; the computer is used for sending a test signal to the chip to be tested and acquiring a test result; and the adapter is in communication connection with the computer and is used for transmitting the test signal to the DAC interface of the chip to be tested.

Optionally, the system further comprises: and the IC test board is used for communicating the DAC interface of the chip to be tested with the adapter.

Optionally, the adapter is communicatively connected to the computer through a USB interface.

Optionally, the adapter is in communication connection with the IC test board through a USB interface.

Optionally, the system further comprises: and the program-controlled instrument is in communication connection with the IC test board and the computer and is used for acquiring the test result and feeding the test result back to the computer.

Optionally, the computer interactive interface includes: an interaction area for the user to select the equipment and configure the test parameters; an interaction zone for selecting a programmed instrument connected to a computer; an interaction region for configuring a data width of the signal; an interactive area for setting the number of data bits of the output analog signal; an interaction area for setting a type of a signal to be measured; the interaction zone for controlling the initiation of the test.

According to an aspect of the embodiments of the present application, there is also provided a method for verifying a DAC interface, including: inputting a test signal to a DAC interface of a chip to be tested; and acquiring a test result for testing the chip to be tested.

According to another aspect of the embodiments of the present application, there is also provided a device for verifying a DAC interface, including: the input unit is used for inputting a test signal to a DAC interface of the chip to be tested; and the acquisition unit is used for acquiring a test result of testing the chip to be tested.

According to another aspect of the embodiments of the present application, there is also provided a storage medium including a stored program which, when executed, performs the above-described method.

According to another aspect of the embodiments of the present application, there is also provided an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, wherein the processor executes the above method through the computer program.

In the embodiment of the application, the automatic verification of the DAC function verification can be carried out on the chip sample wafer in the laboratory stage, the automatic injection of the verification excitation is realized, the automatic reading and storage of the DAC conversion result are realized, the corresponding data table is automatically generated, and the technical problem of low testing efficiency in the related technology can be solved.

Drawings

The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:

fig. 1 is a flow chart of an alternative method for verifying a DAC interface according to an embodiment of the present application;

FIG. 2 is a schematic diagram of an alternate DAC interface verification system according to embodiments of the present application;

FIG. 3 is a schematic diagram of a verification interface of an alternative DAC interface according to an embodiment of the present application;

FIG. 4 is a schematic diagram of an alternative verification scheme for a DAC interface according to embodiments of the present application;

FIG. 5 is a schematic diagram of an alternative DAC interface verification apparatus according to an embodiment of the present application;

and

fig. 6 is a block diagram of a terminal according to an embodiment of the present application.

Detailed Description

In order to make the technical solutions better understood by those skilled in the art, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only partial embodiments of the present application, but not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.

In view of the fact that all channels need to be traversed completely to test the accuracy of results, the work is heavy and the repeated operation is high, the work is tedious and error-prone, and therefore, it is very necessary to develop a set of automatic method for chip DAC verification in a laboratory sample stage. In addition, the workload is greatly reduced, the verification time is shortened, and the accuracy of the result is greatly improved.

Fig. 1 is a flowchart of an optional method for verifying a DAC interface according to an embodiment of the present application, and as shown in fig. 1, the method may include the following steps:

and step S1, inputting a test signal to the DAC interface of the chip to be tested.

And step S2, obtaining a test result for testing the chip to be tested.

The method can be realized based on the verification system of the DAC interface. The system comprises: a chip to be tested, the chip to be tested having a digital-to-analog conversion DAC interface; the computer is used for sending a test signal to the chip to be tested and acquiring a test result; and the adapter is in communication connection with the computer and is used for transmitting the test signal to the DAC interface of the chip to be tested.

Through the steps, the automatic verification of the DAC function verification can be carried out on the chip sample wafer in the laboratory stage, the automatic injection of the verification excitation is realized, the automatic reading and storage of the DAC conversion result are realized, the corresponding data table is automatically generated, and the technical problem of low testing efficiency in the related technology can be solved.

As an alternative example, as shown in fig. 2 (a structure diagram of a DAC automated verification system), fig. 3 (a software interface of a DAC automated verification system), and fig. 4 (an execution flow of a DAC automated verification system), the following further details the technical solution of the present application in conjunction with specific embodiments.

The key point of the scheme is to coordinate the test board, the chip, the adapter and the programmable universal meter to work together.

In the scheme, a virtual instrument specially aiming at the chip DAC function verification is constructed based on a LabView communication adapter, a chip to be tested and a programmable multimeter, so that the automatic generation and input of an excitation signal and the automatic acquisition and storage of a DAC conversion result in the DAC verification are completed, and the automation of the chip DAC function verification is realized. The system architecture is shown in fig. 2.

The structure of the DAC automated verification system is divided and described as follows (as shown in fig. 2):

a PC terminal: installing LabVIEW software of National Instruments and installing corresponding VISA serial port plug-in; an adapter: using an SPI type adapter of GinkGo, wherein 16 GPIOs can be used, and each GPIO is controlled by a program to send an excitation signal to a chip to be tested; and (3) program-controlled instrument: the program control instrument used in the scheme can be an 34465A type programmable universal meter of KeySIGHT, and real-time capture and data feedback of test results are realized by using the program control instrument; an IC test board: no special requirement is needed, and the related signal pin of the chip is led out to the pin of the pad.

In fig. 2, the devices except the adapter and the IC test board are connected by USB interfaces to implement command transmission and data signal transmission, and the GPIOs of the adapter are connected to the corresponding DAC channels on the IC test board by dupont lines.

DAC automated verification system software operating interface specification (as shown in fig. 3):

the user setting area mainly comprises test equipment selection and test parameter configuration: VASA resource name, selecting a program-controlled instrument connected to the machine; I/O port number, data width of input digital quantity; data precision, setting the data bit number of the output analog quantity; manual Range, setting the type to be measured, voltage, current, etc.; a start and stop button for controlling the start and stop of the test; and a result display area which mainly displays input data and a result converted by the DAC.

The working principle and the flow of the DAC automatic verification system (as shown in FIG. 4) are as follows:

equipment initialization: initializing hardware equipment of an adapter and a program-controlled multimeter;

excitation signal input: the method mainly comprises the steps that each IO of a main control adapter outputs data to a corresponding DAC channel (high and low levels) as required, the number of the channels is N, a variable i is set, the variable i is 0 initially, the variable i is increased by 1 (i.e. i + +) each time, whether i is smaller than N is judged during testing, if not, the variable i is finished, the adapter is controlled to generate an excitation signal and transmit the excitation signal to the corresponding channel of the DAC, a programmable multimeter reads a conversion result, and the excitation signal and the conversion result are stored in a table;

data measurement acquisition and storage: the method mainly comprises the steps of controlling the program-controlled multimeter to measure the DAC conversion result, printing and displaying data and storing the data in an excel table.

And finally, the automation of the chip DAC function verification is realized.

It should be noted that, for simplicity of description, the above-mentioned method embodiments are described as a series of acts or combination of acts, but those skilled in the art will recognize that the present application is not limited by the order of acts described, as some steps may occur in other orders or concurrently depending on the application. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required in this application.

Through the above description of the embodiments, those skilled in the art can clearly understand that the method according to the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but the former is a better implementation mode in many cases. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, or a network device) to execute the method according to the embodiments of the present application.

According to another aspect of the embodiments of the present application, there is also provided a DAC interface verification apparatus for implementing the DAC interface verification method described above. Fig. 5 is a schematic diagram of an alternative DAC interface verification apparatus according to an embodiment of the present application, and as shown in fig. 5, the apparatus may include:

an input unit 51, configured to input a test signal to a DAC interface of a chip to be tested; the obtaining unit 53 is configured to obtain a test result of testing the chip to be tested.

It should be noted that the input unit 51 in this embodiment may be configured to execute step S1 in this embodiment, and the obtaining unit 53 in this embodiment may be configured to execute step S2 in this embodiment.

By the aid of the module, automatic verification of DAC function verification can be performed on a chip sample wafer in a laboratory stage, automatic injection of verification excitation is achieved, automatic reading and storage of DAC conversion results are achieved, a corresponding data table is automatically generated, and the technical problem of low testing efficiency in the related technology can be solved.

It should be noted here that the modules described above are the same as the examples and application scenarios implemented by the corresponding steps, but are not limited to the disclosure of the above embodiments. It should be noted that the modules as a part of the apparatus may run in a corresponding hardware environment, and may be implemented by software, or may be implemented by hardware, where the hardware environment includes a network environment.

According to another aspect of the embodiment of the present application, there is also provided a server or a terminal for implementing the verification method of the DAC interface.

Fig. 6 is a block diagram of a terminal according to an embodiment of the present application, and as shown in fig. 6, the terminal may include: one or more processors 201 (only one shown), memory 203, and transmission means 205, as shown in fig. 6, the terminal may further comprise an input-output device 207.

The memory 203 may be configured to store software programs and modules, such as program instructions/modules corresponding to the method and apparatus for verifying the DAC interface in the embodiment of the present application, and the processor 201 executes various functional applications and data processing by running the software programs and modules stored in the memory 203, that is, implements the above-described method for verifying the DAC interface. The memory 203 may include high speed random access memory, and may also include non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 203 may further include memory located remotely from the processor 201, which may be connected to the terminal over a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.

The transmission device 205 is used for receiving or sending data via a network, and can also be used for data transmission between a processor and a memory. Examples of the network may include a wired network and a wireless network. In one example, the transmission device 205 includes a Network adapter (NIC) that can be connected to a router via a Network cable and other Network devices to communicate with the internet or a local area Network. In one example, the transmission device 205 is a Radio Frequency (RF) module, which is used for communicating with the internet in a wireless manner.

Wherein the memory 203 is specifically used for storing application programs.

The processor 201 may call the application stored in the memory 203 via the transmission means 205 to perform the following steps:

inputting a test signal to a DAC interface of a chip to be tested;

and acquiring a test result for testing the chip to be tested.

By adopting the embodiment of the application, the method and the device have the advantages that a test signal is input to a DAC interface of a chip to be tested; and acquiring a test result of testing the chip to be tested. The method can be used for automatically verifying the DAC function of the chip sample wafer in the laboratory stage, realizes the automatic injection of verification excitation, realizes the automatic reading and storage of the DAC conversion result and automatically generates a corresponding data table, and can solve the technical problem of low test efficiency in the related technology.

Optionally, the specific examples in this embodiment may refer to the examples described in the above embodiments, and this embodiment is not described herein again.

It can be understood by those skilled in the art that the structure shown in fig. 6 is only an illustration, and the terminal may be a terminal device such as a smart phone (e.g., an Android phone, an iOS phone, etc.), a tablet computer, a palm computer, and a Mobile Internet Device (MID), a PAD, etc. Fig. 6 is a diagram illustrating a structure of the electronic device. For example, the terminal may also include more or fewer components (e.g., network interfaces, display devices, etc.) than shown in FIG. 6, or have a different configuration than shown in FIG. 6.

Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by a program instructing hardware associated with the terminal device, where the program may be stored in a computer-readable storage medium, and the storage medium may include: flash disks, Read-Only memories (ROMs), Random Access Memories (RAMs), magnetic or optical disks, and the like.

Embodiments of the present application also provide a storage medium. Optionally, in this embodiment, the storage medium may be used to execute a program code of a verification method of a DAC interface.

Optionally, in this embodiment, the storage medium may be located on at least one of a plurality of network devices in a network shown in the above embodiment.

Optionally, in this embodiment, the storage medium is configured to store program code for performing the following steps:

inputting a test signal to a DAC interface of a chip to be tested;

and acquiring a test result for testing the chip to be tested.

Optionally, in this embodiment, the storage medium may include, but is not limited to: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.

The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.

The integrated unit in the above embodiments, if implemented in the form of a software functional unit and sold or used as a separate product, may be stored in the above computer-readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or a part of or all or part of the technical solution contributing to the prior art may be embodied in the form of a software product stored in a storage medium, and including instructions for causing one or more computer devices (which may be personal computers, servers, network devices, or the like) to execute all or part of the steps of the method described in the embodiments of the present application.

In the above embodiments of the present application, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

In the several embodiments provided in the present application, it should be understood that the disclosed client may be implemented in other manners. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one type of division of logical functions, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.

The foregoing is only a preferred embodiment of the present application and it should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.

Claims

1. A system for validating a DAC interface, comprising:

a chip to be tested, the chip to be tested having a digital-to-analog conversion DAC interface;

the computer is used for sending a test signal to the chip to be tested and acquiring a test result;

and the adapter is in communication connection with the computer and is used for transmitting the test signal to the DAC interface of the chip to be tested.

2. The system of claim 1, further comprising:

and the IC test board is used for communicating the DAC interface of the chip to be tested with the adapter.

3. The system of claim 2, wherein the adapter is communicatively coupled to the computer via a USB interface.

4. The system of claim 2, wherein said adapter is communicatively coupled to said IC test board via a USB interface.

5. The system of claim 2, further comprising:

and the program-controlled instrument is in communication connection with the IC test board and the computer and is used for acquiring the test result and feeding the test result back to the computer.

6. The system of claim 1, wherein the computer's interactive interface comprises:

an interaction area for the user to select the equipment and configure the test parameters;

an interaction zone for selecting a programmed instrument connected to a computer;

an interaction region for configuring a data width of the signal;

an interactive area for setting the number of data bits of the output analog signal;

an interaction area for setting a type of a signal to be measured;

the interaction zone for controlling the initiation of the test.

7. A verification method of a DAC interface is characterized by comprising the following steps:

inputting a test signal to a DAC interface of a chip to be tested;

and acquiring a test result for testing the chip to be tested.

8. An apparatus for verifying a DAC interface, comprising:

the input unit is used for inputting a test signal to a DAC interface of the chip to be tested;

and the acquisition unit is used for acquiring a test result of testing the chip to be tested.

9. A storage medium, characterized in that the storage medium comprises a stored program, wherein the program when executed performs the method of claim 7.

10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, wherein the processor executes the method of claim 7 by means of the computer program.