CN112131060B - Method, system, equipment and medium for detecting cable full link connectivity - Google Patents
Method, system, equipment and medium for detecting cable full link connectivity Download PDFInfo
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Abstract
The invention discloses a method, a system, equipment and a storage medium for detecting cable full-link connectivity, wherein the method comprises the following steps: the method comprises the following steps that first resistors with the same resistance value are arranged at two ends of each cable for connecting a main board and a daughter board, one end of each first resistor is connected to a cable detection signal, and the other end of each first resistor is grounded; a second resistor is connected in series with the cable detection signal of the main board, and a third resistor with the same resistance value is connected in series with the cable detection signal of each daughter board; sequentially conducting the second resistor and each cable based on the switch switching chip, and detecting whether a cable detection signal of each cable is normal; and determining that the connectivity of the full link of the cable is normal in response to the cable detection signal of each cable being normal. The invention detects the connectivity of the cable full link by using the low-price resistor, thereby not only reducing the cost, but also saving the precious I2C resource, and positioning the abnormal position according to the voltage value.
Description
Technical Field
The present invention relates to the field of cables, and in particular, to a method, a system, a computer device, and a readable medium for detecting full link connectivity of a cable.
Background
In the technical field of servers, the scales of data such as storage, calculation, communication and the like are continuously enlarged, and in a traditional x86 server rack, in order to facilitate expansion of storage and calculation resources, a hard disk backplane, a GPU (Graphics Processing Unit) board and the like are often connected by cables, so that different configurations are matched according to different requirements, and the functions of flexible configuration and convenient expansion are achieved. For example, in a whole cabinet server, a storage node is added for expanding the storage function; GPU nodes are added for expanding the computing function. The dual-path server will lead out multiple sets of PCIe (Peripheral Component Interconnect Express, high speed Serial Computer expansion bus standard) signals through PCIe slot or slim line connectors, connect to a hard disk or GPU board in a node, or transfer the signals to a MiniSAS (Mini Serial Attached Small Computer System Interface) connector through a transfer card such as a retimer card, and connect to a storage node or GPU node through an external cable.
Due to the fact that a large number of cables are used, the phenomena of card falling, tray falling or bandwidth falling caused by the fact that more connectors are not normally connected with the cables occur, and one method for detecting the connectivity of the cables at present is to detect the high-low state of corresponding signals through pin design of connectors of the cables and the boards and management chips such as a BMC (baseboard management controller) and the like to judge whether the cables are connected or not. When the cable connection is good, the BMC detects a low level; otherwise, the high level is detected, and the cable is judged to be not connected well. The second method is to determine cable connectivity by an EEPROM chip integrated inside the cable.
The first method can only detect whether the cable connector is plugged, only one of the two interconnected board cards usually has the BMC, the board card end without the BMC is not easy to detect, the full link of the cable cannot be detected, and whether the cable has the connectivity problem cannot be judged. In the second method, an EEPROM chip needs to be integrated inside each cable, and each cable needs a separate I2C channel, which wastes valuable I2C resources, increases the cost of the cable, and is poor in performance price. The two methods cannot detect whether the cable impedance is good, if foreign matters exist at the connecting part or the cable impedance is abnormally high due to accidental conditions such as connector aging and cable damage, the system stability is poor although the cable impedance can still be conducted, and the reason for positioning is difficult after the problem occurs.
Disclosure of Invention
In view of this, an object of the embodiments of the present invention is to provide a method, a system, a computer device, and a computer-readable storage medium for detecting connectivity of a cable full link, which can be compatible with the advantages of the prior art by using a cheap resistor, and can detect connectivity of the cable full link, accurately locate a problem point, determine whether impedance of the cable full link is abnormal, identify a possible problem of connectivity stability, and avoid a risk in advance.
Based on the above object, an aspect of the embodiments of the present invention provides a method for detecting full link connectivity of a cable, including the following steps: the method comprises the following steps that first resistors with the same resistance value are arranged at two ends of each cable for connecting a main board and a daughter board, one end of each first resistor is connected to a cable detection signal, and the other end of each first resistor is grounded; connecting a second resistor in series on the cable detection signal of the main board, and connecting a third resistor with the same resistance in series on the cable detection signal of each sub-board; sequentially conducting the second resistor and each cable based on a switch switching chip, and detecting whether a cable detection signal of each cable is normal; and determining that the connectivity of the full link of the cables is normal in response to the cable detection signal of each cable being normal.
In some embodiments, the method further comprises: in response to the presence of an anomaly in the cable detection signal of the cable, the anomaly is located based on a magnitude of the anomalous cable detection signal.
In some embodiments, the locating the anomaly based on a magnitude of the anomalous cable detection signal includes: judging whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals or not; and in response to the abnormal cable detection signal not being equal to one of the three preset signals in magnitude, determining that the cable is not completely disconnected.
In some embodiments, the determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals includes: judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the product of the input voltage and the second resistance to the sum of the first resistance and the second resistance; and determining that the cable is completely disconnected in response to the magnitude of the abnormal cable detection signal being equal to a ratio of a product of the input voltage and the second resistance to a sum of the first resistance and the second resistance.
In some embodiments, the determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals includes: judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the input voltage, the product of the first resistance and the second resistance and the sum of the first resistance and twice the second resistance; and determining that the link at the end of the cable close to the daughter board is not communicated in response to the magnitude of the abnormal cable detection signal being equal to the ratio of the input voltage, the product of the first resistance and the second resistance, and the sum of the first resistance and twice the second resistance.
In some embodiments, the determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals includes: judging whether the magnitude of the abnormal cable detection signal is equal to the input voltage or not; and responding to the abnormal cable detection signal with the size equal to the input voltage, and determining that the link at the end, close to the mainboard, of the cable is not communicated.
In some embodiments, the method further comprises: and in response to the fact that the cable detection signal of the cable is abnormal, lighting a signal lamp corresponding to the cable.
In another aspect of the embodiments of the present invention, a system for detecting cable full link connectivity is further provided, including: the first setting module is configured to set first resistors with the same resistance at two ends of each cable for connecting the main board and the daughter board, and one end of each first resistor is connected to a cable detection signal, and the other end of each first resistor is grounded; the second setting module is configured to connect a second resistor in series with the cable detection signal of the main board, and connect a third resistor with the same resistance in series with the cable detection signal of each daughter board; the detection module is configured to sequentially conduct the second resistor and each cable based on the switch switching chip and detect whether a cable detection signal of each cable is normal; and the display module is used for responding to the normality of the cable detection signals of each cable and determining the normal connectivity of the full link of the cable.
In another aspect of the embodiments of the present invention, there is also provided a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method as above.
In a further aspect of the embodiments of the present invention, a computer-readable storage medium is also provided, in which a computer program for implementing the above method steps is stored when the computer program is executed by a processor.
The invention has the following beneficial technical effects: the advantage that can compatible prior art through using cheap resistance, when saving the cost, can detect the connectivity on the cable full link to pinpoint the problem point, can also judge whether impedance on the cable full link exists unusually, discern the intercommunication stability problem that probably exists, avoid the risk in advance.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the prior art descriptions will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic diagram of an embodiment of a method for detecting full-link connectivity of a cable according to the present invention;
FIG. 2 is a circuit diagram for detecting full link connectivity of a cable according to the present invention;
fig. 3 is a schematic hardware structure diagram of an embodiment of a computer device for detecting full link connectivity of a cable provided in the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
In view of the above, a first aspect of the embodiments of the present invention provides an embodiment of a method for detecting full link connectivity of a cable. Fig. 1 is a schematic diagram illustrating an embodiment of a method for detecting full-link connectivity of a cable provided by the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
s1, arranging first resistors with the same resistance at two ends of each cable for connecting the main board and the daughter board, enabling one end of each first resistor to be connected to a cable detection signal, and enabling the other end of each first resistor to be grounded;
s2, connecting a second resistor in series on the cable detection signal of the main board, and connecting a third resistor with the same resistance in series on the cable detection signal of each sub board;
s3, sequentially conducting the second resistor and each cable based on the switch switching chip, and detecting whether the cable detection signal of each cable is normal; and
and S4, responding to the fact that the cable detection signal of each cable is normal, and determining that the connectivity of the full link of the cable is normal.
Fig. 2 is a circuit diagram for detecting full link connectivity of a cable according to the present invention. As shown in fig. 2, a plurality of cables and daughter boards are numbered 1 and 2 … … N. Each cable is respectively connected with the main board and the corresponding daughter board, the A end of each cable is connected with the main board, and the B end of each cable is connected with the daughter board. The BMC _ CABLE _ DET indicates a signal of the BMC control switch for switching the chip, and the BMC _ CTL _ I2C indicates an I2C signal of the BMC.
The two ends of each cable connecting the main board and the daughter board are respectively provided with a first resistor with the same resistance value, one end of each first resistor is connected to a cable detection signal, and the other end of each first resistor is grounded. At both ends of any CABLE, a first resistor R1 with the same resistance is added, one end of the first resistor R1 is connected to the CABLE detection signal CABLE _ DET, and the other end is pulled down to a ground signal. The first resistor R1 may be a plug to facilitate cable integration.
And a second resistor is connected in series with the cable detection signal of the main board, and a third resistor with the same resistance value is connected in series with the cable detection signal of each daughter board. At the motherboard and daughter board terminals, a second resistor R0 and a third resistor R2 are connected in series to the CABLE detection signal CABLE _ DET, respectively, where R0 pulls up the input voltage signal P3V3_ AUX, and R2 pulls down to GND (ground).
And sequentially connecting the second resistor with each cable based on the switch switching chip, and detecting whether the cable detection signal of each cable is normal. A switch switching chip can be introduced, the BMC can be used for controlling the switch switching chip to gate each channel, and R0 is controlled to be respectively conducted with different cables, so that the voltage value V of the corresponding cable is detectedDC. And after the server is electrified and the BMC runs, automatically gating each set channel, and checking and recording the voltage value of the corresponding cable. And recording the detailed log according to the set rule.
And determining that the connectivity of the full link of the cable is normal in response to the cable detection signal of each cable being normal. When the cable link is normal, the conversion formula is as follows:
if the voltage value of the cable is equal to the above formula, the connectivity of the cable is normal. When the server normally operates, the switch switching chip can be closed, and the path is cut off to reduce the current; and running a detection program to perform connectivity check on the cable to be detected when needed.
In some embodiments, the method further comprises: in response to the presence of an anomaly in the cable detection signal of the cable, the anomaly is located based on a magnitude of the anomalous cable detection signal.
In some embodiments, the locating the anomaly based on a magnitude of the anomalous cable detection signal includes: judging whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals or not; and in response to the abnormal cable detection signal not being equal to one of the three preset signals in magnitude, determining that the cable is not completely disconnected. When detecting that the voltage value is not equal to the normal value and the above 3 preset values, the cable can be judged to be not completely disconnected, and abnormal conditions such as foreign matters, damage, oxidation and the like exist, so that the cable can be replaced to avoid the problem of system stability.
In some embodiments, the determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals includes: judging whether the magnitude of the abnormal cable detection signal is equal to the input voltage or not; and responding to the abnormal cable detection signal with the size equal to the input voltage, and determining that the link at the end, close to the mainboard, of the cable is not communicated. When the cable A end is not connected and the link is not connected: vDC3.3V. Therefore, if the magnitude of the cable detection signal is equal to the input voltage, the link is not passed at the end of the cable close to the main board.
In some embodiments, the determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals includes: judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the product of the input voltage and the second resistance to the sum of the first resistance and the second resistance; and determining that the cable is completely disconnected in response to the magnitude of the abnormal cable detection signal being equal to a ratio of a product of the input voltage and the second resistance to a sum of the first resistance and the second resistance. When the abnormal link of the cable is not communicated:
therefore, when the magnitude of the cable detection signal is equal to the ratio of the product of the input voltage and the second resistance to the sum of the first resistance and the second resistance, it indicates that the cable itself is abnormal.
In some embodiments, the determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals includes: judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the input voltage, the product of the first resistance and the second resistance and the sum of the first resistance and twice the second resistance; and determining that the cable is not connected close to one end of the daughter board in response to the magnitude of the abnormal cable detection signal being equal to the ratio of the input voltage, the product of the first resistance and the second resistance and the sum of the first resistance and twice the second resistance. When the link failure is not well received at the B end of the cable:
therefore, the magnitude of the cable detection signal is equal to the ratio of the product of the input voltage and the first resistance to the second resistance to the sum of the first resistance and twice the second resistance, indicating that the cable is not connected close to one end of the daughter board.
In some embodiments, the method further comprises: and in response to the fact that the cable detection signal of the cable is abnormal, lighting a signal lamp corresponding to the cable. In order to facilitate a user to better observe the abnormal cables, a signal lamp can be arranged at a position corresponding to each cable, and when the cable is abnormal, the signal lamp is lightened.
It should be particularly noted that, the steps in the embodiments of the method for detecting cable full link connectivity described above may be mutually intersected, replaced, added, or deleted, and therefore, these reasonable permutation and combination transformations should also fall within the scope of the present invention, and should not limit the scope of the present invention to the embodiments.
In view of the above object, a second aspect of the embodiments of the present invention provides a system for detecting full link connectivity of a cable, including: the first setting module is configured to set first resistors with the same resistance at two ends of each cable for connecting the main board and the daughter board, and one end of each first resistor is connected to a cable detection signal, and the other end of each first resistor is grounded; the second setting module is configured to connect a second resistor in series with the cable detection signal of the main board, and connect a third resistor with the same resistance in series with the cable detection signal of each daughter board; the detection module is configured to sequentially conduct the second resistor and each cable based on the switch switching chip and detect whether a cable detection signal of each cable is normal; and the display module is used for responding to the normality of the cable detection signals of each cable and determining the normal connectivity of the full link of the cable.
In some embodiments, the system further comprises: and the positioning module is configured for responding to the abnormal cable detection signal of the cable, and positioning the abnormality according to the size of the abnormal cable detection signal.
In some embodiments, the positioning module is configured to: judging whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals or not; and in response to the abnormal cable detection signal not having a magnitude equal to one of the three preset signals, determining that the cable is not completely disconnected.
In some embodiments, the positioning module is configured to: judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the product of the input voltage and the second resistance to the sum of the first resistance and the second resistance; and determining that the cable is completely disconnected in response to the magnitude of the abnormal cable detection signal being equal to a ratio of a product of the input voltage and the second resistance to a sum of the first resistance and the second resistance.
In some embodiments, the positioning module is configured to: judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the input voltage, the product of the first resistance and the second resistance and the sum of the first resistance and twice the second resistance; and determining that the cable is not connected close to one end of the daughter board in response to the magnitude of the abnormal cable detection signal being equal to the ratio of the input voltage, the product of the first resistance and the second resistance and the sum of the first resistance and twice the second resistance.
In some embodiments, the positioning module is configured to: judging whether the magnitude of the abnormal cable detection signal is equal to the input voltage or not; and responding to the abnormal cable detection signal with the size equal to the input voltage, and determining that the link at the end, close to the mainboard, of the cable is not communicated.
In some embodiments, the system further comprises: and the indicating module is configured to respond to the abnormal cable detection signal of the cable, and light a signal lamp corresponding to the cable.
In view of the above object, a third aspect of the embodiments of the present invention provides a computer device, including: at least one processor; and a memory storing computer instructions executable on the processor, the instructions being executable by the processor to perform the steps of: s1, arranging first resistors with the same resistance at two ends of each cable for connecting the main board and the daughter board, enabling one end of each first resistor to be connected to a cable detection signal, and enabling the other end of each first resistor to be grounded; s2, connecting a second resistor in series on the cable detection signal of the main board, and connecting a third resistor with the same resistance in series on the cable detection signal of each sub board; s3, sequentially conducting the second resistor and each cable based on the switch switching chip, and detecting whether the cable detection signal of each cable is normal; and S4, responding to the cable detection signal of each cable being normal, and determining that the connectivity of the full link of the cable is normal.
In some embodiments, the method further comprises: in response to the presence of an anomaly in the cable detection signal of the cable, the anomaly is located based on a magnitude of the anomalous cable detection signal.
In some embodiments, the locating the anomaly based on a magnitude of the anomalous cable detection signal includes: judging whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals or not; and in response to the abnormal cable detection signal not being equal to one of the three preset signals in magnitude, determining that the cable is not completely disconnected.
In some embodiments, the determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals includes: judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the product of the input voltage and the second resistance to the sum of the first resistance and the second resistance; and determining that the cable is completely disconnected in response to the magnitude of the abnormal cable detection signal being equal to a ratio of a product of the input voltage and the second resistance to a sum of the first resistance and the second resistance.
In some embodiments, the determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals includes: judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the input voltage, the product of the first resistance and the second resistance and the sum of the first resistance and twice the second resistance; and determining that the cable is not connected close to one end of the daughter board in response to the magnitude of the abnormal cable detection signal being equal to the ratio of the input voltage, the product of the first resistance and the second resistance and the sum of the first resistance and twice the second resistance.
In some embodiments, the determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals includes: judging whether the magnitude of the abnormal cable detection signal is equal to the input voltage or not; and responding to the abnormal cable detection signal with the size equal to the input voltage, and determining that the link at the end, close to the mainboard, of the cable is not communicated.
In some embodiments, the method further comprises: and in response to the fact that the cable detection signal of the cable is abnormal, lighting a signal lamp corresponding to the cable.
Fig. 3 is a schematic hardware structural diagram of an embodiment of the computer device for detecting full-link connectivity of a cable according to the present invention.
Taking the apparatus shown in fig. 3 as an example, the apparatus includes a processor 301 and a memory 302, and may further include: an input device 303 and an output device 304.
The processor 301, the memory 302, the input device 303 and the output device 304 may be connected by a bus or other means, and fig. 3 illustrates the connection by a bus as an example.
The memory 302 is a non-volatile computer-readable storage medium, and can be used for storing non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules corresponding to the method for detecting full link connectivity of a cable in the embodiments of the present application. The processor 301 executes various functional applications and data processing of the server by executing nonvolatile software programs, instructions and modules stored in the memory 302, namely, implements the method for detecting full link connectivity of the cable according to the above method embodiment.
The memory 302 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to use of a method of detecting cable full link connectivity, or the like. Further, the memory 302 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, memory 302 optionally includes memory located remotely from processor 301, which may be connected to a local module via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 303 may receive information such as a user name and a password that are input. The output means 304 may comprise a display device such as a display screen.
Program instructions/modules corresponding to one or more methods of detecting cable full link connectivity are stored in the memory 302 and, when executed by the processor 301, perform the method of detecting cable full link connectivity in any of the method embodiments described above.
Any embodiment of a computer device performing the method for detecting full link connectivity of a cable described above may achieve the same or similar effects as any of the preceding method embodiments corresponding thereto.
The invention also provides a computer readable storage medium storing a computer program which, when executed by a processor, performs the method as above.
Finally, it should be noted that, as one of ordinary skill in the art can appreciate that all or part of the processes of the methods of the above embodiments can be implemented by a computer program to instruct related hardware, and the program of the method for detecting full link connectivity of a cable can be stored in a computer readable storage medium, and when executed, the program can include the processes of the embodiments of the methods described above. The storage medium of the program may be a magnetic disk, an optical disk, a Read Only Memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments corresponding thereto.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A method of detecting cable full link connectivity, comprising the steps of:
the method comprises the following steps that first resistors with the same resistance value are arranged at two ends of each cable for connecting a main board and a daughter board, one end of each first resistor is connected to a cable detection signal, and the other end of each first resistor is grounded;
connecting a second resistor in series on the cable detection signal of the main board, and connecting a third resistor with the same resistance in series on the cable detection signal of each sub-board;
sequentially conducting the second resistor and each cable based on a switch switching chip, and detecting whether a cable detection signal of each cable is normal; and
and determining that the connectivity of the full link of the cables is normal in response to the fact that the cable detection signal of each cable is normal.
2. The method of claim 1, further comprising:
in response to the presence of an anomaly in the cable detection signal of the cable, the anomaly is located based on a magnitude of the anomalous cable detection signal.
3. The method of claim 2, wherein locating the anomaly based on a magnitude of the anomalous cable detection signal comprises:
judging whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals or not; and
and in response to the abnormal cable detection signal not being equal to one of the three preset signals in magnitude, determining that the cable is not completely disconnected.
4. The method of claim 3, wherein said determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals comprises:
judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the product of the input voltage and the second resistance to the sum of the first resistance and the second resistance; and
in response to the magnitude of the abnormal cable detection signal being equal to a ratio of a product of the input voltage and the second resistance to a sum of the first resistance and the second resistance, it is determined that the cable is completely disconnected.
5. The method of claim 3, wherein said determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals comprises:
judging whether the magnitude of the abnormal cable detection signal is equal to the ratio of the input voltage, the product of the first resistance and the second resistance and the sum of the first resistance and twice the second resistance; and
and determining that the cable is not connected close to one end of the daughter board in response to the magnitude of the abnormal cable detection signal being equal to the ratio of the input voltage, the product of the first resistance and the second resistance and the sum of the first resistance and twice the second resistance.
6. The method of claim 3, wherein said determining whether the magnitude of the abnormal cable detection signal is equal to one of three preset signals comprises:
judging whether the magnitude of the abnormal cable detection signal is equal to the input voltage or not; and
and responding to the abnormal cable detection signal with the size equal to the input voltage, and determining that the link at the end, close to the mainboard, of the cable is not communicated.
7. The method of claim 1, further comprising:
and in response to the fact that the cable detection signal of the cable is abnormal, lighting a signal lamp corresponding to the cable.
8. A method of detecting cable full link connectivity, comprising:
the first setting module is configured to set first resistors with the same resistance at two ends of each cable for connecting the main board and the daughter board, and one end of each first resistor is connected to a cable detection signal, and the other end of each first resistor is grounded;
the second setting module is configured to connect a second resistor in series with the cable detection signal of the main board, and connect a third resistor with the same resistance value in series with the cable detection signal of each daughter board;
the detection module is configured to sequentially conduct the second resistor and each cable based on the switch switching chip and detect whether a cable detection signal of each cable is normal; and
and the display module is configured to respond to the fact that the cable detection signal of each cable is normal, and determine that the connectivity of the full link of the cable is normal.
9. A computer device, comprising:
at least one processor; and
a memory storing computer instructions executable on the processor, the instructions when executed by the processor implementing the steps of the method of any one of claims 1 to 7.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.
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