CN111176913A - Circuit and method for detecting Cable Port in server - Google Patents
Circuit and method for detecting Cable Port in server Download PDFInfo
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- CN111176913A CN111176913A CN201911291681.0A CN201911291681A CN111176913A CN 111176913 A CN111176913 A CN 111176913A CN 201911291681 A CN201911291681 A CN 201911291681A CN 111176913 A CN111176913 A CN 111176913A
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- 238000004891 communication Methods 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 238000003780 insertion Methods 0.000 description 2
- 230000037431 insertion Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2273—Test methods
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/26—Functional testing
- G06F11/273—Tester hardware, i.e. output processing circuits
Abstract
The embodiment of the invention discloses a circuit and a method for detecting Cable ports in a server. The method comprises the following steps: s1, the mainboard CPLD sends a first pulse signal to the backboard CPLD; s2, the backboard CPLD receives the first pulse signal; s3, the backboard CPLD compares the first pulse signal with the built-in second pulse signal; s4, the backboard CPLD stores the information of the first pulse signal and the second pulse signal; s5, the BMC displays the Port result of Cable connection. When the method is used for assembling a plurality of hard disks on the server, whether the Cable is inserted wrongly is detected, so that the production efficiency of the server is improved, and the inserted Cable can be quickly identified.
Description
Technical Field
The invention relates to the technical field of servers, in particular to a circuit and a method for detecting Cable Port in a server.
Background
With the rapid development of technology and application, the configuration specification of the server is higher and higher, the SAS/SATA is gradually upgraded to the NVMe with higher performance, and the number of the hard disks is rapidly increased.
The rapid increase of the number of hard disks inevitably brings the increase of the number of cables in a server system in the architecture of the existing server. In a server product, when there is a multi-hard disk configuration, there are multiple cables in the server product.
When the server is assembled, the corresponding relation of the Cable is very easy to be mistaken, and the existing Cable lacks signals for detecting ports, so that whether the Cable ports are mistakenly inserted or not cannot be detected.
Disclosure of Invention
The embodiment of the invention provides a circuit and a method for detecting a Cable Port in a server, which are used for solving the problem that the prior art cannot detect the Cable insertion error. The embodiment of the invention realizes the identification of the Cable Port by adding a signal in the existing Cable, thereby quickly realizing the detection of whether the Cable is inserted in error.
The embodiment of the invention discloses the following technical scheme:
the invention provides a circuit for detecting Cable ports in a server, which comprises a BMC, a mainboard CPLD, a backboard CPLD, a first connector and a second connector, wherein the BMC is connected with the backboard CPLD, the mainboard CPLD is connected with the first connector, the backboard CPLD is connected with the second connector, the first connector is arranged on the mainboard, the second connector is arranged on the backboard, the number of the first connectors is the same as that of the ports, the number of the second connectors is the same as that of the ports, and the first connectors and the second connectors are correspondingly connected one by one through the Cables;
the mainboard CPLD is used for sending a first pulse signal to the backboard CPLD, the backboard CPLD is used for receiving the first pulse signal, the backboard CPLD is used for comparing the first pulse signal with the second pulse signal, the backboard CPLD is used for storing the first pulse signal and the second pulse signal, the BMC is used for reading the first pulse signal and the second pulse signal stored by the backboard CPLD, and the BMC is used for displaying a Port result connected with the Cable.
Further, the motherboard CPLD includes first ports, the number of the first ports is the same as the number of ports, the first ports are connected to the first connectors in a one-to-one correspondence, the backplane CPLD includes second ports, the number of the second ports is the same as the number of ports, and the second ports are connected to the second connectors in a one-to-one correspondence;
the first Port of the mainboard CPLD sends a first pulse signal to the backboard CPLD through the first connector, the second Port of the backboard CPLD receives the first pulse signal through the second connector, the backboard CPLD is used for comparing the first pulse signal with a second pulse signal built in the backboard CPLD, when the first pulse signal is the same as the second pulse signal, the Port connected with the first connector Cable and the second connector Cable is correct, when the first pulse signal is different from the second pulse signal, the Port connected with the first connector Cable and the second connector Cable is wrong, and the backboard CPLD is used for storing the first pulse signal and the second pulse signal.
Further, the first pulse signals are arranged in a program of the main board CPLD, the number of the first pulse signals is the same as the number of ports, each of the first pulse signals corresponds to one of the first ports, and the number of pulses of each of the first pulse signals is sequentially increased according to the number of the ports;
the second pulse signals are arranged in a program of the back plate CPLD, the number of the second pulse signals is the same as that of the ports, each second pulse signal corresponds to each second Port one by one, and the pulse number of each second pulse signal is sequentially increased according to the serial number of the ports.
Further, the communication mode between the BMC and the backplane CPLD is I2C.
The second aspect of the present invention provides a method for detecting a Cable Port in a server, including:
s1, the mainboard CPLD sends a first pulse signal to the backboard CPLD;
s2, the backboard CPLD receives the first pulse signal;
s3, the backboard CPLD compares the first pulse signal with the built-in second pulse signal;
s4, the backboard CPLD stores the information of the first pulse signal and the second pulse signal;
s5, the BMC displays the Port result of Cable connection.
Further, in step S1, the motherboard CPLD sends a first pulse signal to the backplane CPLD, specifically; the first port of the mainboard CPLD sends a first pulse signal to the backboard CPLD through the first connector.
Further, in step S2, the backplane CPLD receives the first pulse signal, specifically: and the second port of the back plate CPLD receives the first pulse signal through the second connector.
Further, before the step S1, the sending, by the motherboard CPLD, the first pulse signal to the backplane CPLD includes:
setting the first pulse signals in a program of a mainboard CPLD, wherein the number of the first pulse signals is the same as that of ports, each first pulse signal corresponds to one Port, and the pulse number of each first pulse signal is sequentially increased according to the serial number of the ports;
and setting the second pulse signals in a program of the back plate CPLD, wherein the number of the second pulse signals is the same as that of the ports, each second pulse signal corresponds to each second Port one by one, and the pulse number of each second pulse signal is sequentially increased according to the serial number of the ports.
Further, in step S3, the back plate CPLD compares the first pulse signal with the built-in second pulse signal, specifically:
when the received first pulse signal is the same as a second pulse signal built in the back plate CPLD, the Port connected with the first connector and the second connector Cable is correct;
when the received first pulse signal is different from the second pulse signal built in the backplane CPLD, the Port connected by the first connector and the second connector Cable is wrong.
Further, in step S5, the BMC displays a Cable-connected Port result, specifically:
the BMC reads information of a first pulse signal and a second pulse signal stored by the back plate CPLD, and if the first pulse signal and the second pulse signal are the same, correct Port information connected with the Cable is displayed; and if the first pulse signal is different from the second pulse signal, displaying alarm information of Port errors connected by the Cable.
The effect provided in the summary of the invention is only the effect of the embodiment, not all the effects of the invention, and one of the above technical solutions has the following advantages or beneficial effects:
the circuit and the method for detecting the Cable Port in the server provided by the invention have the advantages that the Port identification signal is added in the Cable, the CPLD of the mainboard sends the pulse signal to the CPLD of the backboard, the CPLD of the backboard receives the pulse signal and compares the pulse signal with the built-in pulse signal to judge whether the pulse signal is consistent, if the pulse signal is consistent, the Port between the connector on the mainboard and the connector on the backboard is corresponding, the Cable connection is correct, and if the pulse signal is inconsistent, the Port between the connector on the mainboard and the connector on the backboard is not corresponding, and the Cable connection is wrong. When the method is used for assembling a plurality of hard disks on the server, whether the Cable is inserted wrongly is detected, so that the production efficiency of the server is improved, the inserted Cable can be quickly identified, and the problem server is prevented from flowing to the next link.
Drawings
In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present invention, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.
FIG. 1 is a block diagram of the circuit configuration of the present invention;
FIG. 2 is a block diagram of the operation of the circuit of an embodiment of the present invention;
fig. 3 is a flow chart of the method of the present invention.
Detailed Description
In order to clearly explain the technical features of the present invention, the following detailed description of the present invention is provided with reference to the accompanying drawings. The following disclosure provides many different embodiments, or examples, for implementing different features of the invention. To simplify the disclosure of the present invention, the components and arrangements of specific examples are described below. Furthermore, the present invention may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. It should be noted that the components illustrated in the figures are not necessarily drawn to scale. Descriptions of well-known components and processing techniques and procedures are omitted so as to not unnecessarily limit the invention.
As shown in fig. 1, which is a block diagram of a circuit structure of the present invention, the circuit includes a BMC (BMC, Baseboard management controller), a motherboard CPLD (CPLD, Complex Programmable Logic Device), a management chip for managing power-up and power-down timing of a motherboard of a server and assisting the BMC to perform other management operations, a backplane CPLD, a first connector and a second connector, where the BMC (model AST2500) is connected to the backplane CPLD (model LCMXO2-2000HC-4BG256C), the motherboard CPLD is connected to the first connector, the backplane CPLD is connected to the second connector, the first connector is disposed on the motherboard, the second connector is disposed on the backplane, the number of the first connectors is the same as that of ports, the number of the second connectors is the same as that of ports, and the first connectors and the second connectors are connected in a one-to-one correspondence via Cable.
The mainboard CPLD is used for sending a first pulse signal to the backboard CPLD, the backboard CPLD is used for receiving the first pulse signal, the backboard CPLD is used for comparing the first pulse signal with the second pulse signal, the backboard CPLD is used for storing the first pulse signal and the second pulse signal, the BMC is used for reading the first pulse signal and the second pulse signal stored by the backboard CPLD, and the BMC is used for displaying a Port result connected with the Cable.
The mainboard CPLD comprises first ports, the number of the first ports is the same as that of ports, the first ports are connected with the first connectors in a one-to-one correspondence mode, the backboard CPLD comprises second ports, the number of the second ports is the same as that of the ports, and the second ports are connected with the second connectors in a one-to-one correspondence mode.
The first Port of the mainboard CPLD sends a first pulse signal to the backboard CPLD through the first connector, the second Port of the backboard CPLD receives the first pulse signal through the second connector, the backboard CPLD is used for comparing the first pulse signal with a second pulse signal built in the backboard CPLD, when the first pulse signal is the same as the second pulse signal, the Port connected with the first connector Cable and the second connector Cable is correct, when the first pulse signal is different from the second pulse signal, the Port connected with the first connector Cable and the second connector Cable is wrong, and the backboard CPLD is used for storing the first pulse signal and the second pulse signal.
The first pulse signals are arranged in the program of the main board CPLD, the number of the first pulse signals is the same as that of the ports, each first pulse signal corresponds to one first Port, and the pulse number of each first pulse signal is sequentially increased according to the number of the ports.
The second pulse signals are arranged in the program of the back plate CPLD, the number of the second pulse signals is the same as that of the ports, each second pulse signal corresponds to each second Port one by one, and the pulse number of each second pulse signal is sequentially increased according to the number of the ports.
The communication mode of the BMC and the back plate CPLD is I2C, and when a first pulse signal and a second pulse signal read by the BMC are the same, correct information of a Cable connection Port is displayed; when the first pulse signal and the second pulse signal read by the BMC are different, alarm information of Cable connection Port errors is displayed. The displayed information is in the BMC management interface.
The first connector and the second connector are of the type SlimSAS.
As shown in fig. 2, which is a working block diagram of the circuit according to the embodiment of the present invention, the working principle is as follows:
1) during hardware design, the serial numbers of the first connectors at the main board end are sequentially CONN0, CONN1, … and CONNn, the serial numbers of the second connectors at the back board end are sequentially CONN0, CONN1, … and CONNn, the pulse numbers of the first pulses (S1, S2, … and Sn) corresponding to the main boards CONN0, CONN1, … and CONNn on the first port of the main board CPLD are sequentially one pulse, two pulses, … and n pulses, and the pulse numbers of the second pulses (BS1, BS2, … and BSn) corresponding to the back board CONN0, CONN1, … and CONNn on the second port of the back board CPLD are sequentially one pulse, two pulses, … and n pulses, and after the server is assembled and powered on, the normal connection relationship of the connectors is shown in the following table;
| first connector | Cable | Second connector |
| Mainboard CONN0 | Cable0 | Back panel CONN0 |
| Mainboard CONN1 | Cable1 | Back panel CONN1 |
| … | … | … |
| Mainboard CONNn | Cablen | Back panel CONNn |
2) The interconnection sequence of each connector and the CPLD is fixed when the mainboard and the backboard end are designed, after the normal assembly is completed and the power is on, the mainboard CPLD can send corresponding pulse signals to the CPLD at the backboard end through each connector, for example, the circuit of the mainboard CPLD, S2, mainboard CONN1, Cable1, backboard CONN1, BS2 and the backboard CPLD can send two pulses to the backboard end through the circuit, and the backboard end detects that the signal line of the BS2 is transmitted as two pulses, namely, the circuit connection is judged to be correct;
3) in an abnormal situation, after the assembly is completed and the power is turned on, if the signal line with the wrong line is: the mainboard CPLD-S2-mainboard CONN 1-Cable 1-backboard CONN 0-BS 1-backboard CPLD, because the signal sent by the mainboard end is still two pulse signals, but at the backboard end, the CPLD detects that the signal transmitted through the CONN 0-BS 1 is two pulses, and actually the pulse which the backboard end should receive is one, the backboard end CPLD detects the difference and identifies the wrong insertion of the Cable sequence, and further transmits the signal to the mainboard BMC through I2C, and the BMC can send alarm information to prompt an operator that the Cable has the wrong connection.
As shown in fig. 3, the method of the present invention is a work flow diagram, and the method includes:
s1, the mainboard CPLD sends a first pulse signal to the backboard CPLD;
s2, receiving the first pulse signal by the back plate CPLD;
s3, comparing the first pulse signal with a built-in second pulse signal by the back plate CPLD;
s4, storing the first pulse signal and the second pulse signal information by the back plate CPLD;
s5, the BMC displays the Port result of Cable connection.
In step S1, the main board CPLD sends a first pulse signal to the backplane CPLD, specifically, the first pulse signal is sent; the first port of the mainboard CPLD sends a first pulse signal to the backboard CPLD through the first connector.
In step S2, the back plate CPLD receives the first pulse signal, specifically: the second port of the backplane CPLD receives the first pulse signal through the second connector.
In step S1, before the motherboard CPLD sends the first pulse signal to the backplane CPLD, the method includes:
setting first pulse signals in a program of the main board CPLD, wherein the number of the first pulse signals is the same as that of ports, each first pulse signal corresponds to one Port, and the pulse number of each first pulse signal is sequentially increased according to the number of the ports;
and setting second pulse signals in a program of the back plate CPLD, wherein the number of the second pulse signals is the same as that of the ports, each second pulse signal corresponds to each second Port one by one, and the pulse number of each second pulse signal is sequentially increased according to the serial number of the ports.
In step S3, the back plate CPLD compares the first pulse signal with the built-in second pulse signal, specifically: when the received first pulse signal is the same as a second pulse signal built in the back plate CPLD, the Port connected with the first connector and the second connector Cable is correct; when the received first pulse signal is different from the second pulse signal built in the backplane CPLD, the Port connected by the first connector and the second connector Cable is wrong.
In step S5, the BMC displays the Port result connected to the Cable, specifically: the BMC reads information of a first pulse signal and a second pulse signal stored in the back plate CPLD, and if the first pulse signal and the second pulse signal are the same, correct Port information connected with the Cable is displayed; and if the first pulse signal is different from the second pulse signal, displaying alarm information of Port errors connected by the Cable.
The foregoing is only a preferred embodiment of the present invention, and it will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the principle of the invention, and such modifications and improvements are also considered to be within the scope of the invention.
Claims (10)
1. A circuit for detecting Cable ports in a server is characterized in that the circuit comprises a BMC, a mainboard CPLD, a backboard CPLD, a first connector and a second connector, wherein the BMC is connected with the backboard CPLD, the mainboard CPLD is connected with the first connector, the backboard CPLD is connected with the second connector, the first connector is arranged on the mainboard, the second connector is arranged on the backboard, the number of the first connectors is the same as that of the ports, the number of the second connectors is the same as that of the ports, and the first connectors and the second connectors are connected in a one-to-one correspondence manner through Cables;
the mainboard CPLD is used for sending a first pulse signal to the backboard CPLD, the backboard CPLD is used for receiving the first pulse signal, the backboard CPLD is used for comparing the first pulse signal with the second pulse signal, the backboard CPLD is used for storing the first pulse signal and the second pulse signal, the BMC is used for reading the first pulse signal and the second pulse signal stored by the backboard CPLD, and the BMC is used for displaying a Port result connected with the Cable.
2. The circuit for detecting Cable ports in a server according to claim 1, wherein the motherboard CPLD includes first ports, the number of the first ports is the same as the number of ports, the first ports are connected to the first connectors in a one-to-one correspondence, the backplane CPLD includes second ports, the number of the second ports is the same as the number of ports, and the second ports are connected to the second connectors in a one-to-one correspondence;
the first Port of the mainboard CPLD sends a first pulse signal to the backboard CPLD through the first connector, the second Port of the backboard CPLD receives the first pulse signal through the second connector, the backboard CPLD is used for comparing the first pulse signal with a second pulse signal built in the backboard CPLD, when the first pulse signal is the same as the second pulse signal, the Port connected with the first connector Cable and the second connector Cable is correct, when the first pulse signal is different from the second pulse signal, the Port connected with the first connector Cable and the second connector Cable is wrong, and the backboard CPLD is used for storing the first pulse signal and the second pulse signal.
3. The circuit for detecting Cable ports in a server according to claim 1, wherein the first pulse signals are set in a program of a motherboard CPLD, the number of the first pulse signals is the same as the number of ports, each first pulse signal corresponds to one of the first ports, and the number of pulses of each first pulse signal sequentially increases according to the number of ports;
the second pulse signals are arranged in a program of the back plate CPLD, the number of the second pulse signals is the same as that of the ports, each second pulse signal corresponds to each second Port one by one, and the pulse number of each second pulse signal is sequentially increased according to the serial number of the ports.
4. The circuit for detecting Cable ports in a server according to claim 1, wherein the communication mode between the BMC and the backplane CPLD is I2C.
5. A method for detecting Cable Port in a server, applied to the circuit of any of claims 1-4, the method comprising:
s1, the mainboard CPLD sends a first pulse signal to the backboard CPLD;
s2, the backboard CPLD receives the first pulse signal;
s3, the backboard CPLD compares the first pulse signal with the built-in second pulse signal;
s4, the backboard CPLD stores the information of the first pulse signal and the second pulse signal;
s5, the BMC displays the Port result of Cable connection.
6. The method for detecting Cable Port in server according to claim 5, wherein in step S1, the motherboard CPLD sends a first pulse signal, specifically; the first port of the mainboard CPLD sends a first pulse signal to the backboard CPLD through the first connector.
7. The method according to claim 5, wherein in step S2, the back plate CPLD receives the first pulse signal, specifically: and the second port of the back plate CPLD receives the first pulse signal through the second connector.
8. The method according to claim 5, wherein before the step S1, the step S1 includes:
setting the first pulse signals in a program of a mainboard CPLD, wherein the number of the first pulse signals is the same as that of ports, each first pulse signal corresponds to one Port, and the pulse number of each first pulse signal is sequentially increased according to the serial number of the ports;
and setting the second pulse signals in a program of the back plate CPLD, wherein the number of the second pulse signals is the same as that of the ports, each second pulse signal corresponds to each second Port one by one, and the pulse number of each second pulse signal is sequentially increased according to the serial number of the ports.
9. The method according to claim 5, wherein the comparing step S3, by the back plate CPLD, compares the first pulse signal with a built-in second pulse signal, specifically:
when the received first pulse signal is the same as a second pulse signal built in the back plate CPLD, the Port connected with the first connector and the second connector Cable is correct;
when the received first pulse signal is different from the second pulse signal built in the backplane CPLD, the Port connected by the first connector and the second connector Cable is wrong.
10. The method according to claim 5, wherein in step S5, the BMC displays a Cable-connected Port result, specifically:
the BMC reads information of a first pulse signal and a second pulse signal stored by the back plate CPLD, and if the first pulse signal and the second pulse signal are the same, correct Port information connected with the Cable is displayed; and if the first pulse signal is different from the second pulse signal, displaying alarm information of Port errors connected by the Cable.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911291681.0A CN111176913A (en) | 2019-12-16 | 2019-12-16 | Circuit and method for detecting Cable Port in server |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911291681.0A CN111176913A (en) | 2019-12-16 | 2019-12-16 | Circuit and method for detecting Cable Port in server |
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| CN111176913A true CN111176913A (en) | 2020-05-19 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112527582A (en) * | 2020-12-18 | 2021-03-19 | 浪潮电子信息产业股份有限公司 | Detection method, detection device, detection equipment and storage medium of server cable |
| CN113791368A (en) * | 2021-09-10 | 2021-12-14 | 苏州浪潮智能科技有限公司 | Method and device for automatically checking misplugging of interconnection cables of server and GPU (graphics processing Unit) box |
| CN113849234A (en) * | 2021-09-24 | 2021-12-28 | 联想(北京)有限公司 | Connection state identification method and electronic equipment |
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| CN109271009A (en) * | 2018-09-07 | 2019-01-25 | 郑州云海信息技术有限公司 | A kind of method, apparatus that control server backboard powers on and CPLD |
| CN111382102A (en) * | 2018-12-28 | 2020-07-07 | 中兴通讯股份有限公司 | Hard disk expansion system and electronic equipment |
| CN113077553A (en) * | 2021-04-06 | 2021-07-06 | 华南理工大学 | Three-dimensional model segmentation method based on surface attributes |
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2019
- 2019-12-16 CN CN201911291681.0A patent/CN111176913A/en not_active Withdrawn
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109271009A (en) * | 2018-09-07 | 2019-01-25 | 郑州云海信息技术有限公司 | A kind of method, apparatus that control server backboard powers on and CPLD |
| CN111382102A (en) * | 2018-12-28 | 2020-07-07 | 中兴通讯股份有限公司 | Hard disk expansion system and electronic equipment |
| CN113077553A (en) * | 2021-04-06 | 2021-07-06 | 华南理工大学 | Three-dimensional model segmentation method based on surface attributes |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN112527582A (en) * | 2020-12-18 | 2021-03-19 | 浪潮电子信息产业股份有限公司 | Detection method, detection device, detection equipment and storage medium of server cable |
| CN113791368A (en) * | 2021-09-10 | 2021-12-14 | 苏州浪潮智能科技有限公司 | Method and device for automatically checking misplugging of interconnection cables of server and GPU (graphics processing Unit) box |
| CN113849234A (en) * | 2021-09-24 | 2021-12-28 | 联想(北京)有限公司 | Connection state identification method and electronic equipment |
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Application publication date: 20200519 |