CN112117249B - Wafer-level bonding structure and wafer-level bonding method - Google Patents
Wafer-level bonding structure and wafer-level bonding method Download PDFInfo
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- CN112117249B CN112117249B CN202011005359.XA CN202011005359A CN112117249B CN 112117249 B CN112117249 B CN 112117249B CN 202011005359 A CN202011005359 A CN 202011005359A CN 112117249 B CN112117249 B CN 112117249B
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
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- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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Abstract
The invention provides a wafer-level bonding structure and a wafer-level bonding method, wherein the wafer-level bonding structure comprises the following components: the wafer comprises a first wafer, a second wafer and a third wafer, wherein the first wafer is provided with a first bonding surface, and the first bonding surface is provided with a first conductive structure; the second wafer is provided with a second bonding surface, a second conductive structure is arranged on the second bonding surface, a filling layer is arranged on the second bonding surface, and a groove located on part of the second conductive structure is formed in the filling layer; the first conductive structure is positioned in the groove and connected with the second conductive structure; the fill layer is in contact with the first bond face of the first conductive structure side. The invention avoids the quality problems of the subsequent process of the wafer-level bonding structure, such as the problem of easy fragmentation of thinning, etching and the like.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a wafer-level bonding structure and a wafer-level bonding method.
Background
In the field of wafer level packaging, it is necessary to bond different wafers together.
Usually, two opposite wafers are bonded by using a bonding metal layer, a large number of cavity structures exist on the side of a bonding interface between the wafers, and a filling layer cannot be filled, so that the quality problem of the subsequent process can be caused by the defect, for example, in the processes of silicon etching and wafer thinning, the negative pressure or high pressure in the cavity structures can cause the serious problems of silicon wafer cracking or chipping and the like.
In summary, the wafer level bonding structure in the prior art has a serious debris problem.
Disclosure of Invention
Therefore, the present invention provides a wafer-level bonding structure and a wafer-level bonding method, which aims to overcome the defect of the wafer-level bonding structure in the prior art that the problem of chipping is solved.
The invention provides a wafer-level bonding structure, comprising: the wafer comprises a first wafer, a second wafer and a third wafer, wherein the first wafer is provided with a first bonding surface, and the first bonding surface is provided with a first conductive structure; the second wafer is provided with a second bonding surface, a second conductive structure is arranged on the second bonding surface, a filling layer is arranged on the second bonding surface, and a groove located on part of the second conductive structure is formed in the filling layer; the first conductive structure is positioned in the groove and connected with the second conductive structure; the fill layer is in contact with the first bond surface of the first conductive structure side.
Further, at least one of the first conductive structure and the second conductive structure is a solder layer.
Further, the second conductive structure is an under-ball metal layer; the first conductive structure is a micro-bump, a conductive block, a conductive strip or a conductive loop.
Further, the first wafer and the second wafer are hermetically connected through the filling layer.
Further, the material of the filling layer comprises a photosensitive polymer material.
Further, the thickness of the filling layer is 5-25 micrometers.
The invention also provides a wafer-level bonding method for forming the wafer-level bonding structure, which comprises the following steps: providing a first wafer, wherein the first wafer is provided with a first bonding surface, and the first bonding surface is provided with a first conductive structure; providing a second wafer, wherein the second wafer is provided with a second bonding surface, and the second bonding surface is provided with a second conductive structure; forming a filling layer on the second bonding surface, wherein the filling layer is provided with a groove for exposing part of the second conductive structure; and placing the first conductive structure in the groove and bonding the first conductive structure and the second conductive structure together, wherein the filling layer is in contact with the first bonding surface on the side part of the first conductive structure.
Further, the process of bonding the first conductive structure and the second conductive structure together includes a thermocompression bonding process, and in the bonding process, the material of the first conductive structure reflows to fill the groove.
Further, before bonding, the groove width is larger than the first conductive structure width; the filling layer is made of a plastic material, and before bonding, the difference between the volume of the first conductive structure and the volume of the groove is greater than or equal to 0 and less than or equal to 10% of the volume of the groove.
Further, still include: curing the fill layer after bonding the first and second conductive structures together.
The invention has the following advantages:
1. according to the wafer-level bonding structure provided by the invention, the filling layer is arranged on the second bonding surface on the second wafer, and the filling layer can be tightly contacted with the second bonding surface on the side part of the second conductive structure; the filling layer is provided with a groove positioned on part of the second conductive structure, the first conductive structure is positioned in the groove and connected with the second conductive structure, and the electrical connection of the first conductive structure and the second conductive structure is realized. The filling layer is in contact with the first bonding surface of the side portion of the first conductive structure, and the filling layer is in close contact with the second bonding surface of the side portion of the second conductive structure, so that the first wafer and the second wafer which are positioned on the side portions of the second conductive structure and the first conductive structure are filled with the filling layer, a gap between the first wafer and the second wafer is avoided, and the filling layer can play a good supporting role between the first wafer and the second wafer. Therefore, the first wafer and the second wafer can bear larger external pressure, and the first wafer and the second wafer are prevented from deforming to generate fragments.
2. Further, at least one of the first conductive structure and the second conductive structure is a solder layer. When the first conductive structure is connected with the second conductive structure, the solder layer can be reflowed to fill the groove, so that the groove is filled with at least one material of the first conductive structure and the second conductive structure.
3. The second conductive structure is an under-ball metal layer; the first conductive structure is a micro-bump, a conductive block, a conductive strip or a conductive loop. The first conductive structure can be selected from various conductive structures and is suitable for the wafer-level bonding structure, and the application range of the wafer-level bonding structure is widened.
4. The first wafer and the second wafer are hermetically connected through the filling layer. The sealed connection structure avoids the existence of a gap between the first wafer and the second wafer, and can effectively prevent quality problems in subsequent processes, such as serious problems of splintering or fragments and the like.
5. The material of the filling layer comprises a photosensitive polymer material. The photosensitive polymer material has the characteristics of good photosensitivity, high resolution, easiness in accurately controlling and forming and good adhesion. The filling layer has better adhesion, so that the bonding strength of the first wafer and the second wafer is improved.
6. The thickness of the filling layer is 5-25 microns. The filling layer with the thickness of 5-25 microns can fully contact the first bonding surface and the second bonding surface, and meanwhile, the oversize of the bonding structure can be avoided, so that the integration level of the bonding structure is higher.
7. According to the wafer-level bonding method provided by the invention, before the first wafer is bonded with the second wafer, a filling layer is formed on the second bonding surface of the second wafer, and the filling layer is provided with a groove positioned on part of the second conductive structure. The first conductive structure is placed in the groove and is in bonding connection with the second conductive structure, and therefore electrical connection of the first conductive structure and the second conductive structure is achieved. The filling layer is in contact with the first bonding surface of the side portion of the first conductive structure, and the filling layer is in close contact with the second bonding surface of the side portion of the second conductive structure, so that the first wafer and the second wafer which are positioned on the side portions of the second conductive structure and the first conductive structure are filled with the filling layer, a gap between the first wafer and the second wafer is avoided, and the filling layer can play a good supporting role between the first wafer and the second wafer. Therefore, the first wafer and the second wafer can bear larger external pressure, and the first wafer and the second wafer are prevented from deforming to generate fragments.
8. Before bonding, the difference between the volume of the first conductive structure and the volume of the groove is greater than or equal to 0 and less than or equal to 10% of the volume of the groove. The volume of the first conductive structure is not less than that of the groove, so that the groove can be filled with the first conductive structure in the forming process of the wafer-level bonding structure, and the bonding part of the first conductive structure and the second conductive structure is in gapless connection. Because the filling layer has certain plasticity, and the difference between the volume of the first conductive structure and the volume of the groove is less than 10% of the volume of the groove, the first conductive structure can be ensured not to overflow the groove, and the first conductive structure can just fill the groove or slightly extrude the groove.
The groove width is greater than the first conductive structure width prior to bonding. By the design, when the first conductive structure is bonded with the second conductive structure, the first conductive structure can be smoothly arranged in the groove.
9. And the process for bonding the first conductive structure and the second conductive structure together comprises a hot-press bonding process, wherein in the bonding process, the material of the first conductive structure and the filling layer are heated, so that the material of the first conductive structure reflows to fill the groove, and the bonding part of the first conductive structure and the second conductive structure is in gapless connection. By adopting the hot-press bonding process, the filling layer can be heated in the bonding process to perform the function of pre-curing the filling layer, and the pre-curing can adhere the first wafer and the second wafer together.
10. Curing the fill layer after bonding the first and second conductive structures together. The solidified filling layer has certain strength, and the stability of the wafer-level bonding structure is improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 and 2 are intermediate structural schematic diagrams of forming the wafer level bonding structure of fig. 3.
FIG. 3 is a schematic structural diagram of a wafer level bonding structure according to an embodiment of the present invention;
FIG. 4 is a flow chart of a wafer level bonding method according to another embodiment of the present invention;
description of reference numerals:
1. a first wafer; 2. a first bonding surface; 3. a conductive post; 4. a first conductive structure; 5. a second wafer; 6. a second bonding surface; 7. a second conductive structure; 8. a groove; 9. and (6) filling the layer.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it is to be understood that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The present invention provides a wafer level bonding structure, please refer to fig. 3, which includes: the manufacturing method comprises the following steps that a first wafer 1 is provided with a first bonding surface 2, and a first conductive structure 4 is arranged on the first bonding surface 2; a second wafer 5, wherein the second wafer 5 has a second bonding surface 6, the second bonding surface 6 is provided with a second conductive structure 7, a filling layer 9 is provided on the second bonding surface 6, and a groove 8 (refer to fig. 2) is provided in the filling layer 9 and located on a portion of the second conductive structure 7; the first conductive structure 4 is positioned in the groove 8 and is connected with the second conductive structure 7; the filling layer 9 is in contact with the first bonding face 2 at the side of the first conductive structure 4.
The first wafer 1 may be a single-layer wafer or a multi-layer wafer (2.5D or 3D integrated related products).
The second wafer 5 may be a single-layer wafer or a multi-layer wafer (2.5D or 3D integrated related products).
The first conductive structures 4 are arranged on the first bonding surface 2, the first conductive structures 4 protrude out of the first bonding surface 2, one or more first conductive structures 4 can be provided, and the first conductive structures 4 can be designed to have reasonable sizes and shapes according to actual requirements of wafer bonding. At least one of the first conductive structure 4 and the second conductive structure 7 is a solder layer.
The first conductive structure 4 is disposed on the conductive pillar 3. The conductive column 3 is a copper column. In the present embodiment, the first conductive structure 4 is a solder layer, and the second conductive structure 7 is an Under Bump Metallization (UBM). The material of the solder layer is mainly reflowable solder metal, such as Sn, SnAg, SnAgCu or SnPb, and the solder layer is in a molten state when heated, has fluidity, and realizes gapless connection at the connection surface when the first conductive structure 4 is connected with the second conductive structure 7 through reflow melting of the solder.
As an alternative to this embodiment, the first conductive structure is an ubm layer, the second conductive structure is a solder layer, and the first conductive structure and the second conductive structure can be electrically connected.
The first conductive structure 4 is a micro bump, a conductive block, a conductive strip or a conductive loop. The first conductive structure 4 can be applicable to the wafer-level bonding structure of the present invention with various conductive structures, which improves the application range of the wafer-level bonding structure of the present invention.
The filling layer 9 has a photosensitive characteristic and a certain plasticity, the filling layer 9 is in contact with the first bonding surface 2 on the side of the first conductive structure 4, the thickness of the filling layer 9 is 5 micrometers to 25 micrometers, such as 5 micrometers, 10 micrometers, 15 micrometers or 25 micrometers, the filling layer with the thickness of 5 micrometers to 25 micrometers can fully contact the first bonding surface 2 and the second bonding surface 6, and meanwhile, the bonding structure can be prevented from being oversized, so that the integration level of the bonding structure is higher.
In a specific embodiment, the material of the filling layer 9 includes a photosensitive polymer material, which has a good photosensitivity, a high resolution, and is easy to control the forming precisely, and has a good adhesion. For example, the material of the filling layer 9 may be polyimide, which may make the first wafer 1 and the second wafer 5 adhere together, and improve the bonding strength of the first wafer 1 and the second wafer 5.
Because the filling layer 9 is arranged on the second bonding surface 6 on the second wafer 5, the filling layer 9 can be in close contact with the second bonding surface 6 on the side of the second conductive structure 7; the filling layer 9 is provided with a groove 8 on a part of the second conductive structure 7, the first conductive structure 4 is positioned in the groove 8 and connected with the second conductive structure 7, and the electrical connection between the first conductive structure 4 and the second conductive structure 7 is realized. The filling layer 9 is in contact with the first bonding surface 2 at the side of the first conductive structure 4, and the filling layer 9 is in close contact with the second bonding surface 6 at the side of the second conductive structure 7, so that the space between the first wafer 1 and the second wafer 5 at the side of the second conductive structure 7 and the first conductive structure 4 is filled up by the filling layer 9, a gap between the first wafer 1 and the second wafer 5 is avoided, and the filling layer 9 can play a better supporting role between the first wafer 1 and the second wafer 5. Therefore, the first wafer 1 and the second wafer 5 can bear larger external pressure, and the first wafer 1 and the second wafer 5 are prevented from deforming to generate fragments.
In a specific embodiment, the first wafer 1 and the second wafer 5 are hermetically connected by the filling layer 9. The filling layer 9 is tightly attached to the first wafer 1 and the second wafer 5 to form a gapless structure.
The sealed connection structure avoids the existence of a gap between the first wafer 1 and the second wafer 5, and can effectively prevent quality problems, such as severe problems of splintering or fragments and the like, in the subsequent process.
Another embodiment of the present invention further provides a wafer-level bonding method, referring to fig. 4, including the following steps:
s1: providing a first wafer, wherein the first wafer is provided with a first bonding surface, and the first bonding surface is provided with a first conductive structure;
s2, providing a second wafer, wherein the second wafer is provided with a second bonding surface, and the second bonding surface is provided with a second conductive structure;
s3, forming a filling layer on the second bonding surface, wherein the filling layer is provided with a groove for exposing part of the second conductive structure;
s4: and placing the first conductive structure in the groove and bonding the first conductive structure and the second conductive structure together, wherein the filling layer is in contact with the first bonding surface at the side part of the first conductive structure.
Referring to fig. 1, a first wafer 1 is provided, the first wafer 1 has a first bonding surface 2, and the first bonding surface 2 is provided with a first conductive structure 4; providing a second wafer 5, wherein the second wafer 5 is provided with a second bonding surface 6, and the second bonding surface 6 is provided with a second conductive structure 7; a filling layer 9 is formed on the second bonding surface 6, and the filling layer 9 has a groove 8 therein to expose a portion of the second conductive structure 7.
Referring to fig. 2, the first conductive structure 4 is disposed in the groove 8.
Referring to fig. 3, the first wafer 1 and the second wafer 5 are bonded together, and the filling layer 9 contacts the first bonding surface 2 at the side of the first conductive structure 4.
The first wafer 1 refers to the first wafer 1 in the above embodiment, and the second wafer 5 refers to the second wafer 5 in the above embodiment. The material of the first conductive structure 4 refers to the material of the first conductive structure 4 in the foregoing embodiment, and the material of the second conductive structure 7 refers to the material of the second conductive structure 7 in the foregoing embodiment. The material and thickness of the filling layer 9 are as described in the previous embodiments.
The filling layer 9 is covered on the second bonding surface 6 by means of coating and the like, the thickness of the filling layer 9 is about 5-25 micrometers, in practical situations, the thickness of the filling layer 9 is selected according to requirements, the filling layer 9 can be ensured to be in contact with the first bonding surface 2 and the second bonding surface 6 at the same time, and because the filling layer 9 has a photosensitive characteristic, a part of the filling layer 9 above the second conductive structure 7 can be removed by a local exposure method, and a groove 8 is formed to expose a part of the second conductive structure 7.
Because the filling layer 9 is covered on the second bonding surface 6 by adopting the modes of coating and the like, the thickness uniformity of the filling layer 9 is better, the process for forming the filling layer 9 is simple, and the second conductive structure 7 cannot be damaged.
Referring to fig. 2, before bonding, a difference between the volume of the first conductive structure 4 and the volume of the groove 8 is greater than or equal to 0 and less than or equal to 10% of the volume of the groove 8, such as 2%, 4%, 5%, 7%, 9%, 10%. The volume of the first conductive structure 4 is not less than that of the groove 8, so that the first conductive structure 4 can fill the groove 8 in the forming process of the wafer-level bonding structure, and the bonding part of the first conductive structure 4 and the second conductive structure 7 is connected without gap. Because the filling layer 9 has certain plasticity, and the difference between the volume of the first conductive structure 4 and the volume of the groove 8 is less than 10% of the volume of the groove 8, it can be ensured that the first conductive structure 4 does not overflow the groove 8, and the first conductive structure 4 can just fill the groove 8 or slightly extrude the groove 8.
Referring to fig. 2, before bonding, the width of the groove 8 is greater than the width of the first conductive structure 4. By the design, when the first conductive structure 4 is bonded with the second conductive structure 7, the first conductive structure 4 can be smoothly placed in the groove 8. Specifically, the width of the first conductive structure 4 is determined before the groove 8 is formed, and then a mask or an exposure amount is reasonably selected according to the width of the first conductive structure 4, and a part of the second conductive structure 7 is exposed by a local exposure method, so that the groove 8 with a width larger than that of the first conductive structure 4 is formed.
And bonding the first wafer 1 and the second wafer 5 through a wafer-level bonding alignment machine, specifically, aligning the first conductive structure 4 and the second conductive structure 7, and then pressing the first wafer 1 and the second wafer 5, so that the first wafer 1 and the second wafer 5 are hermetically connected together. The filling layer 9 is in contact with the first bonding surface 2 at the side of the first conductive structure 4.
In the wafer-level bonding method of this embodiment, before the first wafer 1 is bonded to the second wafer 5, a filling layer 9 is formed on the second bonding surface 6 of the second wafer 5, and the filling layer 9 has a groove 8 located on a portion of the second conductive structure 7. The first conductive structure 4 is placed in the groove 8 and is in bonding connection with the second conductive structure 7, so that the first conductive structure 4 and the second conductive structure 7 are electrically connected. The filling layer 9 is in contact with the first bonding surface 2 at the side of the first conductive structure 4, and the filling layer 9 is in close contact with the second bonding surface 6 at the side of the second conductive structure 7, so that the space between the first wafer 1 and the second wafer 5 at the side of the second conductive structure 7 and the first conductive structure 4 is filled up by the filling layer 9, a gap between the first wafer 1 and the second wafer 5 is avoided, and the filling layer 9 can play a better supporting role between the first wafer 1 and the second wafer 5. Therefore, the first wafer 1 and the second wafer 5 can bear larger external pressure, and the first wafer 1 and the second wafer 5 are prevented from deforming to generate fragments.
In a specific embodiment, the process of bonding the first conductive structure 4 and the second conductive structure 7 together includes a thermal compression bonding process, the volume of the first conductive structure 4 is 0% to 10% larger than the volume of the groove 8, the filling layer 9 has certain plasticity before solidification, the material of the first conductive structure 4 is in a molten state after heating, the first conductive structure 4 can just fill the groove 8 or slightly press the groove 8, and the material of the first conductive structure 4 reflows to fill the groove 8 during the bonding process.
By adopting a hot-press bonding process, when the first conductive structure 4 and the second conductive structure 7 are bonded, the material of the first conductive structure 4 and the filling layer 9 are heated at the same time, and in the bonding process, the material of the first conductive structure 4 is heated, so that the groove 8 is filled with the material of the first conductive structure 4 in a backflow mode, and the bonding part of the first conductive structure 4 and the second conductive structure 7 is in gapless connection. By adopting a hot-press bonding process, the filling layer 9 can be heated in the bonding process to perform the function of pre-curing the filling layer 9, and the pre-curing can adhere the first wafer 1 and the second wafer 5 together.
In this embodiment, the parameters of the thermocompression bonding process mainly include: pressure, temperature and time, wherein the pressure setting needs to be determined by combining a specific bonding structure; in order to ensure that the solder layer can be molten and can be reflowed, the temperature is usually set to be higher than 260 ℃; the bonding time is usually 5 minutes to 30 minutes.
In a specific embodiment, the filling layer 9 is cured after bonding the first conductive structure 4 and the second conductive structure 7 together. Specifically, the wafer-level bonding structure is placed in an oven and a reasonable temperature is applied according to the properties of the material of the filling layer 9, for example, the curing temperature is usually 200 ℃ to 300 ℃ for curing for 45 minutes to 75 minutes for low-temperature cured polyimide, and the curing temperature is usually 300 ℃ to 350 ℃ for curing for 45 minutes to 75 minutes for high-temperature cured polyimide.
The solidified wafer-level bonding structure has certain strength, and the stability of the bonding structure is improved.
In this embodiment, the temperature adopted by the thermocompression bonding process is higher than 260 ℃, the temperature adopted for curing the filling layer 9 is 200 ℃, because the thermocompression bonding time is short, the filling layer 9 is not completely cured in the thermocompression bonding process, so that the method has the advantage of precuring the filling layer 9, and the precuring can adhere the first wafer 1 and the second wafer 5 together.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications derived therefrom are intended to be within the scope of the invention.
Claims (8)
1. A wafer level bonding structure, comprising:
the wafer comprises a first wafer and a second wafer, wherein the first wafer is provided with a first bonding surface, and the first bonding surface is provided with a first conductive structure;
the second wafer is provided with a second bonding surface, a second conductive structure is arranged on the second bonding surface, a filling layer is arranged on the second bonding surface, and a groove located on part of the second conductive structure is formed in the filling layer;
the first conductive structure is positioned in the groove and connected with the second conductive structure; at least one of the first conductive structure and the second conductive structure is a solder layer;
the filling layer is in contact with the first bonding surface of the first conductive structure side portion, and the first wafer and the second wafer are hermetically connected through the filling layer.
2. The wafer level bonding structure of claim 1, wherein the second conductive structure is an under ball metal layer; the first conductive structure is a micro-bump, a conductive block, a conductive strip or a conductive loop.
3. The wafer level bonding structure of claim 1, wherein the material of the fill layer comprises a photosensitive polymer material.
4. The wafer level bonding structure of claim 1, wherein the thickness of the filling layer is 5-25 microns.
5. A wafer level bonding method for forming the wafer level bonding structure of any one of claims 1 to 4, comprising the steps of:
providing a first wafer, wherein the first wafer is provided with a first bonding surface, and the first bonding surface is provided with a first conductive structure;
providing a second wafer, wherein the second wafer is provided with a second bonding surface, and a second conductive structure is arranged on the second bonding surface;
forming a filling layer on the second bonding surface, wherein the filling layer is provided with a groove for exposing part of the second conductive structure;
placing the first conductive structure in the groove and bonding the first conductive structure and the second conductive structure together, wherein at least one of the first conductive structure and the second conductive structure is a solder layer; the filling layer is in contact with the first bonding surface on the side of the first conductive structure, and the first wafer and the second wafer are connected in a sealing mode through the filling layer.
6. The wafer level bonding method of claim 5, wherein the process of bonding the first conductive structure and the second conductive structure together comprises a thermal compression bonding process, and during the bonding process, a material of the first conductive structure reflows to fill the groove.
7. The wafer level bonding method of claim 5, wherein the groove width is greater than the first conductive structure width prior to bonding;
the filling layer is made of a plastic material, and before bonding, the difference between the volume of the first conductive structure and the volume of the groove is greater than or equal to 0 and less than or equal to 10% of the volume of the groove.
8. The wafer level bonding method of claim 5, further comprising: curing the fill layer after bonding the first and second conductive structures together.
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| US12040296B2 (en) | 2022-01-12 | 2024-07-16 | Changxin Memory Technologies, Inc. | Semiconductor structure and method for manufacturing semiconductor structure |
| CN116469857A (en) | 2022-01-12 | 2023-07-21 | 长鑫存储技术有限公司 | Semiconductor structure and manufacturing method thereof |
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