CN112099943B

CN112099943B - Memory allocation method and related equipment

Info

Publication number: CN112099943B
Application number: CN202010812913.9A
Authority: CN
Inventors: 文博
Original assignee: Shenzhen Intellifusion Technologies Co Ltd
Current assignee: Shenzhen Intellifusion Technologies Co Ltd
Priority date: 2020-08-13
Filing date: 2020-08-13
Publication date: 2024-05-03
Anticipated expiration: 2040-08-13
Also published as: CN112099943A

Abstract

The application discloses a memory allocation method and related equipment, which are applied to electronic equipment, wherein the method comprises the steps of determining N input layer groups of a target output layer group in a target neural network model, wherein N is a positive integer; based on a first mapping table and the N, distributing the memory storage space in a target memory to a target layer group, recording or updating the occupation information of the memory storage space occupied by the target layer group in the first mapping table, and recording or updating the storage information of the memory storage space occupied by the target layer group in a second mapping table; and determining the offset address of the memory storage space occupied by the target layer group in the target storage based on the second mapping table. By adopting the embodiment of the application, the utilization rate of the memory storage space can be improved.

Description

Memory allocation method and related equipment

Technical Field

The application relates to the technical field of artificial intelligence, in particular to a memory allocation method and related equipment.

Background

The convolutional neural network is a feedforward neural network which comprises convolutional calculation and has a deep structure, is one of representative algorithms of deep learning, and promotes the rapid development of artificial intelligence. Since the convolutional neural network is composed of a plurality of layer groups, the neural network processor is required to sequentially process the plurality of layer groups and sequentially store the obtained data into the memory. However, as the data to be stored increases, there is a resulting decrease in memory available for storage in memory. Therefore, how to increase the utilization of the memory space is a problem to be solved.

Disclosure of Invention

The embodiment of the application provides a memory allocation method and related equipment, which are used for improving the utilization rate of a memory storage space.

In a first aspect, an embodiment of the present application provides a memory allocation method, applied to an electronic device, where the method includes:

determining N input layer groups of a target output layer group in a target neural network model, wherein N is a positive integer;

Based on a first mapping table and the N, allocating memory storage space in a target memory to a target layer group, recording or updating occupied information of the memory storage space occupied by the target layer group in the first mapping table, recording or updating storage information of the memory storage space occupied by the target layer group in a second mapping table, wherein the first mapping table is used for recording occupied information of the memory storage space, the second mapping table is used for recording storage information of the memory storage space, the memory storage space occupied by the target layer group is used for storing output data of the target layer group, and the N input layer groups comprise the target layer group;

and determining the offset address of the memory storage space occupied by the target layer group in the target storage based on the second mapping table.

In a second aspect, an embodiment of the present application provides a memory allocation apparatus, including:

the first determining unit is used for determining N input layer groups of a target output layer group in the target neural network model, wherein N is a positive integer;

The allocation unit is used for allocating the memory storage space in the target memory to a target layer group based on a first mapping table and the N, and the N input layer groups comprise the target layer group;

The processing unit is used for recording or updating the occupation information of the memory storage space occupied by the target layer group in the first mapping table, and recording or updating the storage information of the memory storage space occupied by the target layer group in the second mapping table, wherein the first mapping table is used for recording the occupation information of the memory storage space, the second mapping table is used for recording the storage information of the memory storage space, and the memory storage space occupied by the target layer group is used for storing the output data of the target layer group;

And the second determining unit is used for determining the offset address of the memory storage space occupied by the target layer group in the target storage based on the second mapping table.

In a third aspect, an embodiment of the present application provides an electronic device, including a processor, a memory, a communication interface, and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the processor, and the programs include instructions for performing steps in the method according to the first aspect of the embodiment of the present application.

In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, where the computer-readable storage medium stores a computer program for electronic data exchange, where the computer program causes a computer to perform some or all of the steps described in the method according to the first aspect of the embodiment of the present application.

In a fifth aspect, embodiments of the present application provide a computer program product, wherein the computer program product comprises a non-transitory computer readable storage medium storing a computer program, the computer program being operable to cause a computer to perform some or all of the steps described in the method according to the first aspect of the embodiments of the present application. The computer program product may be a software installation package.

It can be seen that, in the embodiment of the present application, the electronic device first determines N input layer groups of the target output layer group in the target neural network model, then allocates the memory storage space in the target memory to the target layer group based on the first mapping table and N, records or updates the occupation information of the memory storage space occupied by the target layer group in the first mapping table, records or updates the storage information of the memory storage space occupied by the target layer group in the second mapping table, and finally determines the offset address of the memory storage space occupied by the target layer group in the target memory based on the second mapping table. The electronic equipment allocates reasonable memory storage space for the target layer group according to the first mapping table and N, and does not allocate the memory storage space randomly, so that the utilization rate of the memory storage space is improved.

Drawings

In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are required in the embodiments or the description of the prior art will be briefly described, it being obvious that the drawings in the following description are only some embodiments of the application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

Fig. 1 is a flow chart of a memory allocation method according to an embodiment of the present application;

fig. 2 is a schematic structural diagram of a layer group according to an embodiment of the present application;

FIG. 3 is a schematic structural diagram of another electronic device according to an embodiment of the present application;

Fig. 4 is a schematic structural diagram of a memory allocation device according to an embodiment of the present application.

Detailed Description

In order that those skilled in the art will better understand the present application, a technical solution in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, shall fall within the scope of the present application.

The following will describe in detail.

The terms "first," "second," "third," and "fourth" and the like in the description and in the claims and drawings are used for distinguishing between different objects and not necessarily for describing a particular sequential or chronological order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.

Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.

In the following, some terms used in the present application are explained for easy understanding by those skilled in the art.

The electronic devices may include various handheld devices, vehicle mounted devices, wearable devices, computing devices, or other processing devices connected to a wireless modem, as well as various forms of User Equipment (UE), mobile Station (MS), terminal devices (TERMINAL DEVICE), and the like.

Embodiments of the present application are described in detail below.

Referring to fig. 1, fig. 1 is a flow chart of a memory allocation method according to an embodiment of the present application, including the following steps:

step 101: and determining N input layer groups of a target output layer group in the target neural network model, wherein N is a positive integer.

The layer group can be composed of a plurality of layers, the layers in the layer group exchange data through a local memory of the processor, the layer group can also be provided with an aggregation attribute and only comprises one layer, and the layer group provided with the aggregation attribute is provided with a plurality of input layer groups.

As shown in fig. 2, which is a schematic structural diagram of the layer group, m and n in fig. 2 are both positive integers. In fig. 2, group 0, group 1, group 2, and group 3 are groups of layers including at least one layer, and group 3 is a group of layers having a convergence property.

In fig. 2, the target output group may be group 0, group 1, group 2, or group 3.

If the target output layer group can be the layer group 1, the input layer group of the target output layer group is the layer group 0; if the target output layer group can be the layer group 2, the input layer group of the target output layer group is the layer group 1; if the target output layer group can be the layer group 3, the input layer group of the target output layer group is the layer group 0 and the layer group 2.

The Data exchange is performed between the layer groups through Double Data Rate synchronous dynamic random access memory (Double Data Rate, DDR).

The target output layer group may be a layer group having a convergence property, or may be a layer group formed by a plurality of layers.

Step 102: based on a first mapping table and the N, the memory storage space in the target memory is allocated to a target layer group, the occupation information of the memory storage space occupied by the target layer group is recorded or updated in the first mapping table, the storage information of the memory storage space occupied by the target layer group is recorded or updated in a second mapping table, the first mapping table is used for recording the occupation information of the memory storage space, the second mapping table is used for recording the storage information of the memory storage space, the memory storage space occupied by the target layer group is used for storing the output data of the target layer group, and the N input layer groups comprise the target layer group.

The target layer group is an input layer group of the target output layer group, and the target layer group is an upper layer group of the target output layer group.

Wherein, in the case where N is 1, the target group of layers is the only input group of the target output group of layers.

The target memory may be a Double Data Rate synchronous dynamic random access memory (DDR) or other memories.

The first mapping table may record a plurality of pieces of occupancy information, and the second mapping table may record a plurality of pieces of storage information.

Each piece of occupied information corresponds to one piece of storage information, and the corresponding occupied information and the corresponding storage information correspond to the same memory storage space.

The storage information comprises an identification of a memory storage space and a capacity of the memory storage space.

Wherein updating the storage information means updating or maintaining the memory storage space capacity in the storage information.

The capacity of the memory storage space in the storage information is the output data quantity of the layer group currently occupying the memory storage space, or the output data quantity of the layer group occupying the memory storage space before the memory storage space is not released.

When the built-up memory storage space is occupied, the occupied information comprises a memory storage space identifier and a group identifier of the occupied memory storage space, and when the built-up memory storage space is unoccupied, the occupied information comprises the memory storage space identifier.

For example, if there are 2 memory storage spaces (BUF 1 and BUF 2) in the target memory, BUF1 corresponds to occupancy information 1, BUF2 corresponds to occupancy information 2, BUF1 corresponds to storage information 1, and BUF2 corresponds to storage information 2. Since BUF1 is occupied by the group of layers L1, BUF2 is unoccupied, and the output data amount of L1 is a, the occupancy information 1 includes BUF1 and L1, the occupancy information 2 includes BUF2, the storage information 1 includes BUF1 and capacity a of BUF1, and the storage information 2 includes BUF2 and capacity B, wherein capacity B is the output data amount of the group of layers occupying BUF2 before BUF2 is not released.

The target neural network model is composed of a plurality of layer groups, the processing of the electronic equipment on the layer groups in the target neural network model is from top to bottom, the first mapping table and the second mapping table are different along with the difference of the layer groups processed currently, occupied information in the first mapping table can be changed, and storage information in the second mapping table can be changed.

The target layer group records or updates the occupation information in the first mapping table according to the occupation information in the first mapping table corresponding to the input layer group.

The memory storage space allocated to the target layer group can be newly built, or can be an unoccupied memory storage space established in the target memory.

If the allocated memory storage space is newly created, recording the occupation information of the memory storage space occupied by the target layer group in a first mapping table; if the allocated memory storage space is already present, the occupation information of the memory storage space occupied by the target layer group is updated in the first mapping table.

After the processor processes all the target output layer groups corresponding to the input layer groups, the memory storage space occupied by the input layer groups is released, and the input layer group identifier in the occupation information corresponding to the input layer groups in the first mapping table is cleared.

For example, if there are 4 groups of layers (L1, L2, L3, and L4), where L1 is an input group of L2, L2 is a unique input group of L3, L1 and L3 are input groups of L4, when the processor processes to L1, the memory storage space occupied by L1 is BUF1, and the occupancy information 1 of BUF1 recorded in the first mapping table includes BUF1 and L1; when the L2 is processed, the memory storage space occupied by the L2 is BUF2, and the occupation information 2 of the BUF2 recorded in the first mapping table comprises BUF2 and L2; when L3 is processed, L3 and L1 are used as an input layer group of L4 together, so that the memory storage space occupied by L3 is BUF1, the occupation information 1 of BUF1 recorded in the first mapping table comprises BUF1, L1 and L3, in addition, the BUF2 is released as a unique input layer group L2 of L3, and L2 in the occupation information 2 is cleared; after processing L4, since all output packets corresponding to L1 are processed, output packets corresponding to L3 are processed, BUF1 is released, and L1 and L3 in occupancy information 1 are cleared, i.e., BUF1 is unoccupied.

For the first mapping table, different groups of layers may correspond to the same occupancy information, or different groups of layers may correspond to different occupancy information.

For the second mapping table, different groups of layers may correspond to the same storage information, or different groups of layers may correspond to different storage information.

If the current layer group is a layer group with convergence, the hardware does not need to do any operation, and the memory management realizes the convergence function, so that the occupied information in the first mapping table and the storage information in the second mapping table remain unchanged.

If the current layer group is not a layer group with convergence, when the output layer group of the current layer group is processed, the occupation information in the first mapping table corresponding to the current layer group and the occupation information in the first mapping table corresponding to the input layer group of the current layer group may be the same or different; the stored information in the second mapping table corresponding to the current layer group may be the same as or different from the stored information in the second mapping table corresponding to the input layer group of the current layer group.

For example, there are 3 groups of layers (L1, L2, and L3), L1 is an input group of L2, L1 and L2 are input groups of L3, and L2 is a current group, so when processing L3, the occupancy information corresponding to L1 is the same as the occupancy information corresponding to L2, and the storage information corresponding to L1 is the same as the occupancy storage information corresponding to L2.

Wherein the target group of layers is not a group of layers having convergence.

Step 103: and determining the offset address of the memory storage space occupied by the target layer group in the target storage based on the second mapping table.

In an implementation manner of the present application, the allocating, based on the first mapping table and the N, a memory storage space in a target memory to the target layer group includes:

When N is greater than 1, the first mapping table includes first occupation information of a first memory storage space, the first memory storage space is occupied by a first input layer group, and the N input layer groups include the first input layer group, the first memory storage space is allocated to the target layer group;

The updating the occupying information of the memory storage space occupied by the target layer group in the first mapping table, and the updating the storing information of the memory storage space occupied by the target layer group in the second mapping table comprises the following steps:

In the first mapping table, updating a group identifier included in the first occupation information into a first group identifier, wherein the first group identifier includes an identifier of the first input group and an identifier of the target group;

And in the second mapping table, updating the capacity included in the first storage information of the first memory storage space to a first capacity, wherein the first capacity is the sum of the output data quantity of the first input layer group and the output data quantity of the target layer group.

The output data of the target layer group and the output data of the first input layer group are stored in the first memory at the same time, and if the target layer group is input into the target output layer group before the first input layer group, the output data of the target layer group is stored before the output data of the first input layer; if the target layer group is input into the target output layer group after the first input layer group, the output data of the target layer group is stored after the output data of the first input layer.

After the target output layer group of the target layer group is processed, the memory storage space occupied by the target layer group is released, and the identifier of the target layer group included in the occupancy information in the first mapping table is cleared.

For example, the input layer group of the target output layer group has 2 (layer group L1 and layer group L2), wherein the memory storage space BUF1 has been allocated for L1, the output data amount of L1 is a, and layer group L2 is the target layer group, so the first occupancy information in the first mapping table includes L1 and BUF1, and the first storage information in the second mapping table includes BUF1 and the capacity a of BUF1. Since L1 and L2 are both input groups of the target input group and BUF1 has been allocated for L1, BUF1 is allocated to L2 and the first occupancy information is updated to L1, L2 and BUF1. Also, since the output data amount of L2 is B, the capacity of BUF 1in the first stored information is updated to a+b.

It can be seen that, in the embodiment of the present application, output data of a plurality of input layer groups of a target output layer group are stored in the same memory storage space, and the capacity of the memory storage space is adjusted according to the output data of the plurality of input layer groups, so that not only is the requirement of the output layer group on the memory storage space ensured, but also the utilization rate of the memory storage space is improved.

Establishing a second memory storage space in the target memory and allocating the second memory storage space to the target layer group under the condition that the first mapping table is empty;

The recording, in the first mapping table, the occupation information of the memory storage space occupied by the target layer group, and recording, in the second mapping table, the storage information of the memory storage space occupied by the target layer group, includes:

recording second occupation information of the second memory storage space in the second mapping table; and recording second storage information of the second memory storage space in the second mapping table, wherein the second storage information comprises a second capacity of the second memory storage space, and the second capacity is the output data quantity of the target layer group.

The second occupation information comprises an identifier of the target layer group and an identifier of the second memory storage space.

Wherein the first mapping table being empty indicates that memory storage space in the target memory has not been allocated to a group of layers in the target neural network model.

The second storage information further comprises an identifier of the second memory storage space.

After the target output layer group of the target layer group is processed, the memory storage space occupied by the target layer group is released, and the identifier of the target layer group included in the second occupation information is cleared.

It can be seen that, in the embodiment of the present application, when the first mapping table is empty, the second memory storage space is established in the target memory, which is favorable for improving the rate of establishing the memory storage space.

under the condition that the first mapping table is not empty, sequentially reading the occupation information of the memory storage space in the first mapping table according to a preset reading rule;

When a third memory storage space corresponding to the read third occupation information is unoccupied and a third capacity of the third memory storage space is larger than or equal to an output data amount of the target group of layers, distributing the third memory storage space to the target group of layers, and stopping the reading operation of the occupation information;

Defining the fourth memory storage space as a candidate memory storage space and continuing to read the occupation information under the condition that the fourth memory storage space corresponding to the read fourth occupation information is unoccupied and the fourth capacity of the fourth memory storage space is smaller than the output data quantity of the target layer group;

After all the occupied information is read, a fifth memory storage space is allocated to the target layer group under the conditions that the third occupied information is not recorded in the first mapping table and the fourth occupied information is recorded in the first mapping table, and the fifth memory storage space is the memory storage space with the largest capacity in the candidate memory storage spaces.

The preset reading rule may be to sequentially read the occupancy information in the first mapping table from top to bottom, or to sequentially read the occupancy information in the first mapping table from bottom to top, or in other reading manners.

For example, the target memory includes 3 memory storage spaces (BUF 1, BUF2 and BUF 3), BUF1 is occupied by layer group L1, BUF2 is unoccupied, BUF3 is unoccupied, BUF1 has a capacity of C1, BUF2 has a capacity of C2, BUF3 has a capacity of C3, and thus the current first mapping table includes 3 occupancy information (occupancy information 1, occupancy information 2 and occupancy information 3), wherein occupancy information 1 includes BUF1 and L1, occupancy information 2 includes BUF2, occupancy information 3 includes BUF3, the second mapping table includes 3 storage information (storage information 1, storage information 2 and storage information 3), wherein storage information 1 includes BUF1 and C1, storage information 2 includes BUF2 and C2, and storage information 3 includes BUF3 and C3. Assuming that the output data quantity of the target layer group is D, D is larger than C2 and smaller than C3, the electronic equipment reads the occupation information 1, the occupation information 2 and the occupation information 3 in the first mapping table at a time in a top-to-bottom mode. Firstly, the electronic device reads the occupancy information 1 to determine that the BUF1 is occupied, so that the occupancy information 2 is read downwards. Since BUF2 in the occupancy information 2 is unoccupied, the capacity of BUF2 in the storage information 2 corresponding to the occupancy information 2 is C2, C2 is smaller than D, and thus BUF2 is defined as a candidate storage space, and then the occupancy information 3 is continuously read. Since BUF3 in the occupancy information 3 is unoccupied, the capacity of BUF3 in the storage information 3 corresponding to the occupancy information 3 is C3, C3 is greater than D, and thus BUF3 is allocated to the target group of layers.

It can be seen that, in the embodiment of the present application, under the condition that the first mapping table is not empty, the occupation information of the memory storage space in the first mapping table is sequentially read according to a preset reading rule, the unoccupied storage space is determined, and the occupied memory storage space is allocated to the target group of layers, so that the utilization rate of the memory storage space is improved.

In an implementation manner of the present application, the recording, in the first mapping table, the occupation information of the memory storage space occupied by the target layer group includes:

If the memory storage space allocated to the target layer group is the third memory storage space, recording the identification of the target layer group in third occupation information of the third memory storage space in the first mapping table;

If the memory storage space allocated to the target layer group is the fifth memory storage space, recording the identification of the target layer group in fourth occupation information of the fifth memory storage space in the first mapping table;

The updating the storage information of the memory storage space occupied by the target layer group in the second mapping table includes:

If the memory storage space allocated to the target layer group is the third memory storage space, maintaining third storage information of the third memory storage space recorded in the second mapping table;

And if the memory storage space allocated to the target layer group is the fifth memory storage space, updating the capacity included in the fourth storage information recorded in the second mapping table to a third capacity, wherein the fourth storage information is the storage information of the fifth memory storage space, and the third capacity is the output data volume of the target layer group.

It can be seen that, in the embodiment of the present application, when the capacity of the memory storage space allocated to the target layer group is greater than the data output of the target layer group, the capacity of the memory storage space allocated to the target layer group in the second mapping table is maintained, which is beneficial to reducing the capacity requirement of the storage space.

In an implementation of the present application, the method further includes:

After all the occupation information is read, under the condition that the third occupation information is not recorded in the first mapping table and the fourth occupation information is not recorded in the first mapping table, a sixth memory storage space is built in the target memory, and the sixth memory storage space is distributed to the target layer group.

Under the condition that the memory storage space in the target memory is fully occupied, the newly built memory storage space in the target memory is distributed to the target layer group.

For example, the target memory includes 3 memory storage spaces (BUF 1, BUF2 and BUF 3), BUF1 is occupied by layer group L1, BUF2 is occupied by layer group L2, and BUF3 is occupied by layer group L3, so that the current first mapping table includes 3 pieces of occupancy information (occupancy information 1, occupancy information 2 and occupancy information 3), occupancy information 1 includes BUF1 and L1, occupancy information 2 includes BUF2 and L2, and occupancy information 3 includes BUF3 and L3. Assume that the electronic device reads the occupancy information 1, the occupancy information 2, and the occupancy information 3 in the first mapping table from top to bottom at a time. Firstly, the electronic device reads the occupancy information 1 to determine that the BUF1 is occupied by L1, so that the occupancy information 2 is read downwards. Reading the occupancy information 2 determines that BUF2 is occupied by L2, and thus the occupancy information 3 is read down. Reading the occupancy information 3 determines that BUF3 is occupied by L3, and therefore a new memory storage space is created in the target memory and allocated to the target layer group.

In one possible implementation manner, after the sixth memory storage space is allocated to the target layer group, the method further includes:

Recording fifth occupation information of the sixth memory storage space in the first mapping table, and recording seventh storage information of the sixth memory storage space in the second mapping table, wherein the fifth occupation information comprises an identifier of the sixth memory space and an identifier of the target group of layers, the seventh storage information comprises a fifth capacity of the sixth memory storage space, and the fifth capacity is an output data amount of the target group of layers.

The seventh storage information further comprises an identification of a sixth storage space, and the identification of the sixth storage space is determined based on the identification of the established storage space.

After the target output layer group of the target layer group is processed, the memory storage space occupied by the target layer group is released, and the identifier of the target layer group included in the fifth occupation information is cleared.

It can be seen that, in the embodiment of the present application, when the second occupation information is not recorded in the first mapping table and the third occupation information is not recorded in the first mapping table, a sixth memory storage space is established in the target memory, and the sixth memory storage space is allocated to the target group of layers, which indicates that the memory storage spaces in the target memory are effectively utilized, which is beneficial to improving the reliability of establishing the memory storage space in the target memory by the electronic device.

In an implementation manner of the present application, the storage information recorded in the second mapping table further includes an identifier of a memory storage space, where the identifier of the memory storage space is represented in a numerical form; the determining, based on the second mapping table, an offset address of a memory storage space occupied by the target layer group in the target memory includes:

When the second mapping table includes fifth storage information, and the identifier included in the fifth storage information is larger than the identifier of the memory storage space occupied by the target layer group, determining a sixth capacity of the fifth storage information and determining that the storage information identified by the fifth storage information as the smallest storage information is the sixth storage information;

determining a first offset address of a memory storage space corresponding to the identifier in the sixth storage information in the target memory based on the sixth storage information;

And determining an offset address of the memory storage space occupied by the target layer group in the target memory based on the first offset address, the first offset and a second offset of the target layer group in the occupied memory storage space, wherein the length of the first offset is the sixth capacity, and the length of the second offset is determined based on an input layer group outside the target layer group in the N input layer groups.

The identification of the memory storage space is represented in a numerical form, and the identification of each memory storage space is different.

The identification of the memory storage space is represented in a numerical form, the identification of the memory storage space can be determined in an equal ratio form or in an equal difference form, the size of the identification of each memory storage space is related to the establishment time of the memory storage space, and the later the time of establishing the memory storage space is, the larger the corresponding identification is.

For example, the identity of the memory storage space is determined according to the form of an arithmetic difference, and the difference is 1. Assuming that the first established memory storage space has an identifier of 0, the second established memory storage space has an identifier of 1, and the third established memory storage space has an identifier of 2.

In one possible implementation, the length of the second offset is determined based on an input group of layers other than the target group of layers of the N input group of layers, including:

If the N is equal to 1, the second offset is zero;

If N is greater than 1 and the target group of layers inputs the target output group of layers after a second input group of layers, the second offset is an output data amount of the second input group of layers, and the N input group of layers includes the second input group of layers;

and if the N is greater than 1 and the target output layer group is input before the target layer group is arranged in the second input layer group, the second offset is zero.

For example, assuming that N is equal to 1, the target storage space includes 3 memory storage spaces (BUF 0, BUF1, and BUF 2), the group occupying BUF0 is the group L0, the capacity of BUF0 is the output a of the group L0, the group occupying BUF1 is the group L1, the capacity of BUF1 is the output B of the group L1, the group occupying BUF2 is the target group L2, the capacity of BUF2 is the output C of the target group L2, the identification of BUF0 is 0, the identification of BUF1 is 1, and the identification of BUF2 is 2, and thus the second map includes the storage information of (0, a), (1, B), and (2, C). Because the identifications of the storage information corresponding to BUF0 and BUF1 are smaller than the identification of the storage information corresponding to BUF2, the fifth storage information is determined to be (0, A) and (1, B), the sixth storage information is determined to be (0, A), the first offset address of the layer group L0 in the target memory is zero, the first offset is A+B, and the offset address of the target layer group in the target memory is 0+A+B.

For example, assuming that N is greater than 1, the target storage space includes 3 memory storage spaces (BUF 0, BUF1, and BUF 2), the group occupying BUF0 is the group L0, the capacity of BUF0 is the output a of the group L0, the group occupying BUF1 is the group L1, the capacity of BUF1 is the output B of the target group, the group occupying BUF2 is the sum of the target group L2 and the group L3, the capacity of BUF2 is the sum of the output C of the target group L2 and the output data D of the group L3, the identifier of BUF0 is 0, the identifier of BUF1 is 1, and the identifier of BUF2 is 2, and thus the second map includes the stored information of (0, a), (1, B), and (2, c+d). Since the identifications of the storage information corresponding to BUF0 and BUF1 are smaller than the identification of the storage information corresponding to BUF2, the fifth storage information is determined to be (0, A) and (1, B), and the sixth storage information is determined to be (0, A). If the output data of the target layer group L2 in the BUF2 is before the layer group L3, the second offset is zero, the first offset address of the layer group L0 in the target memory is zero, the first offset is a+b, the second offset is 0, the offset address of the target layer group in the target memory is 0+a+b, if the output data of the target layer group L2 in the BUF2 is after the layer group L3, the first offset is a+b, the second offset is D, the first offset address of the layer group L0 in the target memory is zero, and the offset address of the target layer group in the target memory is 0+a+b+d.

In one possible implementation manner, under the condition that the second mapping table only includes storage information corresponding to a memory storage space occupied by a target layer group, an offset address of the target layer group in the target memory is zero.

It can be seen that, in the embodiment of the present application, the extraction of the output data of the target layer group by the electronic device is facilitated by determining the offset address of the target layer group in the target memory.

Referring to fig. 3, in accordance with the embodiment shown in fig. 1, fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application, as shown in the fig. 3, the electronic device includes a processor, a memory, a communication interface, and one or more programs, where the one or more programs are stored in the memory and configured to be executed by the processor, and the programs include instructions for executing the following steps:

In an implementation manner of the present application, in allocating a memory storage space in a target memory to the target layer group based on the first mapping table and the N, the program includes instructions specifically configured to: when N is greater than 1, the first mapping table includes first occupation information of a first memory storage space, and the first memory storage space is occupied by a first input layer group and the N input layer groups include the first input layer group, the first memory storage space is allocated to the target layer group;

The method comprises the steps of updating the occupation information of the memory storage space occupied by the target layer group in the first mapping table, and updating the storage information of the memory storage space occupied by the target layer group in the second mapping table, wherein the program comprises the following specific instructions for executing the following steps:

In an implementation manner of the present application, in allocating a memory storage space in a target memory to the target layer group based on the first mapping table and the N, the program includes instructions specifically configured to:

The method comprises the steps of recording the occupation information of the memory storage space occupied by the target layer group in the first mapping table, and recording the storage information of the memory storage space occupied by the target layer group in the second mapping table, wherein the program comprises the following specific instructions:

Recording second occupation information of the second memory storage space in the second mapping table;

and recording second storage information of the second memory storage space in the second mapping table, wherein the second storage information comprises a second capacity of the second memory storage space, and the second capacity is the output data quantity of the target layer group.

In an implementation manner of the present application, in recording the occupation information of the memory storage space occupied by the target layer group in the first mapping table, the above program includes instructions specifically configured to execute the following steps:

in the aspect of updating the storage information of the memory storage space occupied by the target layer group in the second mapping table, the program comprises instructions specifically for executing the following steps:

In an implementation manner of the present application, the program includes instructions specifically configured to perform the following steps:

In an implementation manner of the present application, the storage information recorded in the second mapping table further includes an identifier of a memory storage space, where the identifier of the memory storage space is represented in a numerical form; in determining an offset address of a memory storage space occupied by the target layer group in the target memory based on the second mapping table, the program includes instructions specifically configured to:

Referring to fig. 4, fig. 4 is a memory allocation device provided in an embodiment of the present application, applied to an electronic apparatus, where the device includes:

A first determining unit 401, configured to determine N input layer groups of a target output layer group in a target neural network model, where N is a positive integer;

An allocation unit 402, configured to allocate, based on the first mapping table and the N, memory storage spaces in a target storage to a target group of layers, where the N input group of layers includes the target group of layers;

A processing unit 403, configured to record or update, in the first mapping table, occupancy information of a memory storage space occupied by the target layer group, and record or update, in a second mapping table, storage information of a memory storage space occupied by the target layer group, where the first mapping table is used to record occupancy information of a memory storage space, the second mapping table is used to record storage information of a memory storage space, and the memory storage space occupied by the target layer group is used to store output data of the target layer group;

A second determining unit 404, configured to determine, based on the second mapping table, an offset address of a memory storage space occupied by the target layer group in the target memory.

In an implementation manner of the present application, in allocating a memory storage space in a target memory to the target layer group based on the first mapping table and the N, the allocating unit 402 is specifically configured to execute the following steps of:

when N is greater than 1, the first mapping table includes first occupation information of a first memory storage space, and the first memory storage space is occupied by a first input layer group and the N input layer groups include the first input layer group, the first memory storage space is allocated to the target layer group;

The processing unit 403 is specifically configured to execute the following instructions in the aspect of updating, in the first mapping table, the occupancy information of the memory storage space occupied by the target layer group, and updating, in the second mapping table, the storage information of the memory storage space occupied by the target layer group:

In an implementation manner of the present application, in allocating a memory storage space in a target memory to the target layer group based on the first mapping table and the N, the allocation unit 402 is configured to execute the following instructions:

The processing unit 403 is specifically configured to execute the following instructions in terms of recording, in the first mapping table, the occupation information of the memory storage space occupied by the target layer group, and recording, in the second mapping table, the storage information of the memory storage space occupied by the target layer group:

In an implementation manner of the present application, in recording the occupation information of the memory storage space occupied by the target layer group in the first mapping table, the processing unit 403 is specifically configured to execute the following steps:

In the aspect of updating the storage information of the memory storage space occupied by the target layer group in the second mapping table, the processing unit 403 is specifically configured to execute the following steps of:

In an implementation manner of the present application, the allocation unit 402 is specifically further configured to execute the following steps:

In an implementation manner of the present application, the storage information recorded in the second mapping table further includes an identifier of a memory storage space, where the identifier of the memory storage space is represented in a numerical form; in determining, based on the second mapping table, an offset address of a memory storage space occupied by the target layer group in the target memory, the second determining unit 404 is specifically configured to execute the following steps:

The embodiment of the application also provides a computer readable storage medium, wherein the computer readable storage medium stores a computer program for electronic data exchange, and the computer program causes a computer to execute part or all of the steps described by the terminal device in the embodiment of the method.

Embodiments of the present application also provide a computer program product, wherein the computer program product comprises a non-transitory computer readable storage medium storing a computer program operable to cause a computer to perform some or all of the steps described by a terminal device in a method as described above. The computer program product may be a software installation package.

The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied in hardware, or may be embodied in software instructions executed by a processor. The software instructions may be comprised of corresponding software modules that may be stored in random access Memory (Random Access Memory, RAM), flash Memory, read Only Memory (ROM), erasable programmable Read Only Memory (Erasable Programmable ROM), electrically Erasable Programmable Read Only Memory (EEPROM), registers, hard disk, a removable disk, a compact disk Read Only Memory (CD-ROM), or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. In addition, the ASIC may reside in an access network device, a target network device, or a core network device. It is of course also possible that the processor and the storage medium reside as discrete components in an access network device, a target network device, or a core network device.

Those skilled in the art will appreciate that in one or more of the examples described above, the functions described in the embodiments of the present application may be implemented, in whole or in part, in software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When loaded and executed on a computer, produces a flow or function in accordance with embodiments of the present application, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a computer network, or other programmable apparatus. The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by a wired (e.g., coaxial cable, fiber optic, digital subscriber line (Digital Subscriber Line, DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer readable storage medium may be any available medium that can be accessed by a computer or a data storage device such as a server, data center, etc. that contains an integration of one or more available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., digital video disc (Digital Video Disc, DVD)), or a semiconductor medium (e.g., solid state disk (Solid STATE DISK, SSD)), etc.

The foregoing detailed description of the embodiments of the present application further illustrates the purposes, technical solutions and advantageous effects of the embodiments of the present application, and it should be understood that the foregoing description is only a specific implementation of the embodiments of the present application, and is not intended to limit the scope of the embodiments of the present application, and any modifications, equivalent substitutions, improvements, etc. made on the basis of the technical solutions of the embodiments of the present application should be included in the scope of the embodiments of the present application.

Claims

1. The memory allocation method is characterized by being applied to electronic equipment, and comprises the following steps:

Determining an offset address of a memory storage space occupied by the target layer group in the target storage based on the second mapping table;

The storage information recorded in the second mapping table also comprises the identification of the memory storage space, and the identification of the memory storage space is expressed in the form of a numerical value; the determining, based on the second mapping table, an offset address of a memory storage space occupied by the target layer group in the target memory includes:

When the second mapping table includes fifth storage information, and the identifier included in the fifth storage information is smaller than the identifier of the memory storage space occupied by the target layer group, determining a sixth capacity of the fifth storage information, and determining that the storage information with the smallest identifier in the fifth storage information is the sixth storage information;

determining a first offset address of a memory storage space corresponding to the sixth storage information in the target memory based on the sixth storage information;

2. The method of claim 1, wherein allocating memory storage space in a target memory to the target group of layers based on the first mapping table and the N comprises:

in the first mapping table, updating a group identifier included in the first occupation information into a first group identifier, wherein the first group identifier includes an identifier of the first input group and an identifier of the target group; and in the second mapping table, updating the capacity included in the first storage information of the first memory storage space to a first capacity, wherein the first capacity is the sum of the output data quantity of the first input layer group and the output data quantity of the target layer group.

3. The method of claim 1, wherein allocating memory storage space in a target memory to the target group of layers based on the first mapping table and the N comprises:

Recording second occupation information of the second memory storage space in the first mapping table;

4. The method of claim 1, wherein allocating memory storage space in a target memory to the target group of layers based on the first mapping table and the N comprises:

5. The method of claim 4, wherein the recording, in the first mapping table, the occupancy information of the memory storage space occupied by the target layer group includes:

6. The method according to claim 4 or 5, characterized in that the method further comprises:

7. A memory allocation apparatus, for use in an electronic device, the apparatus comprising:

The second determining unit is used for determining offset addresses of the memory storage space occupied by the target layer group in the target storage based on the second mapping table;

the storage information recorded in the second mapping table also comprises the identification of the memory storage space, and the identification of the memory storage space is expressed in the form of a numerical value; the second determining unit is specifically configured to determine, when the second mapping table includes fifth storage information, where the fifth storage information includes an identifier that is smaller than an identifier of a memory storage space occupied by the target layer group, a sixth capacity of the fifth storage information, and determine that storage information identified as the fifth storage information that is the smallest is the sixth storage information; determining a first offset address of a memory storage space corresponding to the sixth storage information in the target memory based on the sixth storage information; and determining an offset address of the memory storage space occupied by the target layer group in the target memory based on the first offset address, the first offset amount and a second offset amount of the target layer group in the occupied memory storage space, wherein the length of the first offset amount is the sixth capacity, and the length of the second offset amount is determined based on an input layer group outside the target layer group in the N input layer groups.

8. An electronic device comprising a processor, a memory, a communication interface, and one or more programs stored in the memory and configured to be executed by the processor, the one or more programs comprising instructions for performing the steps of the method of any of claims 1-6.

9. A computer readable storage medium, characterized in that the computer readable storage medium stores a computer program, wherein the computer program causes a computer to perform the method according to any one of claims 1-6.