WO2017198070A1

WO2017198070A1 - Multi-channel data memory and access method and apparatus therefor, and storage medium

Info

Publication number: WO2017198070A1
Application number: PCT/CN2017/082778
Authority: WO
Inventors: 肖飞育; 高崇兴
Original assignee: 深圳市中兴微电子技术有限公司
Priority date: 2016-05-16
Filing date: 2017-05-02
Publication date: 2017-11-23
Also published as: CN107391023A; CN107391023B

Abstract

Disclosed are a multi-channel data memory and an access method and apparatus therefor, and a storage medium. The method comprises: determining a first data block to be stored, the first data block being a data block received by a first channel; determining first storage information about a random access memory (RAM) of a multi-channel data memory, the multi-channel data memory at least comprising the first channel, a second channel and the RAM shared by the first channel and the second channel; according to the first storage information, allocating a first storage space to the first data block on the RAM; and writing the first data block into the first storage space.

Description

Multi-channel data memory, access method and device thereof, and storage medium

Cross-reference to related applications

The present application is filed on the basis of the Chinese Patent Application No. PCT Application No.

Technical field

The present invention relates to a memory technology, and in particular, to a multi-channel data memory, an access method and apparatus thereof, and a storage medium.

Background technique

An IC (Integrated Circuit) is a miniature electronic device or component. An integrated circuit is formed by interconnecting components, such as transistors, resistors, capacitors, and inductors, which are required in a circuit, on a small or small piece of semiconductor wafer or dielectric substrate, and then packaged in a certain process. Inside a package, it becomes a micro-structure with the required circuit function, realizing the single-chip of the circuit. The integrated circuit is the core of microelectronics technology, and has the advantages of small size, light weight, less lead wire and solder joints, long life, high reliability, good performance, etc., and low cost, which is convenient for mass production. It has been widely used not only in industrial and civil electronic equipment such as tape recorders, televisions, computers, etc., but also in military, communication, remote control and other aspects. The use of integrated circuits to assemble electronic devices has an assembly density that can be increased by several tens to several thousand times compared to transistors, and the stable operating time of the device can be greatly improved.

After 40 years of development, integrated circuits have now entered the deep submicron stage. Due to the development of microelectronics itself and the demand of the information market, various process integration technologies and application-oriented SOC (System On Chip) are mainly characterized by microfabrication (the feature size of integrated circuits is continuously reduced). Level chip) came into being. A complex electronic system can be realized on a single integrated circuit chip such as a digital television chip or a mobile phone chip.

IC design is a discipline in electrical engineering and computer engineering. IC design includes digital IC design and analog IC design. In digital IC design, there are often multiple storage requirements for similar or repetitive channels. For example, in a DVB (Digital Video Broadcasting) system, there are multiple PID (Packet Identifier) channels that need to store information such as audio, video, subtitles, and control information.

Since the storage space of these channels is often not occupied at the same time, each channel has independent storage space, which requires a large amount of RAM, resulting in a large area occupied by the chip and high power consumption. The present application proposes a method and apparatus for accessing a multi-channel data memory for this defect.

Summary of the invention

Embodiments of the present invention provide a multi-channel data memory and an access method and apparatus thereof, which can reduce the occupied area and power consumption of the chip.

To achieve the above objective, the technical solution of the embodiment of the present invention is implemented as follows:

In one aspect, an embodiment of the present invention provides a method for accessing a multi-channel data storage, the method comprising:

Determining a first data block to be stored, the first data block being a data block received by the first channel;

Determining first storage information of the random access memory RAM of the multi-channel data memory, the multi-channel data memory comprising at least a first channel, a second channel, and a RAM shared by the first channel and the second channel;

Allocating a first storage space for the first data block on the RAM according to the first storage information;

Writing the first data block into the first storage space.

In another aspect, an embodiment of the present invention provides a method for accessing a multi-channel data storage, where the method includes:

Receiving a read data request issued by the program, where the read data request includes: a channel number where the target data is to be read, and location information of the target data;

Determining identification information of the address memory according to the channel number where the target data is located;

Obtaining a mapping relationship table from the corresponding address memory according to the identifier information of the address memory;

Finding the mapping relationship table according to the location information of the target data, and obtaining an address of the target data;

Reading target data from the RAM of the multi-channel data memory according to an address of the target data, wherein the RAM stores data of channels other than data from a channel in which the target data is located, the other The channel is different from the channel where the target data to be read is located.

In still another aspect, an embodiment of the present invention provides a write controller, where the write controller includes:

a first determining unit, configured to determine a first data block to be stored, where the first data block is a data block received by the first channel;

a second determining unit configured to determine first storage information of the random access memory RAM of the multi-channel data memory, the multi-channel data memory including at least a first channel, a second channel, and a first channel and a second channel sharing RAM

a first allocation unit, configured to allocate a first storage space for the first data block on the RAM according to the first storage information;

The first writing unit is configured to write the first data block into the first storage space.

In another aspect, an embodiment of the present invention provides a read controller, where the read controller includes:

a second receiving unit, configured to receive a read data request issued by the program, where the read data request includes: a channel number where the target data is to be read, and location information of the target data;

a fifth determining unit, configured to determine identifier information of the address memory according to the channel number where the target data is located;

a first acquiring unit, configured to acquire a mapping relationship table from a corresponding address memory according to the identifier information of the address memory;

a first searching unit, configured to search the mapping relationship table according to location information of the target data, to obtain an address of the target data;

a first reading unit configured to read target data from a RAM of the multi-channel data memory according to an address of the target data, wherein the RAM stores a data other than data from a channel in which the target data is located The data of other channels, which are different from the channel where the target data to be read is located.

In still another aspect, an embodiment of the present invention provides a multi-channel data memory, where the multi-channel data memory includes at least: two or more channels, and the two or more channels share a random access memory RAM, a read controller, and a write controller, an address memory corresponding to each of the two or more channels;

Each address memory is configured only as a mapping relationship table between location information of data in the data block received by the storage channel and an address of the data block storage space, and is not configured to store the data block.

The write controller is configured to determine a first data block to be stored, the first data block is a data block received by the first channel, and the first of the random access memory RAM of the multi-channel data memory is determined Storing information, the multi-channel data memory includes at least a first channel, a second channel, and a RAM shared by the first channel and the second channel; and allocating the first data block on the RAM according to the first storage information a first storage space; writing the first data block into the first storage space;

The read controller is configured to receive a read data request issued by the program, where the read data request includes: a channel number where the target data is to be read, and the target data The location information is configured to determine the identifier information of the address memory according to the channel number where the target data is located; obtain the mapping relationship table from the corresponding address memory according to the identifier information of the address memory; and search for the mapping information according to the location information of the target data. Mapping the relationship table to obtain an address of the target data; reading target data from the RAM of the multi-channel data memory according to an address of the target data, wherein the RAM stores a channel other than the target data The data of other channels other than the data, which is different from the channel in which the target data is to be read.

In another aspect, an embodiment of the present invention provides a computer storage medium, where the computer storage medium stores computer executable instructions for executing the access method of the multi-channel data memory.

An embodiment of the present invention provides a multi-channel data memory, an access method and apparatus thereof, and a storage medium, wherein a first data block to be stored is determined, and the first data block is a data block received by the first channel; Determining first storage information of the random access memory RAM of the multi-channel data memory, the multi-channel data memory including at least a first channel, a second channel, and a RAM shared by the first channel and the second channel; A storage information is allocated to the first data block by the first storage space on the RAM; the first data block is written into the first storage space; thus, the occupied area and power consumption of the chip can be reduced.

DRAWINGS

1 is a schematic structural diagram of a multi-channel data memory;

2 is a schematic flowchart of an implementation method of an access method of a multi-channel data memory according to an embodiment of the present invention;

3 is a schematic flowchart of an implementation method of an access method of a multi-channel data memory according to an embodiment of the present invention;

4 is a schematic flowchart of an implementation method of an access method of a multi-channel data memory according to an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a multi-channel data memory according to an embodiment of the present invention; FIG.

6 is a schematic structural diagram of a write controller of a multi-channel data memory according to an embodiment of the present invention;

FIG. 7 is a schematic structural diagram of a read controller of a multi-channel data memory according to an embodiment of the present invention.

detailed description

1 is a schematic structural diagram of a multi-channel data memory. As shown in FIG. 1, the multi-channel data memory includes a multi-channel input interface 101, a data storage module 102, and a read RAM control module 103. The data input module 101 includes n RAM (Random Access Memory).

In the technical solution shown in FIG. 1, each channel has its own independent RAM storage space, and the independent RAM starting address of each channel is fixed, and the size of the storage space is also fixed, and each channel has its own The independent RAM includes a memory controller configured to record the first address and the last address of each channel independent RAM, record the current read address pointer and the current write address pointer for each channel, and save the number of data that can be written in each channel. And a data counter. After the system is initialized, the initial value of the current read address pointer and the write address pointer are the first addresses of the independent RAM corresponding to the channel, and the number of data that can be written by the channel is equal to the first address minus the tail address plus one. The data counter has an initial value of zero.

During the write operation, the channel receives the write command and the data to be written, the memory controller of the channel independent RAM acquires the current write address of the channel, and writes the data to the RAM corresponding to the channel according to the write address. , increment the write address pointer by 1 as the new current write address for the channel. If the current write address is equal to the tail address of the RAM corresponding to the channel, the first address corresponding to the RAM of the channel is taken as the new current write address; when the read operation is performed, the read RAM control module receives the read command, and the read command carries the data to be read. The channel number, the read RAM control module acquires the current read address of the channel according to the read command, reads the data according to the address, and adds 1 to the read address as the new current read address of the channel.

Since the storage space of these channels is often not occupied at the same time, each channel has independent storage space, which requires a large amount of RAM, resulting in a large area occupied by the chip and high power consumption. The present application proposes a multi-channel data memory access method and apparatus for the defect. Set

The technical solutions of the present invention are further elaborated below in conjunction with the accompanying drawings and specific embodiments.

An embodiment of the present invention provides a method for accessing a multi-channel data memory, which is applied to a multi-channel data memory, where the multi-channel data memory includes at least two channels, and the two or more channels share random access. A memory RAM, a read controller, a write controller, and an address memory corresponding to each of the two or more channels. 2 is a schematic flowchart of an implementation method of an access method of a multi-channel data storage according to an embodiment of the present invention. As shown in FIG. 2, the method includes:

Step S201, the write controller determines a first data block to be stored;

Here, the first data block is a data block received by the first channel.

Step S202, the write controller determines first storage information of the random access memory RAM of the multi-channel data storage;

Here, the first storage information is current storage information of the RAM.

Step S203, the write controller allocates a first storage space for the first data block on the RAM according to the first storage information;

Here, the RAM in the multi-channel data memory is shared by each channel, and the storable space of each channel is improved. When a channel receives a data block and needs to be written, the write controller is based on the current storage information of the RAM. The data block that needs to be written allocates storage space, so that not only the utilization of the RAM storage space can be improved, but also the storage space is allocated as needed, and can adapt to various storage requirements.

Step 204: The write controller writes the first data block into the first storage space.

Here, the write controller determines the second storage information of the RAM according to the first storage information and the first storage space.

In the embodiment of the present invention, the first data block to be stored is determined, the first data block is a data block received by the first channel; and the random access memory of the multi-channel data memory is determined. First storage information of the RAM, the multi-channel data memory includes at least a first channel, a second channel, and a RAM shared by the first channel and the second channel; and the first storage information is on the RAM according to the first A data block allocates a first storage space; writing the first data block to the first storage space; thus reducing chip area and power consumption of the multi-channel data storage.

An embodiment of the present invention provides a method for accessing a multi-channel data memory, which is applied to a multi-channel data memory, where the multi-channel data memory includes at least two channels, and the two or more channels share random access. A memory RAM, a read controller, a write controller, and an address memory corresponding to each of the two or more channels. FIG. 3 is a schematic flowchart of an implementation method of a multi-channel data storage access method according to an embodiment of the present invention. As shown in FIG. 3, the method includes:

Step S301, the first channel receives the first data block from the local application or the remote server;

Here, the local application can be an application on the terminal.

Step S302, the first channel sends the received first data block to the first address memory;

Here, the first address memory is an address memory corresponding to the first channel.

Step S303, the first address memory sends a first read request to the write controller;

Here, the first data block is included in the first read request.

Step S304, the write controller receives the first read request sent by the first address memory;

Step S305, the write controller determines first storage information of the random access memory RAM of the multi-channel data memory;

Here, the multi-channel data memory includes at least a first channel, a second channel, and a RAM shared by the first channel and the second channel; the RAM stores data from the second channel, and the second channel is coupled with The first channel is different.

Step S306, the write controller is on the RAM according to the first storage information. The first data block allocates a first storage space;

Step S307, the write controller writes the first data block into the first storage space;

Step S308, the write controller carries the address of the first storage space in the first read response, and sends the first read response to the first address memory;

Here, the first address memory receives the first data block sent by the first channel; receives an address of the first storage space sent by the write controller; according to the location information of the data in the first data block, and the An address of a storage space establishes a mapping relationship table; and stores the mapping relationship table.

Step S309, the second channel receives the second data block from the local application or the remote server;

Here, the local application can be an application on the terminal.

Step S310, the second channel sends the received second data block to the second address memory;

Step S311, the second address memory sends a second read request to the write controller;

Here, the received second data block is included in the second read request.

Step S312, the write controller receives a second read request sent by the second address memory;

Step S313, the write controller determines second storage information of the RAM of the multi-channel data storage;

Step S314, the write controller allocates a second storage space for the second data block on the RAM according to the second storage information.

Step S315, the write controller writes the second data block into the second storage space;

Here, the write controller determines the third storage information of the RAM according to the second storage information and the second storage space.

Step S316, the write controller carries the address of the second storage space to the second read And transmitting the second read response to the second address memory;

Here, the second address memory receives the second data block sent by the second channel; receives an address of the second storage space sent by the write controller; and according to the location information of the data in the second data block and the The address of the second storage space establishes a mapping relationship table; and the mapping relationship table is stored.

An embodiment of the present invention provides a method for accessing a multi-channel data memory, which is applied to a multi-channel data memory, where the multi-channel data memory includes at least two channels, and the two or more channels share random access. A memory RAM, a read controller, a write controller, and an address memory corresponding to each of the two or more channels. 4 is a schematic flowchart of an implementation method of an access method of a multi-channel data storage according to an embodiment of the present invention. As shown in FIG. 4, the method includes:

Step S401, the read controller receives the read data request issued by the program;

Here, the program may be an application, a process, or an assembly instruction, where the read data request includes a channel number where the target data is to be read and location information of the target data, such as reading the data request to read the first channel. The third data in .

Step S402, the read controller determines the identification information of the address memory according to the channel number where the target data is located;

Step S403, the read controller acquires a mapping relationship table from the corresponding address memory according to the identifier information of the address memory;

Step S404, the read controller searches the mapping relationship table according to the location information of the target data, and obtains an address of the target data.

Step S405, the read controller reads the target data from the RAM of the multi-channel data memory according to the address of the target data;

Here, the RAM stores data of channels other than data from the channel in which the target data is located, the other channels being different from the channel in which the target data to be read is located.

The embodiment of the present invention first provides a method for accessing a multi-channel data memory. FIG. 5 is a schematic structural diagram of a multi-channel data memory according to an embodiment of the present invention. As shown in FIG. 5, the multi-channel data memory includes multiple channels of input. The interface 501, the address storage module 502, the write RAM control module 503, the RAM 504 of the multi-channel data memory, and the read RAM control module 505. among them:

The multi-channel input interface 501 is configured to receive a data block of a local application or a remote server, and send the received data block to the address storage module 502;

The address storage module 502 is configured to receive the data block sent by the multi-channel input interface 501; send a read request to the write RAM control module 503; and allocate the address and the received data block according to the write RAM control module 503 to the received data block. Position information establishes a mapping relationship table, and stores the mapping relationship table;

The write RAM control module 503 is configured to receive the read request sent by the address storage module 502, and allocate an address to the received data block according to the read request;

The RAM 504 of the multi-channel data memory is configured to store the data blocks received by the respective channels;

The read RAM control module 505 is configured to receive a read data request of the program; determine address memory identification information corresponding to the channel number according to the channel number carried in the read data request; and obtain the corresponding address according to the identification information of the address memory Storing the mapping table in the middle; searching the mapping table according to the location information of the data carried in the read data request, obtaining the address of the data; and reading data from the RAM of the multi-channel data memory according to the address .

It should be noted that the input interface of the multi-channel in this embodiment is consistent with the function of the multi-channel implementation in the foregoing embodiment. The address storage module in this embodiment is consistent with the functions implemented by the foregoing address memory. The write RAM control module is consistent with the functions implemented by the write controller described above, and the read RAM control module in this embodiment is consistent with the functions implemented by the read controller.

The present embodiment is further described in detail below with reference to FIG. 5:

After each channel receives the data block, the address storage module corresponding to the channel sends a read request to the write RAM control module, where the read request includes a data block to be written; the write RAM control After receiving the read request sent by the address storage module, the module determines storage information of the RAM of the multi-channel data storage, and allocates a storage space for the received data block according to the storage information and the read request, the write RAM The control module sends the address of the storage space to the address storage module, and at the same time, the write RAM control module writes the data block into the storage space.

After the read RAM control module receives the request to read a certain channel data, the read RAM control module determines the address memory identification information corresponding to the channel number according to the channel number carried in the read data request; And storing the obtained identification information to obtain a mapping relationship table in which the corresponding address is stored; searching for the mapping relationship table according to the location information of the data carried in the read data request, obtaining an address of the data; and obtaining the multi-channel according to the address Data is read from the RAM of the data memory.

Based on the foregoing embodiments, an embodiment of the present invention provides a write controller for a multi-channel data memory. FIG. 6 is a schematic structural diagram of a write controller of a multi-channel data memory according to an embodiment of the present invention. The write controller 600 includes a first receiving unit 601, a first determining unit 602, a second determining unit 603, a first allocating unit 604, a first writing unit 605, and a first transmitting unit 606, wherein:

The first receiving unit 601 is configured to receive a first read request sent by the first address memory;

Here, the first address memory is an address memory corresponding to the first channel, and the first read request includes the first data block.

The first determining unit 602 is configured to determine a first data block to be stored;

Here, the first data block is a data block received by the first channel.

a second determining unit 603, configured to determine first storage information of the random access memory RAM of the multi-channel data storage;

Here, the multi-channel data memory includes at least a first channel, a second channel, and a RAM shared by the first channel and the second channel.

The first allocating unit 604 is configured to be located on the RAM according to the first storage information. The first data block allocates a first storage space;

The first writing unit 605 is configured to write the first data block into the first storage space;

The first sending unit 606 is configured to carry the address of the first storage space in the first read response, and send the first read response to the first address memory.

In a practical application, the first receiving unit, the first determining unit, the second determining unit, the first allocating unit, the first writing unit, and the first sending unit may each be a CPU (Central Processing Unit, located on the computing device, Realized by a central processing unit, an MPU (Micro Processor Unit), a DSP (Digital Signal Processor), or an FPGA (Field Programmable Gate Array).

Based on the foregoing embodiments, an embodiment of the present invention provides a read controller of a multi-channel data memory, and FIG. 7 is a schematic structural diagram of a read controller of a multi-channel data memory according to an embodiment of the present invention. The read controller 700 includes a second receiving unit 701, a fifth determining unit 702, a first obtaining unit 703, a first searching unit 704, and a first reading unit 705, wherein:

The second receiving unit 701 is configured to receive a read data request sent by the program;

Here, the read data request includes: a channel number where the target data is to be read and location information of the target data.

The fifth determining unit 702 is configured to determine identifier information of the address memory according to the channel number where the target data is located;

The first obtaining unit 703 is configured to obtain a mapping relationship table from the corresponding address memory according to the identifier information of the address memory;

The first searching unit 704 is configured to search the mapping relationship table according to the location information of the target data, and obtain an address of the target data;

The first reading unit 705 is configured to read the target data from the RAM of the multi-channel data memory according to the address of the target data;

Here, the RAM stores therein other than the data from the channel in which the target data is located. The data of his channel, which is different from the channel where the target data to be read is located.

In an actual application, the second receiving unit, the fifth determining unit, the first obtaining unit, the first searching unit, and the first reading unit may be implemented by a CPU, an MPU, a DSP, an FPGA, or the like located on the computing device.

An embodiment of the present invention provides a multi-channel data memory, where the multi-channel data memory includes at least two channels, a random access memory RAM, a read controller, and a write controller shared by the two or more channels. An address memory corresponding to each of the two or more channels, wherein:

The read controller is configured to receive a read data request issued by the program, where the read data request includes: a channel number where the target data is to be read and location information of the target data; The channel number where the target data is located determines the identification information of the address memory; the mapping relationship table is obtained from the corresponding address memory according to the identification information of the address memory; and the mapping relationship table is searched according to the location information of the target data, and the mapping table is obtained. Addressing the target data; reading the target data from the RAM of the multi-channel data memory according to the address of the target data, wherein the RAM stores other channels than the data from the channel where the target data is located Data, the other channels are different from the channel in which the target data is to be read.

In the embodiment of the present invention, if the access method of the multi-channel data memory described above is implemented in the form of a software function module and sold or used as a stand-alone product, it may also be stored in a computer readable storage medium. Based on such understanding, the technical solution of the embodiments of the present invention may be embodied in the form of a software product in essence or in the form of a software product stored in a storage medium, including a plurality of instructions. A computer device (which may be a personal computer, server, or network device, etc.) is caused to perform all or part of the methods described in various embodiments of the present invention. The foregoing storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read only memory (ROM), a magnetic disk, or an optical disk. Thus, embodiments of the invention are not limited to any specific combination of hardware and software.

Accordingly, a computer storage medium having stored therein computer executable instructions for performing the above-described access method of a multi-channel data storage.

Those skilled in the art will appreciate that embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention can take the form of a hardware embodiment, a software embodiment, or a combination of software and hardware. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) including computer usable program code.

The present invention has been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (system), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flowchart illustrations and/or FIG. These computer program instructions can be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing device to produce a machine for the execution of instructions for execution by a processor of a computer or other programmable data processing device. The work specified in one or more blocks of a flow or a flow and/or a block diagram of a flowchart Able device.

The computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device. The apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.

These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device. The instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

The above is only the preferred embodiment of the present invention and is not intended to limit the scope of the present invention.

Industrial applicability

In the embodiment of the present invention, the first data block to be stored is determined, the first data block is a data block received by the first channel, and the first storage information of the random access memory RAM of the multi-channel data memory is determined. The multi-channel data memory includes at least a first channel, a second channel, and a RAM shared by the first channel and the second channel; assigning the first data block to the first data block according to the first storage information a storage space; writing the first data block to the first storage space; thus, the footprint and power consumption of the chip can be reduced.

Claims

A method for accessing a multi-channel data storage, the method comprising:

Determining a first data block to be stored, the first data block being a data block received by the first channel;

Determining first storage information of the random access memory RAM of the multi-channel data memory, the multi-channel data memory comprising at least a first channel, a second channel, and a RAM shared by the first channel and the second channel;

Allocating a first storage space for the first data block on the RAM according to the first storage information;

Writing the first data block into the first storage space.
The method of claim 1, wherein the method further comprises determining second storage information of the RAM based on the first storage information and the first storage space.
The method of claim 2 wherein the method further comprises:

Determining a second data block to be stored, the second data block being a data block received by the second channel;

Allocating a second storage space for the second data block on the RAM according to the second storage information;

Writing the second data block to the second storage space.
The method of claim 1, wherein the determining the first data block to be stored comprises: receiving a first read request sent by the first address memory, wherein the first address memory is the first An address memory corresponding to the channel, the first read request including the first data block;

Correspondingly, the method further comprises: carrying an address of the first storage space in a first read response, and transmitting the first read response to the first address memory.
The method according to any one of claims 1 to 4, wherein the multi-channel data The memory includes at least one RAM.
A method for accessing a multi-channel data storage, the method comprising:

Receiving a read data request issued by the program, where the read data request includes: a channel number where the target data is to be read, and location information of the target data;

Determining identification information of the address memory according to the channel number where the target data is located;

Obtaining a mapping relationship table from the corresponding address memory according to the identifier information of the address memory;

Finding the mapping relationship table according to the location information of the target data, and obtaining an address of the target data;

Reading target data from the RAM of the multi-channel data memory according to an address of the target data, wherein the RAM stores data of channels other than data from a channel in which the target data is located, the other The channel is different from the channel where the target data to be read is located.
A write controller, the write controller comprising:

a first determining unit, configured to determine a first data block to be stored, where the first data block is a data block received by the first channel;

a second determining unit configured to determine first storage information of the random access memory RAM of the multi-channel data memory, the multi-channel data memory including at least a first channel, a second channel, and a first channel and a second channel sharing RAM

a first allocation unit, configured to allocate a first storage space for the first data block on the RAM according to the first storage information;

The first writing unit is configured to write the first data block into the first storage space.
The write controller of claim 7 wherein said write controller further comprises:

And a third determining unit, configured to determine second storage information of the RAM according to the first storage information and the first storage space.
A read controller, the read controller comprising:

a second receiving unit, configured to receive a read data request issued by the program, where the read data request includes: a channel number where the target data is to be read, and location information of the target data;

a fifth determining unit, configured to determine identifier information of the address memory according to the channel number where the target data is located;

a first acquiring unit, configured to acquire a mapping relationship table from a corresponding address memory according to the identifier information of the address memory;

a first searching unit, configured to search the mapping relationship table according to location information of the target data, to obtain an address of the target data;

a first reading unit configured to read target data from a RAM of the multi-channel data memory according to an address of the target data, wherein the RAM stores a data other than data from a channel in which the target data is located The data of other channels, which are different from the channel where the target data to be read is located.
A multi-channel data memory, the multi-channel data memory comprising: at least two channels, the two or more channels share a random access memory RAM, a read controller and a write controller, and the two An address memory corresponding to each of the above channels;

Each address memory is configured only as a mapping relationship table between location information of data in the data block received by the storage channel and an address of the data block storage space, and is not configured to store the data block;

The write controller is configured to determine a first data block to be stored, the first data block is a data block received by the first channel, and the first of the random access memory RAM of the multi-channel data memory is determined Storing information, the multi-channel data storage comprising at least a first channel, a second channel, and a RAM shared by the first channel and the second channel; according to the first storage Transmitting, on the RAM, a first storage space for the first data block; writing the first data block to the first storage space;

The read controller is configured to receive a read data request issued by the program, where the read data request includes: a channel number where the target data is to be read and location information of the target data; The channel number where the target data is located determines the identification information of the address memory; the mapping relationship table is obtained from the corresponding address memory according to the identification information of the address memory; and the mapping relationship table is searched according to the location information of the target data, and the mapping table is obtained. Addressing the target data; reading the target data from the RAM of the multi-channel data memory according to the address of the target data, wherein the RAM stores other channels than the data from the channel where the target data is located Data, the other channels are different from the channel in which the target data is to be read.
A computer storage medium having stored therein computer executable instructions for performing the access method of the multi-channel data storage of any one of claims 1 to 5 or 6.