CN112098794A - Method for determining parameters in piece calibration piece model and terminal equipment - Google Patents
Method for determining parameters in piece calibration piece model and terminal equipment Download PDFInfo
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Abstract
The invention is suitable for the technical field of primary-grade semiconductor device microwave characteristic measurement, and provides a method for determining parameters in a wafer calibration piece model and terminal equipment, wherein the method comprises the following steps: determining different on-chip calibration piece models based on terahertz frequency bands; measuring to obtain S parameters of different calibration pieces; calculating admittance of different calibration pieces according to S parameters of the different calibration pieces; determining admittance formulas corresponding to different on-wafer calibration piece models according to on-wafer calibration piece models corresponding to different calibration pieces; and calculating parameters representing crosstalk of different calibration pieces in different on-chip calibration piece models according to the admittance of different calibration pieces and corresponding admittance formulas. The different on-chip calibration piece models provided by the embodiment solve calibration and measurement errors caused by imperfect terahertz frequency band standard piece circuit models, and can improve the accuracy of terahertz frequency band on-chip S parameter test; in addition, different methods for calculating parameters in the sheet calibration piece model are provided.
Description
Technical Field
The invention belongs to the technical field of measurement of microwave characteristics of primary-crystal semiconductor devices, and particularly relates to a method for determining parameters in a wafer calibration piece model and terminal equipment.
Background
The on-chip S parameter testing system is widely applied to the microelectronic industry. Before use, the on-chip calibration piece is required to carry out vector calibration on the on-chip S parameter testing system, and the accuracy of the calibration depends on the accuracy defined by the on-chip calibration piece. The different types of calibrators (e.g., open circuit calibrators, short circuit calibrators, load calibrators, and shoot-through calibrators) have different values of lumped parameters in the measurement model, which typically include delay, characteristic impedance, series resistance, inductance, capacitance, and dc resistance of the bias line. How to obtain the accurate values of the lumped parameters in the measurement model is the key to define the calibration piece. However, at present, the measurement model conventionally used in the on-chip calibration component is widely applied below a low frequency band, but as the on-chip test frequency increases, the calibration and test accuracy decreases when the on-chip test system is calibrated by using the conventional measurement model.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method for determining parameters in a wafer calibration piece model and a terminal device, which are used to solve the problem in the prior art that the calibration and test accuracy is reduced when a conventional measurement model is used to calibrate an on-wafer test system.
To achieve the above object, a first aspect of an embodiment of the present invention provides a method for parameter determination in a piece calibration piece model, including:
determining different on-chip calibration piece models based on a terahertz frequency band, wherein the different on-chip calibration piece models are circuits formed by connecting two elements representing different on-chip calibration piece crosstalk in series at two ends of the end face of an original calibration piece model in parallel;
on the basis of a terahertz frequency band, calibrating an on-chip S parameter test system by adopting a multi-line TRL calibration method, and measuring to obtain S parameters of different calibration pieces;
calculating the admittance of different calibration pieces according to the S parameters of the different calibration pieces;
determining admittance formulas corresponding to different on-wafer calibration piece models according to on-wafer calibration piece models corresponding to different calibration pieces;
and calculating parameters representing crosstalk of different calibration pieces in different on-chip calibration piece models according to the admittance of the different calibration pieces and the corresponding admittance formulas.
As another embodiment of the present application, the different on-chip calibration piece models include: the calibration method comprises the following steps of (1) loading a calibration piece model, an open circuit calibration piece model and a short circuit calibration piece model;
the load calibration piece model comprises load calibration piece inductance, load calibration piece direct current resistance, resistance representing load calibration piece crosstalk and capacitance representing load calibration piece crosstalk; one end of the load calibration piece inductor is connected with one end of the resistor for representing the load calibration piece crosstalk to form one end of a single port of a load calibration piece model, the other end of the load calibration piece inductor is connected with one end of the direct-current resistor of the load calibration piece, the other end of the resistor for representing the load calibration piece crosstalk is connected with one end of the capacitor for representing the load calibration piece crosstalk, and the other end of the capacitor for representing the load calibration piece crosstalk is connected with the other end of the direct-current resistor of the load calibration piece to form the other end of the single port of the load calibration piece model;
the open circuit calibration piece model comprises an open circuit calibration piece capacitor, a resistor for representing open circuit calibration piece crosstalk and a capacitor for representing open circuit calibration piece crosstalk; one end of the open-circuit calibration piece capacitor is connected with one end of the resistor for representing the open-circuit calibration piece crosstalk to form one end of a single port of the open-circuit calibration piece model, the other end of the resistor for representing the open-circuit calibration piece crosstalk is connected with one end of the capacitor for representing the open-circuit calibration piece crosstalk, and the other end of the capacitor for representing the open-circuit calibration piece crosstalk is connected with the other end of the open-circuit calibration piece capacitor to form the other end of the single port of the open-circuit calibration piece model;
the short circuit calibration piece model comprises a short circuit calibration piece inductor, a resistor for representing the crosstalk of the short circuit calibration piece and a capacitor for representing the crosstalk of the short circuit calibration piece; one end of the short circuit calibration piece inductor is connected with one end of the resistor for representing the short circuit calibration piece crosstalk to form one end of a single port of a short circuit calibration piece model, the other end of the resistor for representing the short circuit calibration piece crosstalk is connected with one end of the capacitor for representing the short circuit calibration piece crosstalk, and the other end of the capacitor for representing the short circuit calibration piece crosstalk is connected with the other end of the short circuit calibration piece inductor to form the other end of the single port of the short circuit calibration piece model.
As another embodiment of the present application, the calculating the admittances of the different calibration pieces according to the S-parameters of the different calibration pieces includes:
according to
Calculating admittances of different calibration pieces;
wherein S is11Representing the S parameter of a single port of different calibration elements, Y representing the admittance of different calibration elements, ZopenRepresenting the impedance of the open calibration member, Z0Representing the characteristic impedance of the system.
As another embodiment of the present application, the determining, according to the on-chip calibration piece models corresponding to different calibration pieces, admittance formulas corresponding to different on-chip calibration piece models includes:
when the calibration piece is a load calibration piece and the piece calibration model is a load calibration piece model, the admittance formula corresponding to the load calibration piece model is as follows:
wherein, YloadRepresenting admittance of a load calibration member, RlRepresenting the DC resistance of the load calibration member, j representing an imaginary number, ω representing the angular frequency, LloadIndicating the measured inductance, R, of the load calibration piece at a predetermined frequencysRepresentation characterization minusResistance to crosstalk of the carrier member, CsRepresenting the capacitance, Y, characterizing the crosstalk of the load calibration member1Represents RlAnd LloadOf series admittance, Y2Is represented by CsAnd RsThe series admittance of (a).
As another embodiment of the present application, the determining, according to the on-chip calibration piece models corresponding to different calibration pieces, admittance formulas corresponding to different on-chip calibration piece models includes:
when the calibration piece is an open-circuit calibration piece and the piece calibration model is an open-circuit calibration piece model, the admittance formula corresponding to the open-circuit calibration piece model is as follows:
wherein, YopenAdmittance of open-circuit calibration elements, CopenIndicating that the open calibration piece capacitance, R, was measured at a predetermined frequencys' denotes the resistance, C, characterizing open etalon crosstalks' denotes the capacitance, Y, characterizing open etalon crosstalk1' represents CopenAdmittance of (A), Y2' represents Cs' and RsThe series admittance of'.
As another embodiment of the present application, the determining, according to the on-chip calibration piece models corresponding to different calibration pieces, admittance formulas corresponding to different on-chip calibration piece models includes:
when the calibration piece is a short circuit calibration piece and the piece calibration model is a short circuit calibration piece model, the admittance formula corresponding to the short circuit calibration piece model is as follows:
wherein, YshortIndicating admittance of the short-circuit calibration element, LshortIndicating short circuit calibration inductance, R, measured at a predetermined frequencys"represents the resistance characterizing the crosstalk of the short calibration piece, Cs"denotes the capacitance, Y, characterizing the short circuit calibration piece crosstalk1"represents LshortAdmittance of (A), Y2"represents Cs"and Rs"series admittance.
As another embodiment of the present application, the calculating parameters characterizing crosstalk of different calibration pieces in different chip calibration piece models according to the admittances of the different calibration pieces and corresponding admittance formulas includes:
substituting the admittances of the different calibration pieces into corresponding admittance formulas to calculate to obtain capacitances representing crosstalk of the different on-chip calibration pieces and impedances corresponding to series admittances representing resistances representing crosstalk of the different on-chip calibration pieces;
determining the real part of the impedance as the resistance characterizing the crosstalk of different on-chip calibration pieces; the imaginary part of the impedance is determined as the capacitance characterizing the crosstalk of the different on-chip calibration elements.
A second aspect of an embodiment of the present invention provides an apparatus for determining parameters in a patch calibration piece model, including:
the device comprises a determining module, a judging module and a judging module, wherein the determining module is used for determining different on-chip calibration piece models, and the different on-chip calibration piece models are circuits formed by connecting two elements representing different on-chip calibration piece crosstalk in series at two ends of the end face of an original calibration piece model in parallel;
the measurement module is used for calibrating the on-chip S parameter test system by adopting a multi-line TRL calibration method based on a terahertz frequency band, and measuring to obtain S parameters of different calibration pieces;
the calculation module is used for calculating the admittance of different calibration pieces according to the S parameters of the different calibration pieces;
the calculation module is further used for determining admittance formulas corresponding to different on-wafer calibration piece models according to on-wafer calibration piece models corresponding to different calibration pieces;
and the calculation module is also used for calculating parameters representing crosstalk of different calibration pieces in different on-chip calibration piece models according to the admittances of the different calibration pieces and the corresponding admittance formulas.
A third aspect of an embodiment of the present invention provides a terminal device, including: a memory, a processor and a computer program stored in the memory and executable on the processor, the processor implementing the steps of the method for parameter determination in a patch calibration volume model as described in any of the above embodiments when executing the computer program.
A fourth aspect of an embodiment of the present invention provides a computer-readable storage medium, including: the computer-readable storage medium stores a computer program which, when executed by a processor, implements the steps of the method for parameter determination in a patch calibration phantom model as described in any of the above embodiments.
Compared with the prior art, the embodiment of the invention has the following beneficial effects: compared with the prior art, the method comprises the steps of determining different on-chip calibration piece models based on the terahertz frequency band, wherein the different on-chip calibration piece models are circuits formed by connecting two elements representing different on-chip calibration piece crosstalk in series at two ends of the end face of an original calibration piece model in parallel; on the basis of a terahertz frequency band, calibrating an on-chip S parameter test system by adopting a multi-line TRL calibration method, and measuring to obtain S parameters of different calibration pieces; calculating the admittance of different calibration pieces according to the S parameters of the different calibration pieces; determining admittance formulas corresponding to different on-wafer calibration piece models according to on-wafer calibration piece models corresponding to different calibration pieces; and calculating parameters representing crosstalk of different calibration pieces in different on-chip calibration piece models according to the admittance of the different calibration pieces and the corresponding admittance formulas. The different on-chip calibration piece models provided by the embodiment solve calibration and measurement errors caused by imperfect terahertz frequency band standard piece circuit models, and can improve the accuracy of terahertz frequency band on-chip S parameter test; in addition, different methods for calculating parameters in the sheet calibration piece model are provided.
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In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a schematic flow chart illustrating an implementation of a method for determining parameters in a calibration piece model according to an embodiment of the present invention;
fig. 2(1) is a schematic diagram of an original load calibration piece model provided in an embodiment of the present invention;
fig. 2(2) is a schematic diagram of a load calibration piece model based on a terahertz frequency band according to an embodiment of the present invention;
FIG. 3(1) is a schematic diagram of an original open-circuit calibration piece model provided in an embodiment of the present invention;
fig. 3(2) is a schematic diagram of an open circuit calibration piece model based on a terahertz frequency band according to an embodiment of the present invention;
fig. 4(1) is a schematic diagram of an original short circuit calibration piece model provided in an embodiment of the present invention;
fig. 4(2) is a schematic diagram of a short circuit calibration piece model based on a terahertz frequency band according to an embodiment of the present invention;
FIG. 5 is an exemplary diagram of an apparatus for parameter determination in a piece calibration piece model provided by an embodiment of the present invention;
fig. 6 is a schematic diagram of a terminal device according to an embodiment of the present invention.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the invention. It will be apparent, however, to one skilled in the art that the present invention may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.
In order to explain the technical means of the present invention, the following description will be given by way of specific examples.
Fig. 1 is a schematic flow chart of an implementation of a method for determining parameters in a sheet calibration piece model according to an embodiment of the present invention, which is described in detail below.
Optionally, as shown in fig. 2(1), the original load calibration piece model is shown, and fig. 2(2) is a load calibration piece model based on the terahertz frequency band; the original load calibration piece model comprises a load calibration piece inductor and a load calibration piece direct current resistor, one end of the load calibration piece inductor is one end of a single port of the original load calibration piece model, the other end of the load calibration piece inductor is connected with one end of the load calibration piece direct current resistor, and the other end of the load calibration piece direct current resistor is the other end of the single port of the original load calibration piece model.
The terahertz frequency band-based load calibration piece model is a series circuit formed by connecting a resistor for representing the crosstalk of the load calibration piece and a capacitor for representing the crosstalk of the load calibration piece in parallel at two ends of a single port of an original load calibration piece model. Optionally, the load calibration piece model includes a load calibration piece inductance, a load calibration piece direct current resistance, a resistance representing load calibration piece crosstalk, and a capacitance representing load calibration piece crosstalk; one end of the load calibration piece inductor is connected with one end of the resistor representing the load calibration piece crosstalk to form one end of a single port of a load calibration piece model, the other end of the load calibration piece inductor is connected with one end of the direct current resistor of the load calibration piece, the other end of the resistor representing the load calibration piece crosstalk is connected with one end of the capacitor representing the load calibration piece crosstalk, and the other end of the capacitor representing the load calibration piece crosstalk is connected with the other end of the direct current resistor of the load calibration piece to form the other end of the single port of the load calibration piece model.
Optionally, as shown in fig. 3(1), the original open-circuit calibration piece model is shown, and fig. 3(2) is an open-circuit calibration piece model based on the terahertz frequency band; the original open-circuit calibration piece model comprises an open-circuit calibration piece capacitor, and two ends of the open-circuit calibration piece capacitor are two ends of a single port of the original open-circuit calibration piece model respectively.
The terahertz frequency band-based open circuit calibration piece model is a series circuit formed by connecting a resistor for representing open circuit calibration piece crosstalk and a capacitor for representing open circuit calibration piece crosstalk in parallel at two ends of a single port of an original open circuit calibration piece model. Optionally, the open calibration piece model includes an open calibration piece capacitance, a resistance characterizing open calibration piece crosstalk, and a capacitance characterizing open calibration piece crosstalk; one end of the open circuit calibration piece capacitor is connected with one end of the resistor for representing the open circuit calibration piece crosstalk to form one end of a single port of the open circuit calibration piece model, the other end of the resistor for representing the open circuit calibration piece crosstalk is connected with one end of the capacitor for representing the open circuit calibration piece crosstalk, and the other end of the capacitor for representing the open circuit calibration piece crosstalk is connected with the other end of the open circuit calibration piece capacitor to form the other end of the single port of the open circuit calibration piece model.
Optionally, as shown in fig. 4(1), the model of the original short circuit calibration piece is shown, and fig. 4(2) is a model of the short circuit calibration piece based on the terahertz frequency band; the model of the original short circuit calibration piece comprises a short circuit calibration piece inductor, and two ends of the short circuit calibration piece inductor are two ends of a single port of the model of the original short circuit calibration piece respectively.
The short circuit calibration piece model based on the terahertz frequency band is a series circuit formed by connecting a resistor for representing the crosstalk of the short circuit calibration piece and a capacitor for representing the crosstalk of the short circuit calibration piece in parallel at two ends of a single port of an original short circuit calibration piece model. Optionally, the short circuit calibration piece model includes a short circuit calibration piece inductance, a resistance characterizing the short circuit calibration piece crosstalk, and a capacitance characterizing the short circuit calibration piece crosstalk; one end of the short circuit calibration piece inductor is connected with one end of the resistor for representing the short circuit calibration piece crosstalk to form one end of a single port of a short circuit calibration piece model, the other end of the resistor for representing the short circuit calibration piece crosstalk is connected with one end of the capacitor for representing the short circuit calibration piece crosstalk, and the other end of the capacitor for representing the short circuit calibration piece crosstalk is connected with the other end of the short circuit calibration piece inductor to form the other end of the single port of the short circuit calibration piece model.
Optionally, according to equivalent circuits of different calibration pieces shown in fig. 2(2), fig. 3(2), and fig. 4(2), the measurement system is calibrated by using the multiline TRL calibration method with the highest calibration accuracy in the terahertz frequency band, and the S parameter of the load calibration piece is obtained by measurement.
And 103, calculating admittance of different calibration pieces according to the S parameters of the different calibration pieces.
Optionally, according to
Calculating admittances of different calibration pieces;
wherein S is11Representing the S parameter of a single port of different calibration elements, Y representing the admittance of different calibration elements, ZopenRepresenting the impedance of the open calibration member, Z0Representing the characteristic impedance of the system, typically 50 omega.
And 104, determining admittance formulas corresponding to different on-wafer calibration piece models according to on-wafer calibration piece models corresponding to different calibration pieces.
Optionally, in this step, admittance formulas corresponding to different on-chip calibration piece models may be determined according to equivalent circuits corresponding to different calibration pieces.
Optionally, as shown in fig. 2(2), when the calibration member is a load calibration member, and when the sheet calibration model is a load calibration member model, the admittance formula corresponding to the load calibration member model is as follows:
wherein, YloadRepresenting admittance of a load calibration member, RlRepresenting the DC resistance of the load calibration member, j representing an imaginary number, ω representing the angular frequency, LloadIndicating that the load calibration inductance is measured at a predetermined frequency, where low frequency may refer to frequencies below 40GHz, RsRepresenting the resistance characterizing the crosstalk of the load calibration member, CsRepresenting the capacitance, Y, characterizing the crosstalk of the load calibration member1Represents RlAnd LloadOf series admittance, Y2Is represented by CsAnd RsThe series admittance of (a).
Alternatively, L can be obtained according to FIG. 2(1)load. According to
Calculating to obtain
Wherein, ω is 2 pi f,
the load reflection coefficient, Z, of the end face in FIG. 2(1)loadRepresenting the input impedance of the load calibration member and R representing the dc resistance of the load calibration member.
Optionally, as shown in fig. 3(2), when the calibration piece is an open-circuit calibration piece, and when the sheet calibration model is an open-circuit calibration piece model, the admittance formula corresponding to the open-circuit calibration piece model is as follows:
wherein, YopenAdmittance of open-circuit calibration elements, CopenIndicating that the open calibration piece capacitance is measured at a predetermined frequency, wherein the predetermined frequency may refer to a frequency below 40GHz, Rs' denotes the resistance, C, characterizing open etalon crosstalks' denotes the capacitance, Y, characterizing open etalon crosstalk1' represents CopenAdmittance of (A), Y2' represents Cs' and RsThe series admittance of'.
Alternatively, C can be calculated according to FIG. 3(1)open. According to
Is calculated, thereby obtaining
Wherein the content of the first and second substances,
showing the open-circuit reflection coefficient, Z, of the parametric surface in FIG. 3(1)openThe input impedance of the open circuit calibration element in fig. 3(1) is shown.
Optionally, as shown in fig. 4(2), when the calibration piece is a short circuit calibration piece, and when the sheet calibration model is a short circuit calibration piece model, the admittance formula corresponding to the short circuit calibration piece model is as follows:
wherein, YshortIndicating admittance of the short-circuit calibration element, LshortIndicating that the short circuit calibration piece inductance is measured at a predetermined frequency, wherein the predetermined frequency may refer to a frequency below 40GHz, Rs"represents the resistance characterizing the crosstalk of the short calibration piece, Cs"denotes the capacitance, Y, characterizing the short circuit calibration piece crosstalk1"represents LshortAdmittance of (A), Y2"represents Cs"and Rs"series admittance.
Alternatively, L can be calculated according to FIG. 4(1)load. According to
Calculating to obtain
Wherein, ω is 2 pi f,
showing short-circuit reflection coefficient, Z, of a parameter end face in FIG. 4(1)shortThe input impedance of the short calibration piece of fig. 4(1) is shown.
And 105, calculating parameters representing crosstalk of different calibration pieces in different on-chip calibration piece models according to the admittance of the different calibration pieces and corresponding admittance formulas.
Optionally, the step may include substituting the admittances of the different calibration pieces into corresponding admittance formulas to perform calculation, so as to obtain capacitances representing crosstalk of the different on-chip calibration pieces and impedances corresponding to series admittances representing resistances representing crosstalk of the different on-chip calibration pieces; determining the real part of the impedance as the resistance characterizing the crosstalk of different on-chip calibration pieces; the imaginary part of the impedance is determined as the capacitance characterizing the crosstalk of the different on-chip calibration elements. That is, the parameters characterizing the different etalon crosstalk in the load etalon model include resistance characterizing the load etalon crosstalk and capacitance characterizing the load etalon crosstalk.
For example, when the calibration piece is a load calibration piece, the calculated admittance of the load calibration piece may be
The obtained signal is substituted into an admittance formula corresponding to the load calibration piece model to obtain,
in this way it is possible to obtain,
has a real part of RsBy using
Namely Rs＝real(Z)，Cs＝-imag(Z)·ω·CsHere, Z represents the impedance corresponding to the series admittance of the capacitance characterizing the load calibration member crosstalk and the resistance characterizing the load calibration member crosstalk.
Similarly, the impedance corresponding to the capacitance representing the crosstalk of the open calibration piece and the impedance corresponding to the series admittance of the resistance representing the crosstalk of the open calibration piece, the impedance corresponding to the capacitance representing the crosstalk of the short calibration piece and the impedance corresponding to the series admittance of the resistance representing the crosstalk of the short calibration piece, the capacitance representing the crosstalk of the open calibration piece, the resistance representing the crosstalk of the open calibration piece, the capacitance representing the crosstalk of the short calibration piece and the resistance representing the crosstalk of the short calibration piece can be obtained.
It should be noted that, the capacitance and the resistance characterizing crosstalk of the calibration member obtained by calculating any one of the load calibration member model, the open calibration member model and the short calibration member model in the above embodiments may also be applied to other models, for example, the capacitance and the resistance characterizing crosstalk of the calibration member obtained by calculating the load calibration member model may also be applied to the open calibration member model and the short calibration member model; calculating the capacitance and resistance of the cross talk of the characterization calibration piece obtained by the open circuit calibration piece model, and applying the capacitance and resistance to the load calibration piece model and the short circuit calibration piece model; and calculating the capacitance and resistance representing the crosstalk of the calibration piece obtained by the short circuit calibration piece model, and applying the capacitance and resistance to the load calibration piece model and the open circuit calibration piece model. When calibration of the calibration piece is carried out, the corresponding capacitance and resistance for representing crosstalk of the calibration piece can be obtained by adopting one calibration model, and then the calibration model can be applied to other calibration piece models without calculating the capacitance and resistance for representing crosstalk of the calibration piece corresponding to other calibration models, so that the calibration time can be saved, and the universality of the on-chip calibration piece model is improved.
The method for determining the parameters in the on-chip calibration piece model comprises the steps of determining different on-chip calibration piece models based on terahertz frequency bands, wherein the different on-chip calibration piece models are circuits formed by connecting two elements for representing crosstalk of different on-chip calibration pieces in series at two ends of the end face of an original calibration piece model in parallel; on the basis of a terahertz frequency band, calibrating an on-chip S parameter test system by adopting a multi-line TRL calibration method, and measuring to obtain S parameters of different calibration pieces; calculating the admittance of different calibration pieces according to the S parameters of the different calibration pieces; determining admittance formulas corresponding to different on-wafer calibration piece models according to on-wafer calibration piece models corresponding to different calibration pieces; and calculating parameters representing crosstalk of different calibration pieces in different on-chip calibration piece models according to the admittance of the different calibration pieces and the corresponding admittance formulas. The different on-chip calibration piece models provided by the embodiment solve calibration and measurement errors caused by imperfect terahertz frequency band standard piece circuit models, and can improve the accuracy of terahertz frequency band on-chip S parameter test; in addition, different methods for calculating parameters in the sheet calibration piece model are provided.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present invention.
Fig. 5 shows an exemplary diagram of an apparatus for determining parameters in a patch calibrator model according to an embodiment of the present invention, which corresponds to the method for determining parameters in a patch calibrator model described in the above embodiments. As shown in fig. 5, the apparatus may include: a determination module 501, a measurement module 502, and a calculation module 503.
The determining module 501 is configured to determine different on-chip calibration piece models, where the different on-chip calibration piece models are circuits formed by connecting two serial elements representing crosstalk of different on-chip calibration pieces in parallel at two ends of an end face of an original calibration piece model;
the measurement module 502 is used for calibrating the on-chip S parameter test system by adopting a multi-line TRL calibration method based on a terahertz frequency band, and measuring to obtain S parameters of different calibration pieces;
a calculating module 503, configured to calculate admittances of different calibration pieces according to the S parameters of the different calibration pieces;
the calculating module 503 is further configured to determine admittance formulas corresponding to different on-chip calibration piece models according to on-chip calibration piece models corresponding to different calibration pieces;
the calculating module 503 is further configured to calculate parameters representing crosstalk of different calibration pieces in different chip calibration piece models according to the admittances of the different calibration pieces and corresponding admittance formulas.
Optionally, the different on-wafer calibration piece models include: the calibration method comprises the following steps of (1) loading a calibration piece model, an open circuit calibration piece model and a short circuit calibration piece model;
the load calibration piece model comprises load calibration piece inductance, load calibration piece direct current resistance, resistance representing load calibration piece crosstalk and capacitance representing load calibration piece crosstalk; one end of the load calibration piece inductor is connected with one end of the resistor for representing the load calibration piece crosstalk to form one end of a single port of a load calibration piece model, the other end of the load calibration piece inductor is connected with one end of the direct-current resistor of the load calibration piece, the other end of the resistor for representing the load calibration piece crosstalk is connected with one end of the capacitor for representing the load calibration piece crosstalk, and the other end of the capacitor for representing the load calibration piece crosstalk is connected with the other end of the direct-current resistor of the load calibration piece to form the other end of the single port of the load calibration piece model;
wherein the open calibration piece model comprises an open calibration piece capacitance, a resistance characterizing open calibration piece crosstalk, and a capacitance characterizing open calibration piece crosstalk; one end of the open-circuit calibration piece capacitor is connected with one end of the resistor for representing the open-circuit calibration piece crosstalk to form one end of a single port of the open-circuit calibration piece model, the other end of the resistor for representing the open-circuit calibration piece crosstalk is connected with one end of the capacitor for representing the open-circuit calibration piece crosstalk, and the other end of the capacitor for representing the open-circuit calibration piece crosstalk is connected with the other end of the open-circuit calibration piece capacitor to form the other end of the single port of the open-circuit calibration piece model;
the short circuit calibration piece model comprises a short circuit calibration piece inductor, a resistor for representing the crosstalk of the short circuit calibration piece and a capacitor for representing the crosstalk of the short circuit calibration piece; one end of the short circuit calibration piece inductor is connected with one end of the resistor for representing the short circuit calibration piece crosstalk to form one end of a single port of a short circuit calibration piece model, the other end of the resistor for representing the short circuit calibration piece crosstalk is connected with one end of the capacitor for representing the short circuit calibration piece crosstalk, and the other end of the capacitor for representing the short circuit calibration piece crosstalk is connected with the other end of the short circuit calibration piece inductor to form the other end of the single port of the short circuit calibration piece model.
Optionally, when the calculating module 503 calculates the admittances of different calibration pieces according to the S parameters of the different calibration pieces, it may be configured to:
according to
Calculating admittances of different calibration pieces;
wherein S is11Representing the S parameter of a single port of different calibration elements, Y representing the admittance of different calibration elements, ZopenRepresenting the impedance of the open calibration member, Z0Representing the characteristic impedance of the system.
Optionally, when the calculating module 503 determines the admittance formulas corresponding to different on-chip calibration piece models according to the on-chip calibration piece models corresponding to different calibration pieces, it may be configured to:
when the calibration piece is a load calibration piece and the piece calibration model is a load calibration piece model, the admittance formula corresponding to the load calibration piece model is as follows:
wherein, YloadRepresenting admittance of a load calibration member, RlRepresenting the DC resistance of the load calibration member, j representing an imaginary number, ω representing the angular frequency, LloadIndicating the measured inductance, R, of the load calibration piece at a predetermined frequencysRepresenting the resistance characterizing the crosstalk of the load calibration member, CsRepresenting the capacitance, Y, characterizing the crosstalk of the load calibration member1Represents RlAnd LloadOf series admittance, Y2Is represented by CsAnd RsThe series admittance of (a).
Optionally, when the calculating module 503 determines the admittance formulas corresponding to different on-chip calibration piece models according to the on-chip calibration piece models corresponding to different calibration pieces, it may be configured to:
when the calibration piece is an open-circuit calibration piece and the piece calibration model is an open-circuit calibration piece model, the admittance formula corresponding to the open-circuit calibration piece model is as follows:
wherein, YopenAdmittance of open-circuit calibration elements, CopenIndicating that the open calibration piece capacitance, R, was measured at a predetermined frequencys' denotes the resistance, C, characterizing open etalon crosstalks' denotes the capacitance, Y, characterizing open etalon crosstalk1' represents CopenAdmittance of (A), Y2' represents Cs' and RsThe series admittance of'.
Optionally, when the calculating module 503 determines the admittance formulas corresponding to different on-chip calibration piece models according to the on-chip calibration piece models corresponding to different calibration pieces, it may be configured to:
when the calibration piece is a short circuit calibration piece and the piece calibration model is a short circuit calibration piece model, the admittance formula corresponding to the short circuit calibration piece model is as follows:
wherein, YshortIndicating admittance of the short-circuit calibration element, LshortIndicating short circuit calibration inductance, R, measured at a predetermined frequencys"represents the resistance characterizing the crosstalk of the short calibration piece, Cs"denotes the capacitance, Y, characterizing the short circuit calibration piece crosstalk1"represents LshortAdmittance of (A), Y2"represents Cs"and Rs"series admittance.
Optionally, when the calculating module 503 calculates different parameters characterizing crosstalk of different calibration pieces in the sheet calibration piece model according to the admittances of the different calibration pieces and the corresponding admittance formula, it may be configured to:
substituting the admittances of the different calibration pieces into corresponding admittance formulas to calculate to obtain capacitances representing crosstalk of the different on-chip calibration pieces and impedances corresponding to series admittances representing resistances representing crosstalk of the different on-chip calibration pieces;
determining the real part of the impedance as the resistance characterizing the crosstalk of different on-chip calibration pieces; the imaginary part of the impedance is determined as the capacitance characterizing the crosstalk of the different on-chip calibration elements.
The device for determining the parameters in the on-chip calibration piece model determines different on-chip calibration piece models based on the terahertz frequency band through the determination module, wherein the different on-chip calibration piece models are circuits formed by connecting two elements for representing crosstalk of different on-chip calibration pieces in series at two ends of the end face of the original calibration piece model in parallel; on the basis of a terahertz frequency band, calibrating an on-chip S parameter test system by adopting a multi-line TRL calibration method, and measuring by a measuring module to obtain S parameters of different calibration pieces; calculating the admittance of different calibration pieces according to the S parameters of the different calibration pieces; according to the on-wafer calibration piece models corresponding to different calibration pieces, the calculation module determines admittance formulas corresponding to the different on-wafer calibration piece models; and according to the admittances of the different calibration pieces and the corresponding admittance formulas, the calculation module calculates parameters representing the crosstalk of the different calibration pieces in different on-chip calibration piece models. The different on-chip calibration piece models provided by the embodiment solve calibration and measurement errors caused by imperfect terahertz frequency band standard piece circuit models, and can improve the accuracy of terahertz frequency band on-chip S parameter test; in addition, different methods for calculating parameters in the sheet calibration piece model are provided.
Fig. 6 is a schematic diagram of a terminal device according to an embodiment of the present invention. As shown in fig. 6, the terminal device 600 of this embodiment includes: a processor 601, a memory 602 and a computer program 603 stored in said memory 602 and executable on said processor 601, e.g. a program for parameter determination in a patch calibration piece model. The processor 601, when executing the computer program 603, implements the steps in the above-described method embodiment of parameter determination in a patch calibration patch model, such as steps 101 to 105 shown in fig. 1, and the processor 601, when executing the computer program 603, implements the functions of the modules in the above-described apparatus embodiments, such as the functions of modules 501 to 503 shown in fig. 5.
Illustratively, the computer program 603 may be partitioned into one or more program modules, which are stored in the memory 602 and executed by the processor 601 to implement the present invention. The one or more program modules may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program 603 in the apparatus for parameter determination in a patch calibration piece model or in the terminal device 600. For example, the computer program 603 may be divided into a determination module 501, a measurement module 502, and a calculation module 503, and specific functions of the modules are shown in fig. 5, which are not described in detail herein.
The terminal device 600 may be a desktop computer, a notebook, a palm computer, a cloud server, or other computing devices. The terminal device may include, but is not limited to, a processor 601, a memory 602. Those skilled in the art will appreciate that fig. 6 is merely an example of a terminal device 600 and does not constitute a limitation of terminal device 600 and may include more or fewer components than shown, or some components may be combined, or different components, e.g., the terminal device may also include input-output devices, network access devices, buses, etc.
The Processor 601 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 602 may be an internal storage unit of the terminal device 600, such as a hard disk or a memory of the terminal device 600. The memory 602 may also be an external storage device of the terminal device 600, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are provided on the terminal device 600. Further, the memory 602 may also include both an internal storage unit and an external storage device of the terminal device 600. The memory 602 is used for storing the computer programs and other programs and data required by the terminal device 600. The memory 602 may also be used to temporarily store data that has been output or is to be output.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other ways. For example, the above-described embodiments of the apparatus/terminal device are merely illustrative, and for example, the division of the modules or units is only one logical division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated modules/units, if implemented in the form of software functional units and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow of the method according to the embodiments of the present invention may also be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. . Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media does not include electrical carrier signals and telecommunications signals as is required by legislation and patent practice.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present invention, and are intended to be included within the scope of the present invention.
Claims (10)
1. A method of parameter determination in a piece calibration piece model, comprising:
determining different on-chip calibration piece models based on a terahertz frequency band, wherein the different on-chip calibration piece models are circuits formed by connecting two elements representing crosstalk of different on-chip calibration pieces in series at two ends of an end face in an original calibration piece model in parallel;
on the basis of a terahertz frequency band, calibrating an on-chip S parameter test system by adopting a multi-line TRL calibration method, and measuring to obtain S parameters of different calibration pieces;
calculating the admittance of different calibration pieces according to the S parameters of the different calibration pieces;
determining admittance formulas corresponding to different on-wafer calibration piece models according to on-wafer calibration piece models corresponding to different calibration pieces;
and calculating parameters representing crosstalk of different calibration pieces in different on-chip calibration piece models according to the admittance of the different calibration pieces and the corresponding admittance formulas.
2. The method of parameter determination in a sheet aligner model of claim 1, wherein the different sheet aligner models comprise: the calibration method comprises the following steps of (1) loading a calibration piece model, an open circuit calibration piece model and a short circuit calibration piece model;
the load calibration piece model comprises load calibration piece inductance, load calibration piece direct current resistance, resistance representing load calibration piece crosstalk and capacitance representing load calibration piece crosstalk; one end of the load calibration piece inductor is connected with one end of the resistor for representing the load calibration piece crosstalk to form one end of a single port of a load calibration piece model, the other end of the load calibration piece inductor is connected with one end of the direct-current resistor of the load calibration piece, the other end of the resistor for representing the load calibration piece crosstalk is connected with one end of the capacitor for representing the load calibration piece crosstalk, and the other end of the capacitor for representing the load calibration piece crosstalk is connected with the other end of the direct-current resistor of the load calibration piece to form the other end of the single port of the load calibration piece model;
the open circuit calibration piece model comprises an open circuit calibration piece capacitor, a resistor for representing open circuit calibration piece crosstalk and a capacitor for representing open circuit calibration piece crosstalk; one end of the open-circuit calibration piece capacitor is connected with one end of the resistor for representing the open-circuit calibration piece crosstalk to form one end of a single port of the open-circuit calibration piece model, the other end of the resistor for representing the open-circuit calibration piece crosstalk is connected with one end of the capacitor for representing the open-circuit calibration piece crosstalk, and the other end of the capacitor for representing the open-circuit calibration piece crosstalk is connected with the other end of the open-circuit calibration piece capacitor to form the other end of the single port of the open-circuit calibration piece model;
the short circuit calibration piece model comprises a short circuit calibration piece inductor, a resistor for representing the crosstalk of the short circuit calibration piece and a capacitor for representing the crosstalk of the short circuit calibration piece; one end of the short circuit calibration piece inductor is connected with one end of the resistor for representing the short circuit calibration piece crosstalk to form one end of a single port of a short circuit calibration piece model, the other end of the resistor for representing the short circuit calibration piece crosstalk is connected with one end of the capacitor for representing the short circuit calibration piece crosstalk, and the other end of the capacitor for representing the short circuit calibration piece crosstalk is connected with the other end of the short circuit calibration piece inductor to form the other end of the single port of the short circuit calibration piece model.
3. The method of claim 2, wherein said calculating admittances of different calibration pieces from S-parameters of said different calibration pieces comprises:
according to
Calculating admittances of different calibration pieces;
wherein S is11Representing the S parameter of a single port of different calibration elements, Y representing the admittance of different calibration elements, ZopenRepresenting the impedance of the open calibration member, Z0Representing the characteristic impedance of the system.
4. The method for determining parameters in an on-chip calibration piece model according to claim 2 or 3, wherein the determining the admittance formula corresponding to different on-chip calibration piece models according to the on-chip calibration piece models corresponding to different calibration pieces comprises:
when the calibration piece is a load calibration piece and the piece calibration model is a load calibration piece model, the admittance formula corresponding to the load calibration piece model is as follows:
wherein, YloadRepresenting admittance of a load calibration member, RlRepresenting the DC resistance of the load calibration member, j representing an imaginary number, ω representing the angular frequency, LloadIndicating the measured inductance, R, of the load calibration piece at a predetermined frequencysRepresenting the resistance characterizing the crosstalk of the load calibration member, CsRepresenting the capacitance, Y, characterizing the crosstalk of the load calibration member1Represents RlAnd LloadOf series admittance, Y2Is represented by CsAnd RsThe series admittance of (a).
5. The method for determining parameters in an on-chip calibration piece model according to claim 2 or 3, wherein the determining the admittance formula corresponding to different on-chip calibration piece models according to the on-chip calibration piece models corresponding to different calibration pieces comprises:
when the calibration piece is an open-circuit calibration piece and the piece calibration model is an open-circuit calibration piece model, the admittance formula corresponding to the open-circuit calibration piece model is as follows:
wherein, YopenAdmittance of open-circuit calibration elements, CopenIndicating that the open calibration piece capacitance, R, was measured at a predetermined frequencys' denotes the resistance, C, characterizing open etalon crosstalks' denotes the capacitance, Y, characterizing open etalon crosstalk1' represents CopenAdmittance of (A), Y2' represents Cs' and RsThe series admittance of'.
6. The method for determining parameters in an on-chip calibration piece model according to claim 2 or 3, wherein the determining the admittance formula corresponding to different on-chip calibration piece models according to the on-chip calibration piece models corresponding to different calibration pieces comprises:
when the calibration piece is a short circuit calibration piece and the piece calibration model is a short circuit calibration piece model, the admittance formula corresponding to the short circuit calibration piece model is as follows:
wherein, YshortIndicating admittance of the short-circuit calibration element, LshortIndicating short circuit calibration inductance, R, measured at a predetermined frequencys"represents the resistance characterizing the crosstalk of the short calibration piece, Cs"denotes the capacitance, Y, characterizing the short circuit calibration piece crosstalk1"represents LshortAdmittance of (A), Y2"represents Cs"and Rs"series admittance.
7. The method of any one of claims 1-3, wherein said calculating parameters characterizing different calibration piece crosstalk in different calibration piece models according to the admittance of said different calibration pieces and the corresponding admittance formula comprises:
substituting the admittances of the different calibration pieces into corresponding admittance formulas to calculate to obtain capacitances representing crosstalk of the different on-chip calibration pieces and impedances corresponding to series admittances representing resistances representing crosstalk of the different on-chip calibration pieces;
determining the real part of the impedance as the resistance characterizing the crosstalk of different on-chip calibration pieces; the imaginary part of the impedance is determined as the capacitance characterizing the crosstalk of the different on-chip calibration elements.
8. An apparatus for parameter determination in a model of a sheet alignment member, comprising:
the device comprises a determining module, a judging module and a judging module, wherein the determining module is used for determining different on-chip calibration piece models, and the different on-chip calibration piece models are circuits formed by connecting two elements representing different on-chip calibration piece crosstalk in series at two ends of the end face of an original calibration piece model in parallel;
the measurement module is used for calibrating the on-chip S parameter test system by adopting a multi-line TRL calibration method based on a terahertz frequency band, and measuring to obtain S parameters of different calibration pieces;
the calculation module is used for calculating the admittance of different calibration pieces according to the S parameters of the different calibration pieces;
the calculation module is further used for determining admittance formulas corresponding to different on-wafer calibration piece models according to on-wafer calibration piece models corresponding to different calibration pieces;
and the calculation module is also used for calculating parameters representing crosstalk of different calibration pieces in different on-chip calibration piece models according to the admittances of the different calibration pieces and the corresponding admittance formulas.
9. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 7 when executing the computer program.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the steps of the method according to any one of claims 1 to 7.
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| PCT/CN2021/096852 WO2022033124A1 (en) | 2020-08-14 | 2021-05-28 | Method for determining parameters in on-chip calibrator model |
| US17/550,487 US20220099736A1 (en) | 2020-08-14 | 2021-12-14 | Method for Determining Parameters in On-Wafer Calibration Piece Model |
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