CN114325201A - Self-calibration-based multi-port S parameter de-embedding method and device and electronic equipment - Google Patents
Self-calibration-based multi-port S parameter de-embedding method and device and electronic equipment Download PDFInfo
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Abstract
The invention provides a self-calibration-based multiport S parameter de-embedding method, a self-calibration-based multiport S parameter de-embedding device and electronic equipment, wherein the self-calibration-based multiport S parameter de-embedding method comprises the following steps: calibrating the S parameter of the probe tip surface on a wafer and measuring to obtain a multi-port S parameter matrix; measuring the direct current resistance of the load standard component; obtaining an S parameter of a preset de-embedding structure; obtaining two port S parameters of the switching lead and the bonding pad to be de-embedded according to the S parameter of the de-embedding structure and the direct current resistance; processing the multi-port S parameter matrix to obtain calibrated two-port S parameters; and obtaining two-port S parameters of the device to be tested based on the calibrated two-port S parameters and the two-port S parameters of the switching lead and the bonding pad to be de-embedded, and processing the two-port S parameters of all the devices to be tested to obtain multi-port S parameters of the devices to be tested. According to the method, model parameters of the de-embedding structure do not need to be known, the influence of probe movement on a result in the de-embedding process is effectively reduced, and the de-embedding precision is high; meanwhile, the embedded removing structure occupies a small area, so that the test cost is effectively reduced, and the test efficiency is improved.
Description
Technical Field
The invention relates to the technical field of De-embedding (De-embedding), in particular to a self-calibration-based multi-port S parameter De-embedding method, a self-calibration-based multi-port S parameter De-embedding device and electronic equipment.
Background
With the popularization of 5G commercialization, the traction of the requirements of new-generation communication technologies such as satellite communication and 6G, and the rapid development of semiconductor manufacturing processes, the working frequency of related components is higher and higher, and the millimeter wave and even terahertz frequency band is advanced from the radio frequency microwave frequency band. When the component model parameter is tested, the de-embedding technology is needed to de-embed the excessive structure between the component and the radio frequency probe so as to extract the real parameter.
The de-embedding process is realized by various mathematical means, such as the schematic diagram of the de-embedding process shown in fig. 1, and the S-parameter de-embedding is realized by stripping the input network a and the output network B from the whole test network to obtain the actual S-parameters of the DUT (such as the signal flow diagram shown in fig. 7). Based on the test or simulation result, the extension of the test end face is realized, and finally, the real result of the tested component is extracted. The current de-embedding technology includes the following four ways:
1. two-step de-embedding method based on equivalent circuit model
The method comprises the steps of calibrating to a probe tip end face in a first step, measuring a de-embedding structure in a second step, and finally obtaining a de-embedded result through operation among an impedance matrix Z, an admittance matrix Y and a scattering parameter matrix S by utilizing a matrix transformation technology, wherein the most common method is an Open-circuit (Open) -Short-circuit (Short) method. The method uses an equivalent circuit model to simplify the actual problem, the model precision gradually decreases along with the increase of the frequency, and the model is misaligned above 20 GHz. On the basis, more de-embedding structures are added, so that the application range can be improved to about 50GHz, but the method is limited by the structure of a semiconductor manufacturing process and has low universality.
2. Two-step de-embedding method based on signal flow model
The method also comprises the steps of calibrating to the end face of the probe in the first step, measuring the de-embedding structure in the second step, and finally obtaining a de-embedded result by utilizing a matrix transformation technology through operation between a scattering parameter matrix S and a scattering cascade matrix T, wherein the most common method is a TRL (Thru-reflector-Line) de-embedding method. The method has high-frequency precision, but the measurement start-stop frequency range is required to be 1: within 8 ranges, the wide frequency band requires a multi-section transmission line structure, which occupies a large area of the wafer, and when the low frequency is 5< GHz, the transmission line is too long and has poor precision, and the application range is limited.
3. One-step calibration method based on self-calibration algorithm
The method uses a self-calibration algorithm to directly measure a calibration structure on a wafer for calibration, and the calibration end face is further pushed to the end face of a piece to be measured, but a special algorithm of special calibration software is used, such as LRRM (Line-Reflect Open-Reflect Short-Match) of Wincal software of Formfactor company. However, this method is expensive, can only be applied during calibration, cannot store de-embedding structure parameters, cannot perform off-line de-embedding operation after testing, and is inconvenient to use.
4. EM simulation method based on electromagnetic field simulation software
The method uses electromagnetic simulation software to carry out three-dimensional electromagnetic field simulation by using a finite element FEM algorithm to obtain the result of the structure to be subjected to de-embedding, the precision completely depends on the simulation software setting, the accurate three-dimensional size of the structure to be subjected to de-embedding and the physical information of each layer of material, the use is limited, and the precision fluctuation is large.
At present, the existing methods have the problems of narrow applicable frequency range, low precision and the like, can be only applied to two-port network de-embedding at present, and are not applicable to multi-port S parameter de-embedding application. Therefore, the development of a multiport de-embedding technology which combines high precision and broadband has very urgent needs and very important practical significance.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a method, an apparatus and an electronic device for multi-port S-parameter de-embedding based on self-calibration, which are used to solve the problem that the de-embedding method in the prior art is not suitable for multi-port S-parameters.
In order to achieve the above and other related objects, the present invention provides a self-calibration based multi-port S parameter de-embedding method, in which a device under test is provided with a de-embedding structure, the method at least includes the following steps:
s1, carrying out on-chip calibration on the S parameter of the probe tip surface, and measuring to obtain a multi-port S parameter matrix;
s2, measuring the direct current resistance of the load standard component;
s3, acquiring an S parameter of a preset de-embedding structure;
s4, obtaining two port S parameters of the switching lead and the bonding pad to be de-embedded according to the S parameter of the de-embedding structure and the direct current resistance; the de-embedding structure comprises an open circuit, a short circuit, a load and a through;
s5, processing the multi-port S parameter matrix to obtain calibrated two-port S parameters;
and S6, obtaining two-port S parameters of the device to be tested based on the calibrated two-port S parameters and the two-port S parameters of the switching lead and the bonding pad to be de-embedded, and processing the two-port S parameters of all the devices to be tested to obtain multi-port S parameters of the devices to be tested.
Preferably, the S-parameters of the probe tip face are on-chip calibrated using the SOLR algorithm.
Preferably, the SOLR calibration algorithm based on a 10-term error model performs an on-chip calibration of the S-parameters of the probe tip face.
Preferably, the multiple ports are disassembled into two ports which are connected in a through mode according to a set connection mode, wherein the set connection mode comprises a chain type connection mode or a radial type connection mode.
Preferably, the direct current resistance of the load standard is measured by a four-wire method by using a high-precision multimeter or a precision source meter
Preferably, the number of ports of the multi-port is greater than or equal to 3.
Preferably, on the basis of adopting an LRRM algorithm, a symmetric reciprocity condition and a statistical optimization algorithm are added, and the S parameters and the direct-current resistance of the de-embedding structure are processed to obtain the two-port S parameters of the structure to be de-embedded.
Preferably, the processing the multi-port S parameter matrix to obtain calibrated two-port S parameters includes:
decomposing the multiport S parameter matrix according to the number of combinations to obtain N (N-1)/2 two-port S parameter matrices, and converting each two-port S parameter matrix into a T parameter;
obtaining a left T parameter and a right T parameter according to the T parameter;
calculating a T parameter matrix of each two ports according to the left T parameter and the right T parameter;
the T parameter matrix is converted to calibrated two-port S parameters,
in order to achieve the technical purpose, the invention also provides a multiport S parameter de-embedding device based on self calibration, which comprises a calibration module, a test module, a calculation module and a synthesis module;
the calibration module is configured to perform on-chip calibration on the S parameter of the section of the probe tip and measure to obtain a multi-port S parameter matrix;
the testing module is configured to measure direct current resistance of the load standard component and S parameters of a preset de-embedding structure, and obtain two port S parameters of the switching lead and the bonding pad to be de-embedded according to the S parameters of the de-embedding structure and the direct current resistance;
the calculation module is configured to process the multiport S parameter matrix to obtain calibrated two-port S parameters;
and the synthesis module is configured to obtain two-port S parameters of the device to be tested based on the calibrated two-port S parameters and the two-port S parameters of the switching lead to be de-embedded and the bonding pad, and process the two-port S parameters of all the devices to be tested to obtain multi-port S parameters of the devices to be tested.
In order to achieve the above technical object, the present invention further provides an electronic device, which includes a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the self-calibration based multi-port S-parameter de-embedding method when executing the computer program.
As described above, the self-calibration based multiport S parameter de-embedding method, device and electronic device of the present invention have the following beneficial effects:
the self-calibration-based multiport S parameter de-embedding method, the self-calibration-based multiport S parameter de-embedding device and the electronic equipment can realize the calculation of the S parameters of equipment to be tested through the S parameter calculation of the left side and the right side of the de-embedding structure, model parameters of the de-embedding structure do not need to be known in the process, the influence of probe movement on a result in the de-embedding process is effectively reduced, and the de-embedding precision is high; meanwhile, the embedded removing structure occupies a small area, so that the test cost is effectively reduced, and the test efficiency is improved.
Drawings
FIG. 1 is a schematic diagram of a de-embedding process in the prior art.
Fig. 2 is a schematic structural diagram of a through structure in the self-calibration based de-embedding method of the present invention.
Fig. 3 is a schematic structural diagram of a reflective open circuit in the self-calibration based de-embedding method according to the present invention.
FIG. 4 is a schematic diagram showing a reflection short circuit in the self-calibration based de-embedding method according to the present invention.
FIG. 5 is a schematic diagram showing the structure of load matching in the self-calibration-based de-embedding method according to the present invention.
FIG. 6 is a flow chart of the self-calibration based multi-port S parameter de-embedding method according to the present invention.
Fig. 7 shows a signal flow diagram of a 10-term error model of the present invention.
FIG. 8 is a schematic diagram of the original connection structure of the present invention.
FIG. 9 is a schematic view of the "chain" structure of the present invention.
FIG. 10 is a schematic view of the "radial" structure of the present invention.
Fig. 11 is a schematic diagram of a 3-port error model in an embodiment of the invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 2-11. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
The S parameter is called Scatter parameter, i.e. scattering parameter. The S parameter adopts a network input and output relation defined by normalized incident waves and reflections, which describes the frequency domain characteristics of the transmission channel, and almost all the characteristics of the transmission channel can be seen through the S parameter. Most of the issues of signal integrity concern, such as signal reflection, crosstalk, loss, can find useful information from the S-parameters.
In particular, the S-parameter is defined by the ratio of two complex numbers, which contains information about the amplitude and phase of the signal. The S parameter is typically expressed as: sInput/output. For example, S21Is the ratio of the output signal at port 2 to the input signal at port 1 on the Device Under Test (DUT), both expressed in complex numbers.
The device to be tested (wafer) is provided with a de-embedding structure, the de-embedding structure comprises a left part and a right part, namely a left de-embedding sub-structure and a right de-embedding sub-structure, wherein the left de-embedding sub-structure is symmetrical to the right de-embedding sub-structure; the different model states of the de-embedding structure include: straight-through (Thru), reflected Open (Reflect-Open), reflected Short (Reflect-Short), and load matching (Match), as shown in fig. 2-5, respectively. It should be noted that the de-embedding structure needs to be the same as the transition structure (and the transfer lead and the bonding pad to be de-embedded) between the end surface of the device to be tested and the probe.
Based on the de-embedding structure model, the technical idea of the invention is to realize the calculation of the S parameter of the device to be measured by calculating the S parameters at the left side and the right side of the de-embedding structure, and realize the calculation of the multi-port S parameter under the condition that the model parameter of the de-embedding structure is not clear. Based on the technical concept, the self-calibration-based multiport S parameter de-embedding method, device and electronic equipment provided by the invention are described in detail through different drawings.
The method comprises the following steps:
fig. 6 is a flowchart of the self-calibration-based multi-port S-parameter de-embedding method of the present invention, and details of the self-calibration-based multi-port S-parameter de-embedding method process of the present invention are described with reference to fig. 6.
The invention provides a self-calibration-based multi-port S parameter de-embedding method, which at least comprises the following steps:
before de-embedding multiport S parameters, an initial state of a vector network analyzer needs to be set, wherein the initial state comprises a start-stop frequency point, frequency stepping, output power, a medium frequency bandwidth, average times, a port needing to be calibrated and the like.
S1, carrying out on-chip calibration on the S parameter of the probe tip surface, and measuring to obtain a multi-port S parameter matrix;
specifically, the calibration end face is pushed to the probe tip end face, and the most suitable on-chip calibration mode for specific application is selected according to actual conditions to finish S parameter calibration.
Preferably, an optimized short-open-load-pass (SOLR) algorithm is used for on-chip calibration of the S-parameters.
When the optimized SOLR algorithm is adopted for calibration, the parameters of the through Thru of the through calibration piece do not need to be known before calibration, and only the reciprocity is required to be met; the relevant parameter information can be automatically calculated and processed in the calibration process, and the calibration requirement can be effectively reduced.
Preferably, the optimized SOLR algorithm is based on a 10-term error model as shown in FIG. 7, where E isXXRepresenting difference terms describing the error model, E00 representing forward directivity terms, E11 representing forward source matching, E10 and E01 representing forward reflection tracking terms, E33 representing backward directivity terms, E22 representing backward source matching, E32 and E23 representing transmission tracking terms, and Γ X representing switch terms describing the switch states.
The invention optimizes the error model, improves the 8-term error model into the 10-term error model by adding isolation term correction on the traditional 8-term error model, improves the correction capability of high-frequency leakage signals between ports, and simultaneously provides a complex root automatic discrimination algorithm based on a 'double-phase method' to solve the 'root uncertainty' problem commonly encountered by the common SOLR algorithm and improve the robustness of the calibration algorithm.
S2, measuring the direct current resistance of the load standard component;
in the embodiment of the invention, after the de-embedding structure is constructed on the device to be tested (wafer), the direct current resistance of the load standard component is measured by using a high-precision universal meter or a precision source meter by adopting a four-wire method.
S3, acquiring an S parameter of a preset de-embedding structure;
in this embodiment, after the calibration of the S parameter is completed, the corresponding two-port S parameter is measured in different states; specifically, S parameters of the through connection, the reflection open circuit, the reflection short circuit and the load matching preset on the wafer are tested and stored in an S2p format for facilitating subsequent calling. It should be noted that the order of the states is not limited, that is, the test order of the S parameters of the through connection, the reflective open circuit, the reflective short circuit, and the load matching is arbitrary and has no difference.
S4, obtaining two port S parameters of the switching lead and the bonding pad to be de-embedded according to the S parameter of the de-embedding structure and the direct current resistance; the de-embedding structure comprises an open circuit, a short circuit, a load and a through;
on the basis of adopting an LRRM algorithm, the step adds a symmetric reciprocity condition and a statistical optimization algorithm, and processes S parameters of a direct current resistor and an on-chip de-embedding result to obtain two-port S parameters of a switching lead and a bonding pad to be de-embedded.
In the embodiment of the invention, on the basis of adopting an LRRM algorithm, a symmetric reciprocity condition and a statistical optimization algorithm are added, and S parameters and direct-current resistance of a de-embedding structure are processed to obtain two-port S parameters of a transit lead and a bonding pad to be de-embedded.
Specifically, when calculating the S parameters of the left and right de-embedding transfer leads and the bonding pads according to the S parameters of the on-chip de-embedding transfer leads and the bonding pads, the following conditions are set to be satisfied:
wherein the content of the first and second substances,
，
representing the S parameters to the left and right of the de-embedding structure, respectively, E00Representing a forward directional term, E11Denotes forward source matching, E10And E01Representing forward-reflection tracking terms, E33Representing a reverse directional term, E22Representing a reverse source match, E32And E23Representing the transfer of the trace item.
And simultaneously, storing the S parameters of the obtained left and right de-embedding structures in an S2p format to facilitate subsequent calling.
On the basis of an LRRM calibration algorithm, a symmetric reciprocity condition and a statistical optimization algorithm are added, the parameters of a de-embedding structure almost have no requirement, and only a direct-current resistance value matched with a load needs to be known; meanwhile, the de-embedding structure occupies a small area, so that the cost is effectively reduced; in addition, the de-embedding structure data can be independently stored, so that later off-line processing is facilitated, and the flexibility of the test process is greatly improved; the de-embedding precision and the frequency application range during testing of the device model from the direct current to the millimeter wave frequency band can be remarkably improved; the problem of high accuracy de-embedding when high frequency broadband components and parts model parameter is drawed is solved.
S5, processing the multi-port S parameter matrix to obtain calibrated two-port S parameters;
decomposing the multiport S parameter matrix according to the number of combinations to obtain N (N-1)/2 two-port S parameter matrices;
the multi-port calibration is mathematically equivalent to the combination of a plurality of two-end calibrations, and generally, the multi-port calibration needs sub-Thru connection and is complex and tedious to operate.
The invention considers and utilizes the port reciprocity condition, only needs N-1 times of Thru connection at most when the invention calibrates the multi-port S based on self calibration, the connection selection method can be connected according to 'chain' or 'radial', and the operation can be greatly simplified.
For example, as shown in the original connection mode of FIG. 8, the disassembled "chain" connection is shown in FIG. 9, and the disassembled "radial" connection is shown in FIG. 10.
In the embodiment of the present invention, the number of multiple ports is greater than or equal to 3, specifically, taking 3 ports as an example, as shown in the schematic diagram of the 3-port error model shown in fig. 11, the error model can be obtained from 1 port and 2 portsE 10 E 32Can be obtained from 1, 3 portsE 10 E 54Is obtained from 1 portE 01 E 10If each port satisfies the reciprocal condition, the port 1 satisfies the formula (1), and can be obtained from the formula (2)E 32 E 54Therefore, the promotion can reduce the connection times of the Thru in the calibration process. It should be noted that, due to physical practical limitations, a test system within 70GHz can generally satisfy a reciprocity condition, but a spread spectrum system above 70GHz no longer satisfies the reciprocity condition, and N × (N-1)/2 times of pass-through Thru are connected for calibration.
E01=E10 (1)
Because the de-embedding structure comprises a structure with symmetrical left and right parts, each two-port S parameter matrix is converted into a T parameter, and then the T parameter is converted into a left T parameter T according to the T parameterAAnd right T parameter TB。
Then, a T parameter matrix T of each two ports is calculated according to the left T parameter and the right T parameterDeembedded；
Finally, converting the T parameter matrix into a calibrated two-port S parameter;
and S6, obtaining two-port S parameters of the device to be tested based on the calibrated S parameters and the two-port S parameters of the structure to be de-embedded, and processing the S parameters of the two ports of all the devices to be tested to obtain multi-port S parameters of the devices to be tested.
And merging the S parameters of the two ports to obtain the multi-port S parameter of the device to be tested.
The multi-port S parameter de-embedding algorithm is based on a self-calibration method, combines the flexibility of a SOLR (Short circuit, Open circuit, Load, Reciprocal-Thru) calibration method and the accuracy of an LRRM (Line, Reflect-Open, Reflect-Short and Match) de-embedding method, ensures the de-embedding data accuracy, and adopts a matrix decomposition and combination technology to realize a complete de-embedding process aiming at the complexity of a multi-port S parameter matrix.
The embodiment of the device is as follows:
the invention also provides a multi-port S parameter de-embedding device based on self calibration, which comprises a calibration module, a test module, a calculation module and a synthesis module;
the calibration module is configured to perform on-chip calibration on the S parameter of the probe tip surface, and measure to obtain a multi-port S parameter matrix;
the testing module is configured to measure direct current resistance of the load standard component and S parameters of a preset de-embedding structure, and obtain two port S parameters of the switching lead and the bonding pad to be de-embedded according to the S parameters of the on-chip de-embedding structure and the direct current resistance;
the calculation module is configured to process the multiport S parameter matrix to obtain calibrated two-port S parameters;
and the synthesis module is configured to obtain two-port S parameters of the device to be tested based on the calibrated two-port S parameters and the two-port S parameters of the switching lead to be de-embedded and the bonding pad, and process the two-port S parameters of all the devices to be tested to obtain multi-port S parameters of the devices to be tested.
Electronic equipment embodiment:
electronic equipment, comprising a processor, a memory and a computer program stored in the memory and executable on the processor, the processor implementing the steps of the self-calibration based multi-port S-parameter de-embedding method when executing the computer program.
The self-calibration based multi-port S parameter de-embedding method has been described in detail in the method embodiments, and is not described herein again.
The Processor may be a general-purpose Processor, including a Central Processing Unit (CPU), a Network Processor (NP), etc., and may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf programmable gate array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component. The various methods, steps, and logic blocks disclosed in the embodiments of the present application may be implemented or performed. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The electronic device of the embodiments of the present application exists in various forms, including but not limited to:
(1) a mobile communication device: such devices are characterized by mobile communications capabilities and are primarily targeted at providing voice, data communications. Such terminals include: smart phones (e.g., IPhone), multimedia phones, functional phones, and low-end phones, etc.
(2) Ultra mobile personal computer device: the equipment belongs to the category of personal computers, has calculation and processing functions and generally has the characteristic of mobile internet access. Such terminals include: PDA, MID, and UMPC devices, etc., such as Ipad.
(3) A portable entertainment device: such devices can display and play multimedia content. This type of device comprises: audio and video players (e.g., iPod), handheld game players, electronic books, and smart toys and portable car navigation devices.
(4) A server: the device for providing the computing service comprises a processor, a hard disk, a memory, a system bus and the like, and the server is similar to a general computer architecture, but has higher requirements on processing capacity, stability, reliability, safety, expandability, manageability and the like because of the need of providing high-reliability service.
(5) And other electronic devices with data interaction functions.
It should be noted that, according to the implementation requirement, each component/step described in the embodiment of the present application may be divided into more components/steps, or two or more components/steps or partial operations of the components/steps may be combined into a new component/step to achieve the purpose of the embodiment of the present application.
In summary, the self-calibration-based multiport S parameter de-embedding method, device and electronic equipment provided by the invention can realize the calculation of the S parameter of the equipment to be tested through the S parameter calculation of the left side and the right side of the de-embedding structure, model parameters of the de-embedding structure are not required to be known in the process, the influence of probe movement on the result in the de-embedding process is effectively reduced, and the de-embedding precision is high; meanwhile, the embedded removing structure occupies a small area, so that the test cost is effectively reduced, and the test efficiency is improved. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A self-calibration-based multiport S parameter de-embedding method is characterized in that a device to be tested is provided with a de-embedding structure, and the method at least comprises the following steps:
s1, carrying out on-chip calibration on the S parameter of the probe tip surface, and measuring to obtain a multi-port S parameter matrix;
s2, measuring the direct current resistance of the load standard component;
s3, acquiring an S parameter of a preset de-embedding structure;
s4, obtaining two port S parameters of the switching lead and the bonding pad to be de-embedded according to the S parameter of the de-embedding structure and the direct current resistance; the de-embedding structure comprises an open circuit, a short circuit, a load and a through;
s5, processing the multi-port S parameter matrix to obtain calibrated two-port S parameters;
and S6, obtaining two-port S parameters of the device to be tested based on the calibrated two-port S parameters and the two-port S parameters of the switching lead and the bonding pad to be de-embedded, and processing the two-port S parameters of all the devices to be tested to obtain multi-port S parameters of the devices to be tested.
2. The self-calibration based multi-port S-parameter de-embedding method of claim 1, wherein an SOLR algorithm is used to perform on-chip calibration of the S-parameters of the probe tip face.
3. The self-calibration based multiport S-parameter de-embedding method of claim 2, wherein the S-parameters of the probe tip face are calibrated on-chip by an SOLR calibration algorithm based on a 10-term error model.
4. The self-calibration based multiport S-parameter de-embedding method according to claim 1, wherein the multiport is disassembled into two ports which are directly connected according to a set connection mode, wherein the set connection mode comprises a chain connection mode or a radial connection mode.
5. The self-calibration based multiport S-parameter de-embedding method according to claim 1, wherein the direct current resistance of the load standard is measured by a four-wire method by using a high-precision multimeter or a precision source meter.
6. The self-calibration based multi-port S-parameter de-embedding method according to claim 1, wherein the number of ports of the multi-port is greater than or equal to 3.
7. The self-calibration-based multiport S parameter de-embedding method as claimed in claim 1, wherein a symmetric reciprocity condition and a statistical optimization algorithm are added on the basis of an LRRM algorithm, and the S parameters and the DC resistance of the de-embedding structure are processed to obtain two-port S parameters of the structure to be de-embedded.
8. The self-calibration-based multi-port S-parameter de-embedding method according to claim 1, wherein the processing the multi-port S-parameter matrix to obtain calibrated two-port S-parameters comprises:
decomposing the multiport S parameter matrix according to the number of combinations to obtain N (N-1)/2 two-port S parameter matrices, and converting each two-port S parameter matrix into a T parameter;
obtaining a left T parameter and a right T parameter according to the T parameter;
calculating a T parameter matrix of each two ports according to the left T parameter and the right T parameter;
the T parameter matrix is converted to calibrated two-port S parameters.
9. The multi-port S parameter de-embedding device based on self calibration is characterized by comprising a calibration module, a test module, a calculation module and a synthesis module;
the calibration module is configured to perform on-chip calibration on the S parameter of the probe tip surface, and measure to obtain a multi-port S parameter matrix;
the testing module is configured to measure direct current resistance of the load standard component and S parameters of a preset de-embedding structure, and obtain two port S parameters of the switching lead and the bonding pad to be de-embedded according to the S parameters of the de-embedding structure and the direct current resistance;
the calculation module is configured to process the multiport S parameter matrix to obtain calibrated two-port S parameters;
and the synthesis module is configured to obtain two-port S parameters of the device to be tested based on the calibrated two-port S parameters and the two-port S parameters of the switching lead to be de-embedded and the bonding pad, and process the two-port S parameters of all the devices to be tested to obtain multi-port S parameters of the devices to be tested.
10. An electronic device comprising a processor, a memory and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the self calibration based multiport S-parameter de-embedding method of claims 1-8 when executing the computer program.
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| CN116449183A (en) * | 2023-04-24 | 2023-07-18 | 上海新微半导体有限公司 | De-embedding structure and method for on-chip test of radio frequency chip, storage medium and terminal |
| CN116449183B (en) * | 2023-04-24 | 2024-04-05 | 上海新微半导体有限公司 | De-embedding structure and method for on-chip test of radio frequency chip, storage medium and terminal |
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