CN112083794B - Power management circuit, electronic product and control method - Google Patents
Power management circuit, electronic product and control method Download PDFInfo
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- CN112083794B CN112083794B CN202010955567.XA CN202010955567A CN112083794B CN 112083794 B CN112083794 B CN 112083794B CN 202010955567 A CN202010955567 A CN 202010955567A CN 112083794 B CN112083794 B CN 112083794B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3293—Power saving characterised by the action undertaken by switching to a less power-consuming processor, e.g. sub-CPU
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3243—Power saving in microcontroller unit
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H7/00—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions
- H02H7/20—Emergency protective circuit arrangements specially adapted for specific types of electric machines or apparatus or for sectionalised protection of cable or line systems, and effecting automatic switching in the event of an undesired change from normal working conditions for electronic equipment
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/43—Processing of content or additional data, e.g. demultiplexing additional data from a digital video stream; Elementary client operations, e.g. monitoring of home network or synchronising decoder's clock; Client middleware
- H04N21/443—OS processes, e.g. booting an STB, implementing a Java virtual machine in an STB or power management in an STB
- H04N21/4436—Power management, e.g. shutting down unused components of the receiver
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/63—Generation or supply of power specially adapted for television receivers
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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- General Engineering & Computer Science (AREA)
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- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
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Abstract
The invention relates to a power management circuit, an electronic product and a control method, wherein a control end of a first processor is connected with a control signal output end of a second processor, a control signal output end of the first processor is connected with a control end of electronic switching equipment, an input end of a switch of the electronic switching equipment is connected with a power supply, an output end of the switch of the electronic switching equipment is connected with the power management equipment, a power output end of the power management equipment is connected with the second processor, and the standby power consumption of the first processor is lower than that of the second processor. Therefore, when the standby signal is received, the second processor controls all the peripherals to be closed and then sends a control signal to the first processor, the first processor controls the electronic switch device to be switched off so as to switch off the power supply to the power management device, the second processor and all the peripherals are switched off, and only the first processor with extremely low standby power consumption is maintained to supply power, so that the low power consumption state of the whole device is realized, the low power consumption requirement is met, and the electric energy is saved.
Description
Technical Field
The invention relates to a power management circuit, an electronic product and a control method, and belongs to the field of power control.
Background
At present, some household electronic products such as televisions, television boxes, projectors and the like have increasingly high requirements on standby power consumption, a common processing scheme for reducing the power consumption is to control a main control CPU chip of each peripheral to enter a low-power-consumption sleep mode, and although the power consumption of the main control CPU is low in the sleep mode, certain standby power consumption still exists, and the current requirement on extremely low standby power consumption cannot be met.
Disclosure of Invention
The invention aims to solve the technical problem that the power consumption of the existing electronic product during standby does not meet the requirement of low power consumption.
The invention provides a power management circuit which is characterized by comprising a signal trigger device, a first processor, a second processor, an electronic switch device and a power management device;
the output end of the signal trigger equipment is simultaneously connected with the first processor and the second processor;
the control end of the first processor is connected with the control signal output end of the second processor, and the control signal output end of the first processor is connected with the control end of the electronic switch device;
the input end of a switch of the electronic switch equipment is connected with a power supply, and the output end of the switch of the electronic switch equipment is connected with the power supply management equipment, so that the power supply supplies power to the power supply management equipment through the switch; the power supply output end of the power supply management equipment is connected with the second processor, so that the power supply management equipment outputs a power supply to supply power to the second processor;
the standby power consumption of the first processor is lower than the standby power consumption of the second processor.
Optionally, the electronic switching device includes a second NMOS transistor, a first PMOS transistor, a fifth resistor, a sixth resistor, and a seventh resistor;
one end of the seventh resistor is a control end of the electronic switching device, the other end of the seventh resistor is connected with a grid electrode of the second NMOS tube, a source electrode of the second NMOS tube is grounded, and a drain electrode of the second NMOS tube is commonly connected with one end of the fifth resistor and one end of the sixth resistor;
the other end of the fifth resistor and the drain electrode of the first PMOS tube are connected to the input end of the electronic switch device in a shared mode, the source electrode of the first PMOS tube is the output end of the electronic switch device, and the grid electrode of the first PMOS tube is connected with the other end of the sixth resistor.
Optionally, the electronic switching device includes a second NPN triode, a first PMOS transistor, a fifth resistor, a sixth resistor, and a seventh resistor;
one end of the seventh resistor is a control end of the electronic switching device, the other end of the seventh resistor is connected with a base electrode of the second NPN triode, an emitting electrode of the second NPN triode is grounded, and a collector electrode of the second NPN triode is connected to one end of the fifth resistor and one end of the sixth resistor in common;
the other end of the fifth resistor and the drain electrode of the first PMOS tube are connected to the input end of the electronic switching device in a sharing mode, the source electrode of the first PMOS tube is the output end of the electronic switching device, and the grid electrode of the first PMOS tube is connected with the other end of the sixth resistor.
Optionally, the signal triggering device is an infrared receiving device, and the infrared receiving device includes an infrared receiving head, a first electrostatic diode, a second electrostatic diode, a third diode, and a fourth diode;
the output end of the infrared receiving head is connected to the cathode of the third diode and the cathode of the fourth diode in common, and the positive power supply end of the infrared receiving head and the output end of the infrared receiving head are connected in parallel with the first electrostatic diode and the second electrostatic diode respectively in a ground connection mode;
the anode of the third diode and the anode of the fourth diode are two output ends of the infrared receiving device respectively.
Optionally, the power management circuit further includes a voltage conversion device, where the voltage conversion device steps down the voltage at the input point and supplies power to the first processor.
The invention also provides an electronic product, wherein the control circuit board of the electronic product is provided with the power management circuit, and the electronic product is one of a television box, a television and a projector.
The power management circuit comprises a signal trigger device, a first processor, a second processor, an electronic switch device and a power management device, wherein a control end of the first processor is connected with a control signal output end of the second processor, a control signal output end of the first processor is connected with a control end of the electronic switch device, an input end of a switch of the electronic switch device is connected with a power supply, and an output end of the switch of the electronic switch device is connected with the power management device, so that the power supply is used for supplying power to the power management device through the switch; the power output end of the power management device is connected with the second processor, so that the power management device outputs a power supply to supply power to the second processor, and the standby power consumption of the first processor is lower than that of the second processor. Therefore, when the standby signal is received, the second processor controls all the peripheral equipment to be closed and then sends a control signal to the first processor, the first processor controls the electronic switch equipment to be switched off so as to switch off the power supply to the power management equipment, the second processor and all the peripheral equipment are switched off, and only the first processor with extremely low standby power consumption is kept to supply power, so that the low power consumption state of the whole equipment is realized, the low power consumption requirement is met, and the electric energy is saved.
Drawings
FIG. 1 is a block diagram of a power management circuit according to an embodiment of the invention;
FIG. 2 is a circuit diagram of a power management circuit according to an embodiment of the invention;
FIG. 3 is a circuit diagram of a power management circuit according to another embodiment of the present invention;
FIG. 4 is a circuit diagram of a voltage converting apparatus of a power management circuit according to another embodiment of the invention;
FIG. 5 is a block diagram of a power management circuit including a plurality of power management devices according to the present invention;
FIG. 6 is a flow chart of a control method of power management according to an embodiment of the invention;
fig. 7 is a flowchart of a control method of power management according to another embodiment of the invention.
Detailed Description
It is to be noted that the embodiments and features of the embodiments may be combined with each other without conflict in structure or function. The present invention will be described in detail below with reference to examples.
The present invention provides a power management circuit, as shown in fig. 1, the power management circuit includes a signal triggering device 10, a first processor 20, a second processor 30, an electronic switching device 40 and a power management device 50;
wherein the output terminal of the signal triggering device 10 is connected to the first processor 20 and the second processor 30 at the same time;
the control end of the first processor 20 is connected with the control signal output end of the second processor 30, and the control signal output end of the first processor 20 is connected with the control end of the electronic switching device 40;
the input end of the switch of the electronic switch device 40 is connected with the power supply, and the output end of the switch of the electronic switch device 40 is connected with the power management device 50, so that the power supply supplies power to the power management device 50 through the electronic switch of the electronic switch device 40; the power output end of the power management device 50 is connected to the second processor 30, so that the power management device 50 outputs the power supply to supply power to the second processor 30;
the standby power consumption of the first processor 20 is lower than that of the second processor 30.
When the device where the power management circuit is located works normally, the first processor 20 outputs a control signal to control the electronic switch of the electronic switching device 40 to be turned on, so that the power supply VDD1 supplies power to the power management device 50, so that the power management device 50 is powered on to work, the power supply VDD2 is output to provide a working power supply for the second processor 30, and the second processor 30 controls the relevant peripheral devices to work normally. The voltage of the power supply VDD2 required for the operation of the second processor 30 may be the same as or different from the operating voltage VDD1 of the power management device 50, and if the same, the power management device 50 turns on or off the power supply for a simple switching function; if not, the power management device 50 further functions to convert the power supply voltage, for example, 5V voltage, into a suitable voltage for the second processor 30 to operate, for example, 3.3V, in addition to turning the power supply on or off.
When the device is powered off, the signal trigger device 10 outputs the standby signal to the first processor 20 and the second processor 30, wherein the first processor 20 is a low power consumption processor with a simpler function, the second processor 30 has a more complex function such as an ARM processor with a larger standby power consumption, the second processor 30 executes a power-off action after receiving the standby signal, such as turning off corresponding peripheral loads, taking the device where the power management circuit is located as a projector for example, turning off HDMI output and AV output, and turning off WIFI, bluetooth and display lamp peripherals, after all the peripherals are turned off, the second processor 30 outputs a control signal to the first processor 20 to notify that the peripherals of the device are turned off, so that the power-off action can be executed, the first processor 20 controls the electronic switch to be turned off according to the control signal, thereby turning off the power supply of the power supply to the power management device 50, therefore, the power management device 50 also cuts off the power supply to the second processor 30 at the same time, so that the whole device is only in the working state of the first processor 20, and after the first processor 20 controls the electronic switch to power off the second processor and other peripherals, the whole device can enter the low power consumption mode of dormancy, and the standby power consumption of the first processor 20 is extremely low and lower than that of the second processor 30, for example, the working current is in milliampere level or even microampere level, so that the whole device is ensured to be in the extremely low power consumption state, for example, lower than 0.1W, and the standby power requirement of low power consumption is met, so that the energy is saved and the related low power consumption energy standard is met.
In some embodiments of the present invention, as shown in fig. 2, the electronic switching device 40 includes a second NMOS transistor Q2, a first PMOS transistor Q1, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7;
one end of the seventh resistor R7 is a control end of the electronic switching device 40, the other end of the seventh resistor R7 is connected to the gate of the second NMOS transistor Q2, the source of the second NMOS transistor Q2 is grounded, and the drain of the second NMOS transistor Q2 is commonly connected to one end of the fifth resistor R5 and one end of the sixth resistor R6;
the other end of the fifth resistor R5 and the drain of the first PMOS transistor Q1 are commonly connected to the input terminal of the electronic switching device 40, the source of the first PMOS transistor Q1 is the output terminal of the electronic switching device 40, and the gate of the first PMOS transistor Q1 is connected to the other end of the sixth resistor R6.
The first PMOS transistor Q1 and the second NMOS transistor Q2 form a basic switching circuit of the electronic switching device 40, and when the second NMOS transistor Q2 is turned on, a voltage is applied between the drain and the gate of the first PMOS transistor Q1, so as to turn on, thereby turning on the electronic switching device 40.
Further, the electronic switch device 40 further includes a sixth capacitor C6, and the sixth capacitor C6 is connected in parallel to the gate and the drain of the first PMOS transistor Q1. As shown in fig. 2, the sixth capacitor C6 functions to filter noise interference signals, and prevents the interference signals from being loaded between the gate and the drain of the first PMOS transistor Q1 to cause the mis-conduction of the first PMOS transistor Q1, thereby improving the stability of the operation thereof.
In some embodiments of the present invention, the signal triggering device 10 is an infrared receiving device or a key device. I.e. the triggering signals that the first processor 20 and the second processor 30 can receive are infrared signals or key signals.
Taking the triggering signal device as an infrared receiving device as an example, as shown in fig. 2, the infrared receiving device includes an infrared receiving head IR, a first electrostatic diode D1, a second electrostatic diode D2, a third diode D3, and a fourth diode D4;
the output end of the infrared receiving head IR is connected with the cathode of the third diode D3 and the cathode of the fourth diode D4, and the positive power supply end of the infrared receiving head IR and the output end of the infrared receiving head IR are connected with the first electrostatic diode D1 and the second electrostatic diode D2 in parallel in a butt-joint mode respectively;
the anode of the third diode D3 and the anode of the fourth diode D4 are two output terminals of the infrared receiving device, respectively.
The operation of the power management circuit is described below with reference to fig. 2.
When the remote controller sends a standby signal, the remote control receiving head receives the standby signal and simultaneously sends the standby signal to the first processor 20 and the second processor 30 through the third diode D3 and the fourth diode D4, wherein the third diode D3 and the fourth diode D4 play an isolation role, and the port damage caused by short circuit caused by high and low levels between the receiving ports of the first processor 20 and the second processor 30 is avoided; the first electrostatic diode D1 and the second electrostatic diode D2 respectively function to filter the interference signals at the output terminal of the infrared receiver IR and the positive terminal of the power supply. The first processor 20 and the second processor 30 simultaneously analyze the remote control signal and recognize the remote control signal as a standby instruction, the second processor 30 sends a shutdown instruction to control the peripheral devices where the device is located to be turned off, for example, taking the device as a projector, turn off HDMI output and AV output, turn off WIFI, bluetooth and display lamp peripheral devices, and simultaneously complete the data processing of the second processor, for example, store some data of the second processor and the like to avoid direct power-off and lose the data of the second processor, and after the second processor 30 confirms that the peripheral devices are turned off and/or the data of the second processor are completely processed, send a control signal to the first processor 20, where the first processor 20 and the second processor 30 may transmit the control signal based on a communication mode, and if the control signal is simple, the control signal may also be transmitted based on a level mode. The first processor 20 confirms that the standby instruction is received, and after receiving the control signal, outputs a low level to the gate of the second NMOS transistor Q2, so as to turn off the second NMOS transistor Q2, when the second NMOS transistor Q2 is turned off, the voltage loaded between the gate and the drain of the first PMOS transistor Q1 disappears, so that the PWR-5V voltage of the power supply source is cut off to the power supply management device 50 along with the turning off, the power supply management device 50 herein is a circuit composed of power supply management chips of the memory IC3, and mainly performs conversion on the input voltage, that is, the 5V voltage is converted into a 3V voltage and stabilizes the voltage, and when the power supply management device 50 is powered off, the 3V output voltage is also cut off to the second processor 30, so that the whole device only has the first processor 20 to maintain power supply, and the power supply of other processors and peripheral devices is cut off. And the first processor 20 enters a low power consumption state of sleep, thereby ensuring that the entire device is in a very low power consumption state.
When the remote controller sends a power-on signal, the first processor 20 receives and is awakened from the low-power-consumption sleep mode, and resolves the power-on signal into a power-on instruction, and outputs a high-level signal to the gate of the second NMOS transistor Q2 to conduct the power-on instruction, so that a voltage is loaded between the gate and the drain of the first PMOS transistor Q1 to conduct the power-on instruction, and thus, the power supply PWR-5V supplies power to the power management device 50 mainly composed of the IC3, so that the power management device outputs a 3V voltage to supply power to the second processor 30, and the second processor 30 works after being powered on to execute related actions of power-on, so that the power-on process of the device is completed.
In some embodiments of the present invention, as shown in fig. 3, the electronic switching device 40 includes a second NPN transistor Q2, a first PMOS transistor Q1, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7;
one end of the seventh resistor R7 is a control end of the electronic switching device 40, the other end of the seventh resistor R7 is connected to the base of the second NPN triode Q2, the emitter of the second NPN triode Q2 is grounded, and the collector of the second NPN triode Q2 is commonly connected to one end of the fifth resistor R5 and one end of the sixth resistor R6;
the other end of the fifth resistor R5 and the drain of the first PMOS transistor Q1 are input terminals of the electronic switching device 40, the source of the first PMOS transistor Q1 is an output terminal of the electronic switching device 40, and the gate of the first PMOS transistor Q1 is connected to the other end of the sixth resistor R6.
The difference from the previous embodiment is that the second NPN transistor Q2 is adopted instead of the second NMOS transistor Q2, and the second NPN transistor Q2 is turned on when a high level is inputted to the base thereof, so that the gate and the drain of the first PMOS transistor Q1 are applied with a voltage, and are also turned on. Therefore, the second NMOS transistor Q2 has the same function of driving the first PMOS transistor Q1 to work.
In some embodiments of the present invention, as shown in fig. 5, the power management device 50 is plural to provide different power supply voltages to the second processor 30 and other peripherals, respectively. Because different peripheral devices need different operating voltages, a plurality of power management devices 50 are needed to output different voltages, such as 5V to 3.3V and 1.5V, to supply power to different peripheral devices. Also included in fig. 5 is another power management device 60 that outputs different voltages to power peripheral devices 70. For a circuit mainly composed of the power management chip IC3, it is only necessary to adjust the resistances of the thirteenth resistor R13 and the fourteenth resistor R14, so that the voltages input to the 3 rd pin of the chip are different, and the output voltages are different, thereby realizing the function of outputting different conversion voltages.
In some embodiments of the present invention, the power management circuit further comprises a voltage conversion device, which reduces the voltage at the input point to supply power to the first processor 20. As shown in fig. 4, since the power supply voltage of the first processor 20 is different from the power supply voltage, for example, the power supply voltage of the first processor 20 is 3.3V, and the power supply voltage is 5V, a voltage conversion circuit, mainly composed of the power management chip IC2, needs to be added to supply power to the first processor 20. Since the first processor 20 is powered at any time, the voltage conversion circuit needs to be separately provided.
The invention further provides an electronic product, and the control circuit board of the electronic product is provided with the power management circuit mentioned according to the above embodiment. These electronic products may be one of a television box, a television set, a projector. By arranging the power management circuit, the electronic products realize extremely low power consumption such as less than 0.1W when in standby, thereby meeting the requirement of low power consumption and saving energy.
The invention also provides a control method of power management, which is based on the power management circuit mentioned in the above embodiment. As shown in fig. 6, the control method includes:
step S100, acquiring and identifying a standby signal in a trigger signal output by a signal trigger device;
step S200, the second processor executes the shutdown action according to the standby signal and sends a control signal to the first processor after the execution is finished;
in step S300, the first processor controls the electronic switch device to turn off according to the standby signal and the control signal, so as to turn off the power supply to the power management device.
In step S100, taking the trigger signal as an infrared remote control signal as an example, the trigger signal is received and decoded to identify the trigger signal as a standby instruction.
In step S200, the second processor 30 executes a shutdown operation according to the standby signal, taking the device where the power management circuit is located as an example of a projector, and at this time, the projector is controlled to close the HDMI output and the AV output, and close the WIFI, the bluetooth and the display lamp peripherals, wherein some peripherals such as the WIFI and the bluetooth need the second processor 30 to communicate with the related control chips to confirm that the projector is closed, so that a short time such as 1-5 seconds is provided, and a bulb of the projector for display cannot be closed immediately due to a large working heat value of the bulb, and the corresponding heat dissipation device such as a fan needs to be operated for a period of time such as 15 seconds-1 minutes to be closed, otherwise, the bulb is easily over-heated to affect the lifetime thereof, so that the high temperature affects the lifetime of other electronic components. After the second processor 30 confirms that all the peripherals are turned off, it sends a control signal to the first processor 20 to inform the first processor 20 that the peripherals of the device are turned off.
In step S300, the first processor 20 decodes the standby instruction and confirms that the shutdown operation can be performed after receiving the control signal, and then outputs the control signal to control the electronic switch device 40 to turn off, so as to turn off the power supply to the power management device 50, and since the voltage output by the power management device 50 powers the second processor 30 and other peripherals, the power supply to all the power consuming devices except the first processor 20 is turned off. And the first processor 20 enters the sleep mode with low power consumption again, since the standby power consumption of the first processor 20 is very low and lower than that of the second processor 30, the whole projector is ensured to be in a very low power consumption state when in standby, such as lower than 0.1W. Thereby meeting the requirement of low power consumption and saving electric energy.
In some embodiments of the present invention, as shown in fig. 7, the control method further includes:
step S400, acquiring and identifying a starting signal in a trigger signal output by a signal trigger device;
step S500, the first processor controls the electronic switch device to be conducted according to the starting signal so as to supply power to the power management device;
in step S600, the second processor executes a power-on and power-on action after obtaining power supply from the power management device.
In step S400, still taking the projector as an example, when receiving the power-on signal sent by the remote controller, only the first processor 20 is in the low power consumption state of power supply, and is awakened by the infrared remote control signal to exit the low power consumption state of the sleep mode, and decodes and recognizes the power-on command.
In step S500, the first processor 20 controls the electronic switching device 40 to be turned on according to the power-on command, so as to supply power to the power management device 50, so that the power management device 50 outputs a voltage to supply power to the second processor 30 and other peripherals.
In step S600, the second processor 30 executes related power-on actions, such as turning on a bulb of the display, turning on an output port, such as an HDMI port, and the like, after obtaining the power-on action. Thereby completing the boot-up action.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may be directly contacting the second feature or the first and second features may be indirectly contacting each other through intervening media. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (8)
1. A power management circuit, comprising a signal triggering device, a first processor, a second processor, an electronic switching device, and a power management device;
wherein the output end of the signal trigger device is simultaneously connected with the first processor and the second processor;
the control end of the first processor is connected with the control signal output end of the second processor, and the control signal output end of the first processor is connected with the control end of the electronic switch device;
the input end of a switch of the electronic switch equipment is connected with a power supply, and the output end of the switch of the electronic switch equipment is connected with the power supply management equipment, so that the power supply supplies power to the power supply management equipment through the switch; the power supply output end of the power supply management equipment is connected with the second processor, so that the power supply management equipment outputs a power supply to supply power to the second processor;
the standby power consumption of the first processor is lower than that of the second processor;
the electronic switch device comprises a second NMOS transistor, a first PMOS transistor, a fifth resistor, a sixth resistor and a seventh resistor;
one end of the seventh resistor is a control end of the electronic switching device, the other end of the seventh resistor is connected with a grid electrode of the second NMOS tube, a source electrode of the second NMOS tube is grounded, and a drain electrode of the second NMOS tube is connected to one end of the fifth resistor and one end of the sixth resistor in common;
the other end of the fifth resistor and the drain electrode of the first PMOS tube are connected to the input end of the electronic switching device in a shared mode, the source electrode of the first PMOS tube is the output end of the electronic switching device, and the grid electrode of the first PMOS tube is connected with the other end of the sixth resistor;
or the electronic switching device comprises a second NPN triode, a first PMOS (P-channel metal oxide semiconductor) tube, a fifth resistor, a sixth resistor and a seventh resistor;
one end of the seventh resistor is a control end of the electronic switching device, the other end of the seventh resistor is connected to a base electrode of the second NPN triode, an emitter electrode of the second NPN triode is grounded, and a collector electrode of the second NPN triode is commonly connected to one end of the fifth resistor and one end of the sixth resistor;
the other end of the fifth resistor and the drain electrode of the first PMOS tube are connected to the input end of the electronic switching device in a shared mode, the source electrode of the first PMOS tube is the output end of the electronic switching device, and the grid electrode of the first PMOS tube is connected with the other end of the sixth resistor;
the first processor and the second processor acquire and identify standby signals in the trigger signals output by the signal trigger equipment;
the second processor executes shutdown action according to the standby signal and sends a control signal to the first processor after the execution is finished;
the first processor controls the electronic switch device to be closed according to the standby signal and the control signal so as to close power supply to the power management device and enter a dormant low-power-consumption mode;
when the remote controller sends a starting signal, the first processor is awakened from a low-power-consumption sleep mode to acquire and identify the starting signal in the trigger signal output by the signal trigger equipment;
the first processor controls the electronic switch equipment to be conducted according to the starting signal so as to supply power to the power management equipment;
and the second processor executes power-on and power-on actions after obtaining the power supply of the power management equipment.
2. The power management circuit of claim 1, wherein the power management device is multiple in number to provide different supply voltages to the second processor and other peripherals, respectively.
3. The power management circuit according to claim 1, wherein the signal triggering device is an infrared receiving device, and the infrared receiving device comprises an infrared receiving head, a first electrostatic diode, a second electrostatic diode, a third diode and a fourth diode;
the output end of the infrared receiving head is commonly connected with the cathode of the third diode and the cathode of the fourth diode, and the positive power supply end of the infrared receiving head and the output end of the infrared receiving head are connected in parallel with the first electrostatic diode and the second electrostatic diode respectively in a ground-to-ground manner;
and the anode of the third diode and the anode of the fourth diode are respectively two output ends of the infrared receiving equipment.
4. The power management circuit of claim 1, further comprising a voltage conversion device that steps down a voltage at the input to power the first processor.
5. An electronic product, wherein the power management circuit according to any one of claims 1 to 4 is disposed on a control circuit board of the electronic product, and the electronic product is one of a television box, a television set, and a projector.
6. A control method of power management, based on the power management circuit of any one of claims 1 to 4, the control method comprising:
acquiring and identifying a standby signal in a trigger signal output by a signal trigger device;
the second processor executes shutdown action according to the standby signal and sends a control signal to the first processor after the execution is finished;
the first processor controls the electronic switch device to be closed according to the standby signal and the control signal so as to close power supply to the power management device.
7. The control method according to claim 6, characterized by further comprising:
acquiring and identifying a starting signal in a trigger signal output by a signal trigger device;
the first processor controls the electronic switch equipment to be conducted according to the starting signal so as to supply power to the power management equipment;
and the second processor executes power-on and power-on actions after obtaining the power supply of the power management equipment.
8. The control method of claim 6, wherein the shutdown action performed by the second processor comprises:
and controlling all external devices connected with the second processor to be closed.
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| CN202010955567.XA CN112083794B (en) | 2020-09-11 | 2020-09-11 | Power management circuit, electronic product and control method |
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| CN115065569B (en) * | 2022-08-08 | 2022-11-11 | 南方电网数字电网研究院有限公司 | Hardware control system of electric power thing networking chip equipment |
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