CN112073651A - Control method for preventing signal switching display abnormity - Google Patents
Control method for preventing signal switching display abnormity Download PDFInfo
- Publication number
- CN112073651A CN112073651A CN202010982561.1A CN202010982561A CN112073651A CN 112073651 A CN112073651 A CN 112073651A CN 202010982561 A CN202010982561 A CN 202010982561A CN 112073651 A CN112073651 A CN 112073651A
- Authority
- CN
- China
- Prior art keywords
- signal
- level
- state
- video
- vsync
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/76—Television signal recording
- H04N5/765—Interface circuits between an apparatus for recording and another apparatus
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Transforming Electric Information Into Light Information (AREA)
Abstract
The invention discloses a control method for preventing signal switching display abnormity, wherein a display signal is based on a Vesa format and comprises three component data signals RGB, namely a line signal Hsync, a field signal Vsync, an enable signal DE and red, green and blue, and the method comprises the following steps: the selection switching module simultaneously receives two external input signals VideoIn _1 and VideoIn _2, the level of an external switching trigger level Signal QH _ Signal is turned over once after each enabling, the default state is a low level, and the selection switching module outputs a Signal source expected to be output after processing according to the high-low state of the level; wherein, the triggering level signal is a low level when the triggering level signal is not triggered by default, the output signal is VideoIn _1, and the State is State1 at this time; the output signal is VideoIn _2 after the trigger is enabled, and the State is State 2. The control method is simple, and can effectively prevent the problem of abnormal display caused in the process of switching two or more paths of signals with different sources and different resolutions.
Description
Technical Field
The invention relates to the technical field of display of displays, in particular to a control method for preventing abnormal display of signal switching.
Background
Some onboard intelligent displays or video monitors need to display various different graphics or video pictures, and the switching of the display pictures is realized by pressing keys of a light guide plate or touch control. When signals are switched, if the detected external switching signal level is directly used as a switch to switch different signal sources to be output to a display screen, signal pull wires or abnormal signals are easily caused at the switching moment, and the use of a pilot is influenced. Particularly, some displays need to amplify or reduce external multiple display signals with different resolutions and output the signals to a display screen for display, and display disorder is more easily caused in the switching process due to different sources of signals and different resolutions in the display switching process.
Therefore, it is urgently needed to provide a control method for effectively preventing the occurrence of the pulling wire or other abnormal display faults of the signals when the signals of different resolution ratios and different signal sources are switched to output and displayed.
Disclosure of Invention
The invention aims to provide a control method for preventing signal switching display abnormity, which is simple and can effectively prevent the display abnormity problem caused in the process of switching two or more paths of signals with different sources and different resolutions.
In order to achieve the above object, the present invention provides a control method for preventing signal switching display abnormality, wherein a display signal is based on Vesa format and includes a row signal Hsync, a field signal Vsync, an enable signal DE, and a red, green, and blue component data signal RGB, including:
the selection switching module simultaneously receives two external input signals VideoIn _1 and VideoIn _2, the level of an external switching trigger level Signal QH _ Signal is turned over once after each enabling, the default state is a low level, and the selection switching module outputs a Signal source expected to be output after processing according to the high-low state of the level; wherein the content of the first and second substances,
the trigger level signal is a low level when the trigger level signal is not triggered by default, the output signal is VideoIn _1, and the State is State1 at the moment; the output signal is VideoIn _2 after the trigger is enabled, and the State is State 2.
Preferably, the method comprises the following steps: detecting a falling edge of a video signal VideoIn _1 field signal Vsync _1, and when the falling edge arrives, setting the level of a position signal Vsync _ neg1 to be high, and setting the position of the position signal Vsync _ neg1 to be low if not;
the falling edge of the video signal video _2 field signal Vsync _2 is detected, and when the falling edge comes, the level of the signal Vsync _ neg2 is high, and if not, the signal is low.
Preferably, the falling edge detection processes of the VideoIn _1 and the VideoIn _2 are performed concurrently.
Preferably, the method comprises the following steps: the video output is in a State1, the trigger level Signal QH _ Signal is enabled to be in a high level, and the video output waits for Vsync _ neg1 to be in a high level to enter a State 2; the trigger level Signal QH _ Signal is again enabled and then toggled low, waiting for Vsync _ neg2 to go high and return to State 1.
Preferably, State1 and State2 enable toggling depending on whether QH _ Signal is triggered.
Preferably, the method comprises the following steps: after entering the State2, the driving signals of the output signal Video _ Out, namely the row signal Hsync _ Out, the field signal Vsync _ Out and the enable signal DE _ Out are respectively assigned as the driving signals Hsync _2, Vsync _2 and DE _2 of the Video in _2, and the data signal RGB _ Out is assigned as RGB2_ Black;
the driving signals of the output signal Video _ Out, i.e., the row signal Hsync _ Out, the field signal Vsync _ Out, and the enable signal DE _ Out, after entering the State1, are assigned to the driving signals Hsync _1, Vsync _1, and DE _1 of the Video in _1, respectively, and the data signal RGB _ Out is assigned to RGB1_ Black.
Preferably, the method comprises the following steps: setting a timer, resetting a Time counter of which the State is switched from State2 to State1 or from State1 to State2, timing the Time by the timer after the State is switched to the corresponding State, and keeping the data not to be accumulated after the Time is greater than the Time.
Preferably, when the timer counts less than Time, the corresponding R, G, B data values of the data signals RGB1_ Black and RGB2_ Black are both 0; otherwise, the R, G, B data values of RGB1_ Black are R1, G1 and B1 respectively, and the R, G, B data values of RGB2_ Black are R2, G2 and B2 respectively.
Preferably, the timing Time is set to be more than 3 times of the scanning Time of one frame of video from the video source of the output display terminal, and the value is not more than 100 ms.
According to the technical scheme, the falling edge of the field signal of the input video is detected, the falling edge of the switched field signal needs to be waited for when the video output is switched, the output signal can be ensured to be at the starting time of one frame signal after the switching, and the condition that the frame signal interrupts the abnormal signal can not occur. And assigning a driving signal of the switched signal to a driving signal of the output signal immediately after the signals are switched, assigning a data signal to be 0, and assigning the data signal to be the data signal of the switched signal after the Time is counted. The black field picture of the short Time accords with the signal switching process, so that human eyes cannot perceive the abnormity, and if the black field is not inserted, the data signal and the driving signal are possibly misaligned in the switching process to cause the display to have the condition of wire drawing or other abnormity.
The timing Time is set to be more than 3 times of the scanning Time of one frame of video of a video source of the output display terminal, and the aim is to ensure that the output video signal is stable enough after switching, but the Time cannot be too long, if the Time is more than 100ms, the black field display Time is too long, and human eyes can obviously perceive that a black field picture is inserted between two signals in the signal switching process.
For the switching of multiple video signals (more than 3 paths), the switching method is similar, a plurality of states State1, State2, State3 and the like can be set, when the external switching enable signal is satisfied and the falling edge of the video signal field signal to be output arrives, the next State is entered, and the black field of the Time is inserted in the switching process.
Additional features and advantages of the invention will be set forth in the detailed description which follows.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention and not to limit the invention. In the drawings:
fig. 1 is a schematic block diagram of a control method for preventing a signal switching display abnormality according to the present invention.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, not limitation.
In the present invention, unless otherwise specified, the directional terms included in the terms merely represent the directions of the terms in a conventional use state or are colloquially known by those skilled in the art, and should not be construed as limiting the terms.
The invention provides a control method for preventing signal switching display abnormity, wherein a display signal is based on a Vesa format and comprises Hsync (horizontal signal), Vsync (field signal), DE (enable signal) and RGB (red, green and blue three-component data signal).
The Signal processing functional block diagram is shown in fig. 1, the selection switching module receives two external input signals, namely, VideoIn _1 and VideoIn _2, the level of an external switching trigger level Signal QH _ Signal is inverted once after each enabling, the default state is a low level, and the selection switching module outputs a Signal source expected to be output after processing according to the high-low state of the level.
The default of the trigger level signal is low level when not triggered, the output signal is VideoIn _1, the State at this time is called State1, the output signal after trigger enable is VideoIn _2, and the State is State 2. The specific implementation method for video switching comprises the following steps:
1) detecting a falling edge of a video signal VideoIn _1 field signal Vsync _1, and when the falling edge arrives, setting the level of a position signal Vsync _ neg1 to be high, and setting the position of the position signal Vsync _ neg1 to be low if not; the falling edge of the video signal video _2 field signal Vsync _2 is detected, and when the falling edge comes, the level of the signal Vsync _ neg2 is high, and if not, the signal is low. The two video signal falling edge detection processes are performed concurrently.
2) The video output is in a State1, the trigger level Signal QH _ Signal is enabled to be in a high level, and the video output waits for Vsync _ neg1 to be in a high level to enter a State 2; the trigger level Signal QH _ Signal is again enabled and then toggled low, waiting for Vsync _ neg2 to go high and return to State 1. The two states switch back and forth depending on whether QH _ Signal is triggered to enable.
3) The driving signals Hsync _ Out (row signal), Vsync _ Out (field signal), and DE _ Out (enable signal) of the output signal Video _ Out after entering the State2 are assigned to the driving signals Hsync _2, Vsync _2, and DE _2 of the Video in _2, respectively, and the data signals RGB _ Out are assigned to RGB2_ Black; the driving signals Hsync _ Out (row signal), Vsync _ Out (field signal), and DE _ Out (enable signal) of the output signal Video _ Out after entering the State1 are assigned to the driving signals Hsync _1, Vsync _1, and DE _1 of the Video in _1, respectively, and the data signals RGB _ Out are assigned to RGB1_ Black;
4) setting a timer, resetting a Time counter of which the State is switched from State2 to State1 or from State1 to State2, timing the Time by the timer after the State is switched to the corresponding State, and keeping the data not to be accumulated after the Time is greater than the Time.
5) When the timer counts the data signals RGB1_ Black and RGB2_ Black to be less than Time, the corresponding R, G, B data values are both 0; otherwise, the R, G, B data values of RGB1_ Black are R1, G1 and B1 respectively, and the R, G, B data values of RGB2_ Black are R2, G2 and B2 respectively.
6) The timing Time is set to be more than 3 times of the scanning Time of one frame of video of the video source of the output display terminal, and the value of the timing Time is not more than 100 ms. Taking the commonly used 60Hz scanning frequency of the display terminal as an example, if one frame of scanning Time is about 16.7ms, the Time can be 50.1 ms-100 ms.
Further, the method is not limited to the switching of two videos, and the control method is similar to the switching of two videos when three or more videos are switched.
By the technical scheme, the falling edge of the field signal of the input video is detected, the falling edge of the switched field signal needs to be waited for when the video output is switched, the output signal can be ensured to be in the starting time of one frame signal after switching, and the condition that the frame signal interrupts the signal abnormally can not occur. And assigning a driving signal of the switched signal to a driving signal of the output signal immediately after the signals are switched, assigning a data signal to be 0, and assigning the data signal to be the data signal of the switched signal after the Time is counted. The black field picture of the short Time accords with the signal switching process, so that human eyes cannot perceive the abnormity, and if the black field is not inserted, the data signal and the driving signal are possibly misaligned in the switching process to cause the display to have the condition of wire drawing or other abnormity.
The timing Time is set to be more than 3 times of the scanning Time of one frame of video of a video source of the output display terminal, and the aim is to ensure that the output video signal is stable enough after switching, but the Time cannot be too long, if the Time is more than 100ms, the black field display Time is too long, and human eyes can obviously perceive that a black field picture is inserted between two signals in the signal switching process.
For the switching of multiple video signals (more than 3 paths), the switching method is similar, a plurality of states State1, State2, State3 and the like can be set, when the external switching enable signal is satisfied and the falling edge of the video signal field signal to be output arrives, the next State is entered, and the black field of the Time is inserted in the switching process.
The preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, however, the present invention is not limited to the specific details of the above embodiments, and various simple modifications can be made to the technical solution of the present invention within the technical idea of the present invention, and these simple modifications are within the protective scope of the present invention.
It should be noted that the various technical features described in the above embodiments can be combined in any suitable manner without contradiction, and the invention is not described in any way for the possible combinations in order to avoid unnecessary repetition.
In addition, any combination of the various embodiments of the present invention is also possible, and the same should be considered as the disclosure of the present invention as long as it does not depart from the spirit of the present invention.
Claims (9)
1. A control method for preventing abnormal display of signal switching is disclosed, the display signal is based on Vesa format, it includes line signal Hsync, field signal Vsync, enable signal DE, three component data signal RGB of red, green and blue, it includes:
the selection switching module simultaneously receives two external input signals VideoIn _1 and VideoIn _2, the level of an external switching trigger level Signal QH _ Signal is turned over once after each enabling, the default state is a low level, and the selection switching module outputs a Signal source expected to be output after processing according to the high-low state of the level; wherein the content of the first and second substances,
the trigger level signal is a low level when the trigger level signal is not triggered by default, the output signal is VideoIn _1, and the State is State1 at the moment; the output signal is VideoIn _2 after the trigger is enabled, and the State is State 2.
2. The control method for preventing the display abnormality of the signal switching according to claim 1, comprising:
detecting a falling edge of a video signal VideoIn _1 field signal Vsync _1, and when the falling edge arrives, setting the level of a position signal Vsync _ neg1 to be high, and setting the position of the position signal Vsync _ neg1 to be low if not;
the falling edge of the video signal video _2 field signal Vsync _2 is detected, and when the falling edge comes, the level of the signal Vsync _ neg2 is high, and if not, the signal is low.
3. The control method for preventing abnormal display of signal switching according to claim 2, wherein the falling edge detection processes of the VideoIn _1 and the VideoIn _2 are performed concurrently.
4. The control method for preventing the display abnormality of the signal switching according to claim 1, comprising:
the video output is in a State1, the trigger level Signal QH _ Signal is enabled to be in a high level, and the video output waits for Vsync _ neg1 to be in a high level to enter a State 2; the trigger level Signal QH _ Signal is again enabled and then toggled low, waiting for Vsync _ neg2 to go high and return to State 1.
5. The control method for preventing display abnormality in Signal switching according to claim 4, wherein State1 and State2 enable switching back and forth according to whether QH _ Signal is triggered.
6. The control method for preventing the display abnormality of the signal switching according to claim 4, comprising:
after entering the State2, the driving signals of the output signal Video _ Out, namely the row signal Hsync _ Out, the field signal Vsync _ Out and the enable signal DE _ Out are respectively assigned as the driving signals Hsync _2, Vsync _2 and DE _2 of the Video in _2, and the data signal RGB _ Out is assigned as RGB2_ Black;
the driving signals of the output signal Video _ Out, i.e., the row signal Hsync _ Out, the field signal Vsync _ Out, and the enable signal DE _ Out, after entering the State1, are assigned to the driving signals Hsync _1, Vsync _1, and DE _1 of the Video in _1, respectively, and the data signal RGB _ Out is assigned to RGB1_ Black.
7. The control method for preventing the display abnormality of the signal switching according to claim 4, comprising: setting a timer, resetting a Time counter of which the State is switched from State2 to State1 or from State1 to State2, timing the Time by the timer after the State is switched to the corresponding State, and keeping the data not to be accumulated after the Time is greater than the Time.
8. The control method of claim 7, wherein when the data signals RGB1_ Black and RGB2_ Black are less than Time, the corresponding R, G, B data values are all 0; otherwise, the R, G, B data values of RGB1_ Black are R1, G1 and B1 respectively, and the R, G, B data values of RGB2_ Black are R2, G2 and B2 respectively.
9. The control method according to claim 7, wherein the timing Time is set to be more than 3 times of the scanning Time of one frame of video from the video source of the output display terminal, and the value is not more than 100 ms.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010982561.1A CN112073651B (en) | 2020-09-17 | 2020-09-17 | Control method for preventing abnormal signal switching display |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202010982561.1A CN112073651B (en) | 2020-09-17 | 2020-09-17 | Control method for preventing abnormal signal switching display |
Publications (2)
Publication Number | Publication Date |
---|---|
CN112073651A true CN112073651A (en) | 2020-12-11 |
CN112073651B CN112073651B (en) | 2022-08-19 |
Family
ID=73680962
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202010982561.1A Active CN112073651B (en) | 2020-09-17 | 2020-09-17 | Control method for preventing abnormal signal switching display |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN112073651B (en) |
Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05191723A (en) * | 1992-01-10 | 1993-07-30 | Fujitsu General Ltd | Field compensation circuit for picture processor |
JPH08202320A (en) * | 1995-01-25 | 1996-08-09 | Nec Home Electron Ltd | Mode changeover method and device for display device |
US5917552A (en) * | 1996-03-29 | 1999-06-29 | Pixelvision Technology, Inc. | Video signal interface system utilizing deductive control |
US6037925A (en) * | 1996-04-17 | 2000-03-14 | Samsung Electronics Co., Ltd. | Video signal converting apparatus and a display device having the same |
CN1340961A (en) * | 2000-07-19 | 2002-03-20 | 夏普株式会社 | Circuit for generating synchronous signals |
US20040160408A1 (en) * | 2003-02-17 | 2004-08-19 | Hwang Gi-Soon | Driver circuit for liquid crystal panel and LCD using the same |
CN101568018A (en) * | 2008-04-22 | 2009-10-28 | 中兴通讯股份有限公司 | Rotational-free panoramic photography device and monitoring system comprising same |
US20100073560A1 (en) * | 2008-09-19 | 2010-03-25 | Sony Corporation | Video display device, method of displaying connectors, transmission-line state detection device, transmission line-state detection method and semiconductor integrated circuit |
CN102075723A (en) * | 2011-01-07 | 2011-05-25 | 天津天地伟业数码科技有限公司 | Switching device and switching method of asynchronous videos |
CN201887897U (en) * | 2010-12-21 | 2011-06-29 | 天津市亚安科技电子有限公司 | Circuit for synchronous switching of two-way video signal |
CN104717442A (en) * | 2013-12-12 | 2015-06-17 | 中国航空工业集团公司第六三一研究所 | Method of automatically converting video of multiple formats to VESA (Video Electronics Standards Association)-protocol 1600*1200-resolution 60Hz-frame rate video |
CN106934758A (en) * | 2017-03-01 | 2017-07-07 | 南京大学 | A kind of three-dimensional image video real time integrating method and system based on FPGA |
CN106941591A (en) * | 2015-10-28 | 2017-07-11 | 拉碧斯半导体株式会社 | The output intent of semiconductor device, video display system and vision signal |
CN110933333A (en) * | 2019-12-06 | 2020-03-27 | 河海大学常州校区 | Image acquisition, storage and display system based on FPGA |
-
2020
- 2020-09-17 CN CN202010982561.1A patent/CN112073651B/en active Active
Patent Citations (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05191723A (en) * | 1992-01-10 | 1993-07-30 | Fujitsu General Ltd | Field compensation circuit for picture processor |
JPH08202320A (en) * | 1995-01-25 | 1996-08-09 | Nec Home Electron Ltd | Mode changeover method and device for display device |
US5917552A (en) * | 1996-03-29 | 1999-06-29 | Pixelvision Technology, Inc. | Video signal interface system utilizing deductive control |
US6037925A (en) * | 1996-04-17 | 2000-03-14 | Samsung Electronics Co., Ltd. | Video signal converting apparatus and a display device having the same |
CN1340961A (en) * | 2000-07-19 | 2002-03-20 | 夏普株式会社 | Circuit for generating synchronous signals |
US20040160408A1 (en) * | 2003-02-17 | 2004-08-19 | Hwang Gi-Soon | Driver circuit for liquid crystal panel and LCD using the same |
CN101568018A (en) * | 2008-04-22 | 2009-10-28 | 中兴通讯股份有限公司 | Rotational-free panoramic photography device and monitoring system comprising same |
US20100073560A1 (en) * | 2008-09-19 | 2010-03-25 | Sony Corporation | Video display device, method of displaying connectors, transmission-line state detection device, transmission line-state detection method and semiconductor integrated circuit |
CN201887897U (en) * | 2010-12-21 | 2011-06-29 | 天津市亚安科技电子有限公司 | Circuit for synchronous switching of two-way video signal |
CN102075723A (en) * | 2011-01-07 | 2011-05-25 | 天津天地伟业数码科技有限公司 | Switching device and switching method of asynchronous videos |
CN104717442A (en) * | 2013-12-12 | 2015-06-17 | 中国航空工业集团公司第六三一研究所 | Method of automatically converting video of multiple formats to VESA (Video Electronics Standards Association)-protocol 1600*1200-resolution 60Hz-frame rate video |
CN106941591A (en) * | 2015-10-28 | 2017-07-11 | 拉碧斯半导体株式会社 | The output intent of semiconductor device, video display system and vision signal |
CN106934758A (en) * | 2017-03-01 | 2017-07-07 | 南京大学 | A kind of three-dimensional image video real time integrating method and system based on FPGA |
CN110933333A (en) * | 2019-12-06 | 2020-03-27 | 河海大学常州校区 | Image acquisition, storage and display system based on FPGA |
Non-Patent Citations (2)
Title |
---|
QIUBO CHEN: "Algorithm and VLSI Architecture of Edge-Directed Image Upscaling for 4k Display System", 《IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY ( VOLUME: 26, ISSUE: 9, SEPT. 2016)》 * |
宋海吒等: "基于FPGA和OV7620的图像采集及VGA显示", 《电视技术》 * |
Also Published As
Publication number | Publication date |
---|---|
CN112073651B (en) | 2022-08-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9875522B2 (en) | Display control apparatus | |
US8350780B1 (en) | System, method and computer program product for controlling stereoscopic glasses | |
US20060109347A1 (en) | Interface and method for image data transmission | |
EP1804234A2 (en) | Display apparatus and control method thereof | |
US9892524B2 (en) | Image displaying methods, devices, and storage media | |
JP6362116B2 (en) | Display device, control method therefor, program, and storage medium | |
US8799939B2 (en) | Video receiving apparatus and video receiving method | |
KR100449739B1 (en) | Display device and method for checking input signal | |
US20170195668A1 (en) | Television pcb testing device | |
US7508355B2 (en) | Method for recognizing video signal timing of analog input | |
CN112073651B (en) | Control method for preventing abnormal signal switching display | |
US10257439B2 (en) | Semiconductor device, video display system and video signal output method | |
KR100676701B1 (en) | Display apparatus | |
EP2071829A1 (en) | Signal processing apparatus and control method thereof | |
EP3239810A1 (en) | Kvm switch | |
US10896652B2 (en) | Display control device and liquid crystal display device including display control device | |
JP2005215557A (en) | Display device and method | |
JP2011139249A (en) | Display device | |
EP4202902A1 (en) | Display apparatus and method for preventing image burn-in thereof | |
US7002607B2 (en) | Apparatus and method for compensating image blocking artifacts | |
KR100683141B1 (en) | Lcd for auto selecting of tv input signal | |
KR20040060058A (en) | Selecting method of multi-input in television | |
JP2002311927A (en) | Video switching system | |
CN111445882A (en) | Image display ghost filtering method and system based on FPGA | |
KR100536710B1 (en) | Noise prevention apparatus of high digital signal |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |