CN112071765B - Method for determining wafer processing parameters and wafer processing method - Google Patents
Method for determining wafer processing parameters and wafer processing method Download PDFInfo
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Abstract
The invention provides a method for determining wafer processing parameters and a wafer processing method, wherein the method for determining the wafer processing parameters comprises the following steps: acquiring flatness data of preset lines on a plurality of wafers in a wafer processing procedure; determining radial data of the preset lines according to the flatness data of the preset lines; and determining the processing parameters of the silicon wafer according to the radial data of the predetermined lines of the wafers. According to the method, the parameters of the subsequent processing procedure of the silicon rods or the wafers in the subsequent batch can be determined through the processing data of the silicon rods in the previous batch, so that the flatness accuracy of the obtained wafers is higher, the processing yield is higher, and the cost can be reduced.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a method for determining wafer processing parameters and a wafer processing method.
Background
The nanotopography is used as a flatness parameter for representing convex-concave components of 0.2-tens mm of wafers, and has extremely important influence on subsequent chips. The nanotopography is mainly generated in the slicing and thinning stage of the silicon wafer, but because the numerical value involved in the nanotopography is smaller, in the slicing and thinning stage, because the surface of the silicon wafer is rough, a capacitive or double-sided laser measurement mode is generally adopted, only a plurality of linear scanning data are measured, and the measuring position is mainly a notch as a reference, as shown in fig. 2, notch lines passing through the notch point and the center of a circle are measured in fig. 2, and then the other 3 lines are measured after rotating for 45 degrees in turn. Because the positions of the wafers in the adhesive rod are random, the positions of notch lines can not represent the cutting condition completely after the notch is completed, and the conditions of the wafer process can not be known. In addition, the existing measurement only records the measurement data of each line in the background database, and does not perform corresponding processing. The measuring mode can detect the flatness change of a large area, but the result of the local nano morphology cannot be known, and the existing measuring mode and data processing cannot enable the process personnel to perform corresponding tracing and control, so that the accuracy of the nano morphology is lower.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems in the related art to some extent. Therefore, an object of the present invention is to provide a method for determining processing parameters of silicon wafers, which can effectively improve the nanotopography of the wafer surface by tracing the processing procedure and flatness data of the previous batch of silicon rods and adjusting the processing parameters of the wafers in real time or the parameters of the subsequent processing procedure of the wafers in time.
In one aspect, the invention provides a method of determining wafer processing parameters. According to an embodiment of the invention, the method comprises: acquiring flatness data of predetermined lines on a plurality of wafers in a wafer processing procedure, wherein the flatness data comprises at least one of thickness data and shape data; determining radial data of the preset lines according to the flatness data of the preset lines; and determining the processing parameters of the silicon wafer according to the radial data of the predetermined lines of the wafers. According to the method, the parameters of the subsequent processing procedure of the silicon rods or the wafers in the subsequent batch can be determined through the processing data of the silicon rods in the previous batch, so that the flatness accuracy of the obtained wafers is higher, the processing yield is higher, and the cost can be reduced.
According to the embodiment of the invention, a plurality of wafers in the processing procedure are sourced from the same silicon rod.
According to an embodiment of the invention, the predetermined line satisfies at least one of the following conditions: the preset line comprises a datum line which passes through the inlet edge and the outlet edge and is parallel to the cutting direction; the preset line is a straight line obtained by taking the center of a circle of the wafer as a midpoint and rotating the datum line at a certain angle clockwise or anticlockwise; the number of the preset lines is at least 1; and the included angles between any two adjacent preset lines are equal.
According to an embodiment of the invention, the reference line is obtained by: positioning to obtain the bonding corner of the source silicon rod of the wafer; the bonding corner is an included angle between the datum line and the notch line before cutting; the notch line is a straight line passing through a notch point and a circle center on the wafer; when the flatness data of the wafer are measured, the position of the notch line is positioned first, the bonding rotation angle is input into a measuring machine, and the wafer is rotated according to the bonding rotation angle degree, so that the datum line is obtained.
According to an embodiment of the present invention, determining wafer processing parameters from the radial data of a plurality of predetermined lines of the wafers includes: the radial data of the preset lines of the wafers are collected in the same drawing to obtain a collected drawing; and determining parameters of the silicon processing procedure according to the collected graph.
According to an embodiment of the present invention, the summary map is obtained by: drawing a radial flatness data curve of each preset line by taking the radial position coordinate of the preset line as an abscissa and the flatness data as an ordinate; and converging radial flatness data curves of a plurality of preset lines of the wafer in the same drawing at intervals in parallel, wherein the ordinate or the abscissa of the converged drawing is the radial position coordinate of the preset lines.
According to an embodiment of the present invention, the processing process includes at least one of a cutting process, a thinning process, and a polishing process.
According to an embodiment of the present invention, the flatness data includes at least one of thickness, warp, and total thickness deviation.
According to an embodiment of the invention, the cutting process parameters include at least one of a cutting speed and a cutting temperature.
According to an embodiment of the present invention, the thinning process parameter includes at least one of a horizontal and a vertical corresponding position of the grinding wheel.
According to an embodiment of the present invention, the polishing process parameter includes at least one of a polishing rate and a polishing time.
According to an embodiment of the present invention, the plurality of wafers are obtained after continuous dicing, the flatness parameter is a warp, the dicing process parameter is a dicing speed, and determining the parameters of the silicon processing process according to the integration map includes: and if the warping degree shows that the edge position deflects towards the left direction corresponding to the middle position, determining that the cutting speed is slow and fast.
In another aspect of the invention, a method of processing a wafer is provided. According to an embodiment of the invention, the method comprises: obtaining the flatness parameters or flatness collection graphs of the cutting process of the previous batch by the method, and judging whether the flatness parameters exceed a defined range or have continuous deviation towards the same direction; and adjusting parameters of the cutting process in real time or adjusting parameters of the thinning process in time.
According to an embodiment of the present invention, the processing method of the wafer includes: obtaining the flatness parameters or flatness collection graphs of the thinning process of the previous batch by the method, and judging whether the line with the largest numerical value in the flatness parameters exceeds a defined range; and adjusting the parameters of the thinning in real time or adjusting the parameters of the polishing process in time.
Drawings
FIG. 1 is a flow chart of a method for determining wafer processing parameters based on wafer flatness data according to one embodiment of the invention.
FIG. 2 is a schematic diagram of a prior art measuring line.
Fig. 3 is a schematic view of an adhesive corner according to an embodiment of the present invention.
FIG. 4 is a schematic illustration of determining predetermined lines in accordance with one embodiment of the present invention.
Fig. 5 is a schematic view of radial position coordinates of a predetermined line of an embodiment of the present invention.
FIG. 6 is a graph of radial thickness data for a plurality of test lines on a wafer in accordance with one embodiment of the present invention.
FIG. 7 is a summary of radial data for thickness of predetermined lines of a plurality of wafers in accordance with one embodiment of the invention.
FIG. 8 is a graph of radial warp data for a plurality of test lines on a wafer in accordance with one embodiment of the present invention.
FIG. 9 is a summary plot of warp radial data for predetermined lines of a plurality of wafers in accordance with one embodiment of the invention.
Detailed Description
Embodiments of the present invention are described in detail below. The following examples are illustrative only and are not to be construed as limiting the invention. The examples are not to be construed as limiting the specific techniques or conditions described in the literature in this field or as per the specifications of the product. The reagents or apparatus used were conventional products commercially available without the manufacturer's attention.
In one aspect, the invention provides a method of determining wafer processing parameters.
Referring to fig. 1, the method of determining wafer processing parameters according to an embodiment of the present invention includes the steps of:
s100: flatness data of predetermined lines on a plurality of wafers in a wafer processing process is acquired, the flatness data including at least one of thickness data and shape data.
It is understood that in the wire cutting process of the silicon rod, a plurality of wafers can be obtained after one silicon rod is cut, the plurality of silicon rods can be sequentially cut in the cutting process, and the wafers obtained in the cutting process can be sequentially processed in the subsequent thinning process, polishing process and the like. In some embodiments, the plurality of wafers in the processing procedure originate from the same silicon rod, i.e. the plurality of wafers are a plurality of wafers cut by a single silicon rod. Therefore, the detection precision is improved, and the flatness precision of the obtained wafer is improved.
According to the embodiment of the invention, based on the cutting principle, the silicon rod wire cutting process is performed in the same direction, so that the influence of the cutting parameters on the thickness or shape of the wafer needs to be confirmed by referring to the change of the cutting direction. Therefore, in the embodiment of the invention, the measurement data of the cutting line direction is intercepted for analysis.
Specifically, the wafer surface is still very rough during the processing, and a capacitive or double-sided laser measurement method is generally adopted, and only a plurality of linear scan data are measured, as shown in fig. 4, which is an 8-line measurement method, and the predetermined line satisfies at least one of the following conditions: the preset line comprises a datum line (shown as a line with an arrow in the figure) which passes through the inlet edge and the outlet edge and is parallel to the cutting direction; the preset line is a straight line obtained by taking the center of a circle of the wafer as a midpoint and rotating the datum line at a certain angle clockwise or anticlockwise; the number of the predetermined lines is at least 1 (specifically, 1, 2,3, 4, 5, 6, 7 or 8, etc.); and the included angles between any two adjacent preset lines are equal.
It should be noted that, the "the predetermined line satisfies one of the following conditions" means that the predetermined line may satisfy any one, any two, any three or all four of the 4 conditions, and specifically will not be described in detail. Other similar descriptions are the same as those described herein, and will not be described in detail.
Specifically, referring to fig. 3, the reference line is obtained by: positioning to obtain a bonding corner A of a source silicon rod of the wafer; the bonding corner is an included angle between the datum line 10 and the notch line 20 before cutting; the notch line is a straight line passing through a notch point 21 on the wafer and the circle center O; when the flatness data of the wafer are measured, the position of the notch line is positioned first, the bonding rotation angle is input into a measuring machine, and the measuring machine enables the wafer to rotate according to the bonding rotation angle number, so that the datum line is obtained. Through the measurement to the adhesion corner, can find the cutting position very fast to the influence of cutting process to the roughness is known more easily.
Specifically, as shown in fig. 3, the line penetrating through the inlet knife edge and the outlet knife edge is used as a reference line for measurement, so that the subsequent process can be better monitored. The inventors found through a large number of experiments that, as shown in fig. 6 and 8, line 1 is a reference line of the feed port and the discharge port, compared with other 7 lines, the TTV and the warp value of line 1 are the largest, and the data of the flatness of the reference line are collected and analyzed, so that the process can be guided and improved more effectively.
It should be noted that, the "source silicon rod of the wafer" in the description manner herein means that the source silicon rod is wire-cut to obtain the wafer, that is, the wafer is wire-cut to obtain the source silicon rod.
According to the embodiment of the invention, stick sticking results of a stick sticking machine are intercepted, data analysis is carried out, the sticking corner is obtained, then the sticking corner is automatically input through the communication function of the measuring machine, measurement is carried out, and a datum line is automatically calculated according to the sticking corner. The technical scheme of the invention can quickly obtain the measurement result, reduce personnel judgment and data processing, and avoid the problem of manual judgment, thereby causing adjustment errors.
According to embodiments of the present invention, the specific type of flatness data may be selected according to actual inspection needs, and in some embodiments, the flatness data includes at least one of Thickness (THK), warp (Warp), and total thickness deviation (TTV).
S200: and determining radial data of the preset lines according to the flatness data of the preset lines.
In the step, the original flatness data of the preset line output by the measuring machine is converted into radial data of the preset line. Specifically, the radial data of the predetermined line takes the distance between each point on the predetermined line and an intersection point of the predetermined line and the wafer edge as the position coordinates of the point. In some embodiments, the predetermined line is a straight line passing through the center of the wafer, the predetermined line intersects with the edge of the wafer, and two ends in the length direction of the predetermined line have intersection points with the edge of the wafer, where the intersection point of any one end may be taken as a0 point, and a distance between the point on the predetermined line and the intersection point taken as the 0 point may be taken as a position coordinate of the point, and specifically may take a positive value or a negative value.
The specific form of the radial data will be described in detail below by taking a predetermined line as an example of a straight line passing through the center of a circle of a wafer, specifically referring to fig. 5, an intersection point of one end of the predetermined line and the edge of the wafer is taken as a 0 point, a distance between a point on the predetermined line and the 0 point is taken as a position coordinate of the point, specifically, if a distance between a point a on the predetermined line and the 0 point is 50mm, when the distance takes a positive value, and when the distance takes a negative value, the position coordinate of the point a is-50 mm according to the form of the radial data.
S300: and determining the processing parameters of the silicon wafer according to the radial data of the predetermined lines of the wafers.
It can be understood that the variation trend of the flatness of the plurality of wafers can be seen according to the radial data of the plurality of predetermined lines, and the variation trend of the flatness of the plurality of wafers can effectively reflect the influence of the wafer processing parameters on the flatness of the wafers, so that the subsequent wafer processing parameters can be adjusted accordingly, and the flatness accuracy of the obtained wafers is higher.
In some embodiments, determining the wafer processing parameters from the radial data for a plurality of predetermined lines of the wafers may include: the radial data of the preset lines of the wafers are collected in the same drawing to obtain a collected drawing; and determining parameters of the silicon processing procedure according to the collected graph. Therefore, the change trend of the flatness of a plurality of wafers can be intuitively seen through the collected graph, so that the influence of processing parameters on the flatness of the wafers can be more conveniently and rapidly determined, and further the processing parameters of the subsequent wafers can be effectively determined, so that the wafers with higher flatness accuracy can be obtained.
It should be noted that, the "drawing" described herein refers to the main drawing and all auxiliary elements on the drawing, including map title, legend, scale, illustration, drawing, attached table, text description and other contents.
According to an embodiment of the present invention, the summary map is obtained by: drawing a radial flatness data curve of each preset line by taking the radial position coordinate of the preset line as an ordinate and the flatness data as an abscissa; and converging the radial flatness data curves of the preset lines of the wafers in the same drawing at intervals in parallel, wherein the abscissa or the ordinate of the converged drawing is the radial position coordinate of the preset lines. Therefore, the flatness change trend of a plurality of wafers can be intuitively seen through the collected graph, and the wafer processing parameters can be more accurately adjusted, so that the quality and the yield of the obtained wafers are improved.
According to an embodiment of the present invention, the specific kind of the processing process is not particularly limited, and may specifically include at least one of a cutting process, a thinning process, and a polishing process. Further, the parameters of the processing procedure are not particularly limited, and may be any processing parameters affecting the flatness of the wafer, and in some embodiments, the parameters of the cutting procedure include at least one of a cutting speed and a cutting temperature; the thinning process parameters comprise at least one of horizontal and vertical corresponding positions of the grinding wheel; the polishing process parameter includes at least one of a polishing rate and a polishing time. Therefore, the wafer with higher flatness accuracy is facilitated to be obtained.
It can be appreciated that, according to previous production experience, a person skilled in the art clearly knows the correlation between the flatness variation of the wafer and the processing parameters, so that after knowing the flatness variation trend of a plurality of wafers, the processing parameters of the subsequent wafers can be effectively adjusted according to the actual production experience, thereby obtaining adjusted processing parameters capable of effectively improving the flatness accuracy of the wafers. It will be understood that this section eliminates the known abnormal related data, and the remaining data is combined and then debugged by the defined wire-cut debug method.
In the method of the present invention, the flatness data of the wafer obtained in the previous processing step may be used to adjust the parameters of the current processing step and the subsequent processing step, specifically, the processing sequence of the wafer is generally performed according to the sequence of cutting, thinning and polishing, the flatness data of the wafer obtained after cutting may be used to adjust the parameters of the cutting process and the thinning process, and the flatness data of the wafer obtained after thinning may be used to adjust the parameters of the thinning process and the polishing process. In some embodiments, the flatness data of the wafer obtained in each process is used to adjust the parameters of the current process, i.e., the flatness data of the diced wafer is used to adjust the dicing process parameters, the flatness data of the thinned wafer is used to adjust the thinning process parameters, and the flatness data of the polished wafer is used to adjust the thinning process parameters. Therefore, the yield of each procedure is effectively improved through real-time or timely adjustment, and the yield of the final product is improved.
According to a specific embodiment of the present invention, the plurality of wafers are obtained after continuous dicing, the flatness parameter is a total thickness deviation, the dicing process parameter is a dicing speed, and determining the parameters of the silicon processing process according to the integrated drawing plane includes: and if the total thickness deviation shows low edge and thick middle, determining that the cutting speed is slow and fast. Through real-time adjustment, the stability of cutting quality is effectively improved, the stability of flatness precision of the subsequent wafer is higher, the stability and yield of the final quality of the product are improved, and the processing cost is relatively reduced.
The method of the present invention will be specifically described below taking Thickness (THK) and warp (warp) as examples of flatness data, respectively.
In a specific example, a silicon rod is cut through a wire cutting process to obtain wafers, thickness data of a plurality of lines are measured on each wafer, the thickness data are converted into radial data, radial position coordinates are taken as an abscissa, the thickness data are taken as an ordinate, and a radial thickness data curve is drawn. Specifically, taking a wafer shown in fig. 4 (fig. 4 shows a radial thickness data curve corresponding to a plurality of test lines on a wafer) as an example, in the stick bonding process, a bonding corner of a silicon stick of a wafer source can be obtained, a measuring machine is used for rotating the wafer according to the bonding corner degree to obtain a reference line, thickness data of the plurality of test lines including the reference line are measured and converted into radial data, a radial position coordinate is taken as an abscissa, and the radial thickness data curve corresponding to each test line is drawn by taking the thickness data as an ordinate, wherein the corresponding radial thickness data curve is the radial thickness data curve of a preset line of the wafer. According to the method, radial thickness data curves of the preset lines of the plurality of wafers are determined, then the radial thickness data curves of the preset lines of the plurality of wafers are integrated in the same drawing, the plurality of radial thickness data curves are distributed in parallel and at intervals in the abscissa direction or the ordinate direction, the ordinate or the abscissa is the radial position coordinates of the preset lines, an integrated drawing (as shown in fig. 7, the integrated drawing of TTV of line 1 is shown in fig. 7), the change trend of the thicknesses of the plurality of wafers in the cutting direction can be intuitively seen in fig. 7, namely, the thickness of the wafers in the cutting direction of line 1 presents a small feed port position TTV value, and then the gradually increased change trend is presented. And further, the following wafer processing parameters can be adjusted by a person skilled in the art according to the correlation between the thickness variation trend and the processing parameters.
In the same embodiment, a silicon rod is cut through a wire cutting procedure to obtain wafers, then warp data of a plurality of lines are measured on each wafer, the warp data are converted into radial data, the radial position coordinates are taken as abscissa, the warp data are taken as ordinate, and a radial warp data curve is drawn. Specifically, taking a wafer shown in fig. 4 (fig. 4 shows a radial warpage data curve corresponding to a plurality of test lines on a wafer) as an example, in a stick bonding process, a bonding corner of a silicon stick of a wafer source can be obtained, a measuring machine is used for rotating the wafer according to the bonding corner degree to obtain a reference line, warpage data of the plurality of test lines including the reference line is measured and converted into radial data, a radial position coordinate is taken as an abscissa, the warpage data is taken as an ordinate, and a radial warpage data curve corresponding to each test line (as shown in fig. 8) is drawn, wherein the radial warpage data curve corresponding to the reference line is a radial warpage data curve of a predetermined line of the wafer. According to the method, radial warpage data curves of the preset lines of the plurality of wafers are determined, then the radial warpage data curves of the preset lines of the plurality of wafers are converged in the same graph, the plurality of radial warpage data curves are distributed in parallel and at intervals in the abscissa direction or the ordinate direction, the ordinate or the abscissa is the radial position coordinates of the preset lines, a converged graph (as shown in fig. 9, fig. 9 is the converged graph of the warpage of the line 1) is obtained, and the change trend of the warpage of the plurality of wafers, namely the warpage change situation of the line 1, namely the warpage in the cutting direction is that the edge position deflects towards the left corresponding to the middle position, can be intuitively seen from fig. 9.
With reference to the TTV and warp data and the summary map shown in fig. 6 to 9, the cutting speed in the cutting process may be adjusted in real time, and the change is made to be slow first and fast second, so that the warp data is more accurate (it should be noted that, in this document, only the cutting speed in the cutting process is adjusted according to the summary map, but those skilled in the art will understand that the summary map may also be used to adjust other process parameters, such as the cutting temperature in the cutting process, the horizontal and vertical corresponding positions of the grinding wheel in the thinning process, or the polishing rate and polishing time in the polishing process, which will not be repeated herein).
Table 1 is a summary of nanotopography data of wafers after the process was adjusted and not previously adjusted based on the data of fig. 6 to 9 and the summary map.
According to the table, the processing parameters of the silicon wafer are determined by the method, the nanotopography of each procedure, especially the nanotopography value of the final product, is effectively improved, and the final yield of the product is improved. It is worth mentioning that the measurement method before and after improvement is inconsistent, the worst position of the silicon wafer can be measured by the improved method, and the nanotopography value of the same wafer can be higher, but after the cutting procedure is improved by the method, even though the different test methods are adopted, the nanotopography value after improvement is lower, which further indicates that the nanotopography of each procedure is effectively improved.
According to the method provided by the embodiment of the invention, the processing parameters of the subsequent wafers can be determined by the back trace of the processing data of the previous silicon rod/wafer, so that the flatness accuracy of the obtained wafers is higher, the processing yield is higher, and the cost can be reduced.
In another aspect of the invention, a method of processing a wafer is provided. According to some embodiments of the invention, the method comprises: obtaining the flatness parameters or flatness collection graphs of the cutting process of the previous batch by the method, and judging whether the flatness parameters exceed a defined range or have continuous deviation towards the same direction; and adjusting parameters of the cutting process in real time or adjusting parameters of the thinning process in time.
According to other embodiments of the present invention, the processing method of the wafer may include: obtaining the flatness parameters or flatness collection graphs of the thinning process of the previous batch by the method, and judging whether the line with the largest numerical value in the flatness parameters exceeds a defined range; and adjusting the parameters of the thinning in real time or adjusting the parameters of the polishing process in time.
Therefore, the processing parameters are adjusted in real time in the processing process, the processing yield can be greatly improved, the cost is reduced, and meanwhile, the quality of the obtained wafer is good.
It should be noted that, because the wire-electrode cutting requires a longer time, although the flatness data according to which the cutting parameters are adjusted is the flatness data obtained by the latest detection, the wafers corresponding to the flatness data and the wafers obtained by cutting with the adjusted cutting parameters may be two adjacent batches, or may be separated by several batches, that is, the flatness test results of the wafers of the previous batch or the previous batches are used to adjust the cutting parameters of the wafers of the subsequent batch. The time required for thinning and polishing is short, and the polishing device can be timely adjusted according to the current state.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms are not necessarily directed to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, the different embodiments or examples described in this specification and the features of the different embodiments or examples may be combined and combined by those skilled in the art without contradiction.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (9)
1. A method of determining wafer processing parameters, comprising:
acquiring flatness data of predetermined lines on a plurality of wafers in a wafer processing procedure, wherein the flatness data comprises at least one of thickness data and shape data;
determining radial data of the preset lines according to the flatness data of the preset lines;
Determining a silicon wafer processing parameter based on the radial data of a plurality of predetermined lines of the wafer,
The predetermined line is satisfied by the fact that,
The predetermined line comprises a datum line passing through the inlet edge and the outlet edge and being parallel to the cutting direction, and
The preset line is a straight line obtained by taking the center of a circle of the wafer as a midpoint and rotating the datum line at a certain angle clockwise or anticlockwise;
Wherein, the datum line is obtained by the following steps: positioning to obtain the bonding corner of the source silicon rod of the wafer; the bonding corner is an included angle between the datum line and the notch line before cutting; the notch line is a straight line passing through a notch point and a circle center on the wafer; when the flatness data of the wafer are measured, the position of the notch line is positioned first, the bonding rotation angle is input into a measuring machine, and the measuring machine enables the wafer to rotate according to the bonding rotation angle degree, so that the datum line is obtained.
2. The method of claim 1, wherein a plurality of the wafers in the processing sequence originate from the same silicon rod.
3. The method of claim 1, wherein the predetermined line is further satisfied,
The number of the predetermined lines is at least 2,
And the included angles between any two adjacent preset lines are equal.
4. The method of claim 1, wherein determining wafer processing parameters from the radial data of a plurality of predetermined lines of the wafers comprises:
the radial data of the preset lines of the wafers are collected in the same drawing to obtain a collected drawing;
and determining parameters of the silicon processing procedure according to the collected graph.
5. The method of claim 4, wherein the summary map is obtained by:
Drawing a radial flatness data curve of each preset line by taking the radial position coordinate of the preset line as an abscissa and the flatness data as an ordinate;
And converging the radial flatness data curves of the preset lines of the wafers in the same drawing at intervals in parallel, wherein the abscissa or the ordinate of the converged drawing is the radial position coordinate of the preset lines.
6. The method of any one of claims 1-5, wherein the machining process comprises at least one of a cutting process, a thinning process, and a polishing process.
7. The method of claim 6, wherein the flatness data includes at least one of thickness, warpage, and total thickness deviation;
the cutting process parameters comprise at least one of cutting speed and cutting temperature;
the thinning process parameters comprise at least one of horizontal and vertical corresponding positions of the grinding wheel;
The polishing process parameter includes at least one of a polishing rate and a polishing time.
8. The method of claim 6, wherein determining wafer processing parameters from the radial data of a plurality of predetermined lines of the wafers comprises:
the radial data of the preset lines of the wafers are collected in the same drawing to obtain a collected drawing;
determining parameters of a silicon processing procedure according to the collected drawing;
The plurality of wafers are obtained after continuous cutting, the flatness data are warp degrees, the cutting process parameters are cutting speeds, and the determining parameters of the silicon processing process according to the collected drawing plane comprises the following steps:
and if the warp value shows that the edge position deflects towards the left direction corresponding to the middle position, determining that the cutting speed is slow and fast.
9. A method of processing a wafer, comprising:
the flatness data or flatness summary map of the cutting process of the previous batch is obtained by the method of any one of claims 6 to 8,
Judging whether the flatness data exceeds a defined range or whether the deviation continuously exists in the same direction;
parameters of the cutting process are adjusted in real time or parameters of the thinning process are adjusted in time;
Or alternatively
The flatness data or flatness map of the thinning process of the previous batch is obtained by the method of any one of claims 6 to 8,
Judging whether the line with the largest numerical value in the flatness data exceeds a defined range;
parameters of the thinning process are adjusted in real time or parameters of the polishing process are adjusted in time;
determining wafer processing parameters from the radial data of a plurality of predetermined lines of the wafers comprises:
the radial data of the preset lines of the wafers are collected in the same drawing to obtain a collected drawing;
and determining parameters of the silicon processing procedure according to the collected graph.
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