CN112067970B - Plate intelligent test system with verification function - Google Patents
Plate intelligent test system with verification function Download PDFInfo
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- CN112067970B CN112067970B CN202010754228.5A CN202010754228A CN112067970B CN 112067970 B CN112067970 B CN 112067970B CN 202010754228 A CN202010754228 A CN 202010754228A CN 112067970 B CN112067970 B CN 112067970B
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- 238000012360 testing method Methods 0.000 title claims abstract description 53
- 238000012795 verification Methods 0.000 title claims description 29
- 230000001960 triggered effect Effects 0.000 claims abstract description 25
- 238000004891 communication Methods 0.000 claims abstract description 17
- 238000001514 detection method Methods 0.000 claims description 20
- 238000000034 method Methods 0.000 claims description 15
- 238000010586 diagram Methods 0.000 description 3
- 230000002159 abnormal effect Effects 0.000 description 2
- 230000005856 abnormality Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000010926 purge Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2884—Testing of integrated circuits [IC] using dedicated test connectors, test elements or test circuits on the IC under test
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
- G01R1/02—General constructional details
- G01R1/04—Housings; Supporting members; Arrangements of terminals
- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G01R1/0416—Connectors, terminals
Abstract
The invention relates to an intelligent board testing system with a checking function, which comprises: the panel socket is installed with the panel to be tested in a pluggable manner, the panel working circuit can be electrically connected with the panel socket, the array switch is connected with the panel socket and/or the panel working circuit, the control unit is connected with the array switch, the communication unit is connected with the control unit, and the display unit is connected with the communication unit; the display unit displays virtual nodes corresponding to the connection nodes of the array switch, the display unit comprises a checking unit and an executing unit, the checking unit checks and outputs a checking result according to the corresponding relation of the virtual nodes when the virtual nodes are triggered, and the executing unit generates or clears connecting lines between the virtual nodes according to the checking result; when the execution unit generates or clears the connection between the virtual nodes, the control unit triggers the corresponding connection nodes in the array switch to be connected or disconnected according to the connection. The invention is convenient to operate and can improve the reliability of the test result.
Description
Technical Field
The invention relates to the technical field of plate testing, in particular to an intelligent plate testing system with a verification function.
Background
The number of overhaul check-up plates of each round of the large sub-bay and the ridge Australian nuclear power stations is huge and is close to 300, and the main defects and defects of the traditional plate check-up mode are overcome: the wiring mode is realized through the wiring of tens or even hundreds of pins, which is not only not intuitive but also messy, and increases the wiring error probability; meanwhile, more signal sources and measuring instruments are required to be externally connected when the plate is verified, and the field arrangement management difficulty is increased in the test process; meanwhile, because of complex wiring, the fault point is difficult to find when abnormality occurs, and the fault point is difficult to quickly and accurately locate. Meanwhile, in the plate test process, the error connection between the plates cannot be actively identified, so that the test process is abnormal, an accurate test result cannot be obtained, and the test result is unreliable.
Disclosure of Invention
The invention aims to solve the technical problems of the prior art and provides an intelligent board testing system with a verification function.
The technical scheme adopted for solving the technical problems is as follows: construct a take plate intelligent test system of check-up function, include: the panel socket is installed with the panel to be tested in a pluggable manner, and can be electrically connected with the panel socket, an array switch connected with the panel socket and/or the panel working circuit, a control unit connected with the array switch, a communication unit connected with the control unit and a display unit connected with the communication unit; wherein,
the display unit displays virtual nodes corresponding to the connection nodes of the array switch, the display unit comprises a checking unit and an executing unit,
the verification unit verifies the corresponding relation of the virtual nodes when the virtual nodes are triggered and outputs a verification result, and the execution unit generates or clears the connection lines between the virtual nodes according to the verification result;
and when the execution unit generates or clears the connection between the virtual nodes, the control unit triggers the corresponding connection nodes in the array switch to be connected or disconnected according to the connection.
Preferably, the panel working circuit comprises a power supply unit, a reference signal output unit and an output detection unit;
the array switch includes:
a first array switch connecting first attribute pins of the board socket to form a connection relationship between the first attribute pins;
a second array switch connecting a second attribute pin of the board socket with the power supply unit to form a connection relationship between the power supply unit and the second attribute pin;
a third array switch connecting a third attribute pin of the board socket with the reference signal output unit to form a connection relationship between the reference signal output unit and the third attribute pin; and/or
And a fourth array switch for connecting the fourth attribute pin of the panel socket with the output detection unit to form a connection relationship between the fourth attribute pin and the output detection unit.
Preferably, the communication unit is connected with the reference signal output unit and is used for controlling the reference signal output unit to output a reference signal; and/or
The communication unit is connected with the output detection unit and used for acquiring detection signals of the output detection unit.
Preferably, the display unit comprises a first trigger unit,
and the execution unit clears the connection lines between all the virtual nodes when the first trigger unit is triggered, and the control unit triggers all the connection nodes in the array switch to be disconnected when the execution unit clears the connection lines between the virtual nodes.
Preferably, the display unit comprises a first storage unit and a second trigger unit;
and the display unit stores the connection state corresponding to the current operation of the virtual node to the first storage unit when the second trigger unit is triggered.
Preferably, the display unit includes a third trigger unit;
and the execution unit acquires and generates or clears the connection between the virtual nodes according to the connection state corresponding to the last operation of the virtual nodes when the third trigger unit is triggered.
Preferably, the display unit includes a panel information input unit;
the plate information input unit is used for inputting plate information of the plate to be tested;
and the execution unit acquires and stores the plate information of the plate to be detected when the connection state corresponding to the current operation of the virtual node is stored in the first storage unit.
Preferably, the display unit further comprises a second storage unit and a fourth trigger unit;
the second storage unit is used for storing a preset connection state corresponding to the plate to be tested;
and the execution unit acquires the corresponding preset connection state according to the plate information when the fourth trigger unit is triggered, and generates or clears the connection between the virtual nodes according to the preset connection state.
Preferably, the plate information of the plate to be tested includes a plate name of the plate to be tested and/or a plate test case of the plate to be tested.
Preferably, the array switch is composed of a contactless photoelectric relay, and/or
The display unit is a touch display screen.
The intelligent board testing system with the verification function has the following beneficial effects: the operation is convenient, and the reliability of the test result can be improved while the workload of the plate test process is reduced.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
FIG. 1 is a logic block diagram of one embodiment of a board intelligent test system with verification functionality of the present invention;
FIG. 2 is a logic block diagram of another embodiment of a board intelligent test system with verification functionality of the present invention;
FIG. 3 is a schematic diagram of a display interface of a display unit according to an embodiment of the invention.
Detailed Description
For a clearer understanding of technical features, objects and effects of the present invention, a detailed description of embodiments of the present invention will be made with reference to the accompanying drawings.
As shown in fig. 1, in a first embodiment of a board intelligent test system with verification function according to the present invention, the board intelligent test system includes: the panel socket 110 is installed in a pluggable manner with the panel to be tested, the panel working circuit 120 can be electrically connected with the panel socket 110, the array switch 130 is connected with the panel socket 110 and/or the panel working circuit 120, the control unit 140 is connected with the array switch 130, the communication unit 150 is connected with the control unit 140, and the display unit 160 is connected with the communication unit 150; the display unit 160 displays a virtual node 161 corresponding to a connection node of the array switch 130, the display unit 160 includes a checking unit and an executing unit, the checking unit checks a corresponding relation of the virtual node 161 and outputs a checking result when the virtual node 161 is triggered, and the executing unit generates or clears a connection line between the virtual nodes according to the checking result; the control unit 140 triggers connection or disconnection of corresponding connection nodes in the array switch according to the connection when the execution unit generates or clears the connection between the virtual nodes. Specifically, in the test system, the board to be tested is matched with the board socket 110 and is installed in a pluggable manner with the board socket 110, and when the board to be tested is required to be tested, the board to be tested is placed on the board socket 110 to form a test circuit of the board to be tested. The board working circuit 120 is a working circuit for realizing various application functions of the board when the board is tested. The array switch 130 may be disposed between the pins of the board socket 110 or between the board socket 110 and the board working circuit 120, and may be configured to form on/off between the connection nodes of the array switch 130 by on/off matching of each switch in the array switch 130, so as to finally form different electrical connection relationships between the pins of the board socket 110 or between the board socket 110 and the board working circuit 120. Different electrical connection relations correspond to tests of different functions or indexes of the plate to be tested. The array switch 130 may be controlled to operate by the control unit 140. The control unit 140 is connected to the display unit 160 through the communication unit 150, the display unit 160 displays virtual nodes 161, and the virtual nodes 161 and the connection nodes of the array switch 130 are in one-to-one correspondence. The connection node of the array switch 130 is understood to be the connection node of the array switch 130 for the external unit.
When the virtual node 161 corresponding to the connection node of the array switch 130 corresponding to the endpoint is triggered, if the two virtual nodes 161 are clicked in turn, the verification unit will verify the relationship between the two virtual nodes 161. It first determines whether a connection exists between two virtual nodes 161, and if the connection exists between the two virtual nodes 161, then determines whether the connection nodes of the array switches corresponding to the two virtual nodes 161 can be connected according to the connection relationship of the two virtual nodes 161, i.e. whether the connection of the virtual nodes 161 is legal. It can be understood that, because some pins and other pins of some boards to be tested cannot form a connection relationship, or some other pins cannot be used due to the use of some other pins, or the connection relationship between the pins in the testing process of some boards to be tested is preset. Other connection relations are all impossible to connect. Therefore, before the connection line is generated between the virtual nodes 161, it is necessary to determine the connection relationship between the current virtual nodes. When it is determined that the pre-connected virtual node meets an actual connection requirement of the board to be tested, or a connection requirement of a testing process of the board to be tested, or a legal connection such as an abnormality of a circuit cannot be caused by the connection of the board to be tested, the verification result is considered to pass, and the execution unit generates a connection between the two virtual nodes 161 on the display unit 160. When the connection of the pre-connected virtual nodes is judged not to be the connection required in the test process of the board to be tested or the connection of the pre-connected virtual nodes can cause abnormal and other illegal connection of the circuit according to the connection relation between the current virtual nodes, the verification result is considered to be failed, the failure of verification can be prompted, and meanwhile, the execution unit does not execute the connection action. It can be understood that the operations of the virtual nodes 161 are sequentially performed, and in each operation process of the virtual nodes 161, it is required to determine whether the current operation on the virtual nodes 161 is legal according to the existing connection relationship between the virtual nodes 161, so as to output a corresponding verification result. Meanwhile, in the process that the execution unit executes and generates the connection between the virtual nodes according to the verification result, the control unit 140 triggers the connection node corresponding to the triggered virtual node to connect or disconnect in the array switch according to the execution result of the execution unit. The control unit 161 may monitor the operation of the execution unit and control the corresponding array switch operation according to the execution operation of the execution unit, so as to form an electrical connection relationship in the actual test unit corresponding to the virtual node 161 connection on the display unit 160. In the checking process, when the two virtual nodes 161 are connected, the execution unit clears the connection between the two virtual nodes 161 on the display unit 160. The control unit 140 triggers the connection node corresponding to the triggered virtual node in the array switch 130 to be disconnected according to the execution result of the execution unit in the process of executing the execution of the execution unit to remove the connection between the virtual nodes, so that the electrical connection relationship in the actual test unit corresponding to the connection of the virtual node 161 is disconnected. That is, the control unit 140 controls the array switch to monitor the operation of the execution unit, and then, the control unit 140 performs the corresponding operation according to the operation result of the execution unit after the operation of the execution unit. That is, after the execution unit executes the generation or the removal of the connection line between the virtual nodes, the control unit controls the corresponding array switch to act according to the action of generating or removing the connection line executed by the execution unit.
Alternatively, as shown in fig. 2, the board working circuit 120 includes a power supply unit 121, a reference signal output unit 122, and an output detection unit 123; the array switch 130 includes: a first array switch 131 connecting the first attribute pins of the board socket 110 to form a connection relationship between the first attribute pins; a second array switch 132 connecting the second attribute pins of the board socket 110 with the power supply unit 121 to form a connection relationship of the power supply unit 121 to the second attribute pins; a third array switch 133 connecting the third attribute pin of the board socket 110 with the reference signal output unit 122 to form a connection relationship of the reference signal output unit 122 with the third attribute pin; and/or a fourth array switch 134 connecting the fourth attribute pin of the board socket 110 with the output detecting unit 123 to form a connection relationship of the fourth attribute pin with the output detecting unit 123. Specifically, the board working circuit 120 corresponding to the board to be tested may be divided into a power supply unit 121, a reference signal output unit 122 and an output detection unit 123 according to the working principle of each specific circuit in the board working and testing process. For convenient control, different array switches are arranged for different circuit connection relations. The power supply unit 121 is configured to supply power to the board to be tested, and may be connected to the power supply pin of the board to be tested through the second attribute pin of the board socket 110, and set the second array switch 132 to implement on or off of the power supply unit 121 and the second attribute pin; the reference signal output unit 122 is configured to provide a test input signal of the board to be tested, which is also understood as a reference signal, and may be connected to a reference signal input pin of the board to be tested through a third attribute pin of the board socket 110, and set a third array switch 133 to enable the reference signal output unit 122 to be turned on or off with the third attribute pin; the output detecting unit 123 is configured to obtain a test output signal of the board to be tested, and may be connected to a test signal output pin of the board to be tested through a fourth attribute pin of the board socket 110, and set a fourth array switch 134 to implement on or off of the output detecting unit 123 and the fourth attribute pin. In the test process of the board to be tested, the power supply unit 121 supplies power to the board to be tested by triggering the virtual node 161 corresponding to the second array switch 132, the virtual node 161 corresponding to the third array switch 133 is triggered, the reference signal is input to the board to be tested, the output detection unit 123 obtains the output signal of the board to be tested by triggering the virtual node 161 corresponding to the fourth array switch 134, and the performance index of the board to be tested is determined by testing the output signal or the relation between the output signal and the reference signal. Meanwhile, in the working process of some boards to be tested, some pins of the boards to be tested need to be connected, at this time, the first attribute pins of the board socket 110 may be connected with corresponding pins of the boards to be tested, and the first array switch 131 is set to realize on or off between the first attribute pins. Triggering the virtual node 161 corresponding to the first array switch 131 can realize the connection or disconnection between the working pins in the board to be tested. The correspondence between each array switch and the virtual node 161 is that the virtual node 161 corresponds to the connection node of the array switch as described above. The first array switch 131, the second array switch 132, the third array switch 133, and the fourth array switch 134 may be selectively provided as needed.
Alternatively, the communication unit 150 is connected to the reference signal output unit 122, and is used for controlling the reference signal output unit 122 to output a reference signal; and/or the communication unit 150 is connected to the output detection unit 123 for acquiring and outputting the detection signal of the detection unit 123. That is, the display unit 160 may control the reference signal output unit 122 to output a desired reference signal through the communication unit 150, and the display unit 160 may also receive the detection signal acquired by the output detection unit 123 through the communication unit 150 and confirm the test result of the board to be tested.
Optionally, as shown in fig. 3, the display unit 160 includes a first trigger unit; the execution unit clears the connection between all the virtual nodes 161 when the first trigger unit is triggered, and the control unit 140 triggers all the connection nodes in the array switch 130 to be disconnected when the execution unit clears the connection between the virtual nodes. That is, by triggering the first triggering unit to generate the clearing instruction, the executing unit clears the connection lines between all the virtual nodes 161 currently displayed according to the clearing instruction, and after the clearing instruction is executed, no connection line relationship exists between all the virtual nodes 161 displayed on the display unit 160. Meanwhile, when the execution unit executes the purge instruction, the control unit 140 triggers all connection nodes in the array switches to be disconnected according to the purge action of the execution unit, that is, disconnects the connection relationship between the connection nodes of all the array switches. The clear instruction may be generated by triggering a clear key 162 provided by the display unit 160.
Optionally, the display unit 160 includes a first storage unit and a second trigger unit; and the display unit stores the connection state corresponding to the current operation of the virtual node to the first storage unit when the second trigger unit is triggered. That is, the second trigger unit may be triggered to generate a storage instruction, the display unit stores the connection lines between all the virtual nodes 161 currently displayed according to the storage instruction, and the execution of the storage instruction may not affect the connection lines of the display unit 160, that is, the execution unit does not execute the action of generating or clearing the connection lines between the virtual nodes 161, and the execution unit monitored by the control unit does not act, so that the array switch action is not triggered. The storage instruction may be generated by triggering a save key set by the display unit 160.
Optionally, the display unit 160 includes a third trigger unit; and the execution unit acquires and generates or clears the connection line between the virtual nodes according to the connection line state corresponding to the last operation of the virtual nodes when the third trigger unit is triggered. That is, the execution unit 160 may acquire and generate or clear the connection between the virtual nodes 161 according to the return instruction and the connection state corresponding to the last operation of the virtual nodes 161 by triggering the third triggering unit to generate the return instruction, that is, the display connection of the display unit 160 is displayed as the connection relationship corresponding to the last virtual node 161. Meanwhile, when the action of the execution unit is monitored, the control unit 140 triggers the corresponding connection node in the array switch to be connected or disconnected according to the action of the execution unit. The return instruction may be generated by triggering a return key 163 provided to the display unit 160.
Alternatively, the display unit 160 includes a panel information input unit; the plate information input unit is used for inputting plate information of the plate to be detected; the display unit 160 obtains and stores the board information of the board to be tested when the connection state corresponding to the current operation of the storage virtual node 161 is stored in the first storage unit. When the display unit 160 saves the connection state corresponding to the current operation of the virtual node 161, it may acquire the panel information through the panel information input unit, so as to correspond the current connection state to the panel related information. The panel information input unit may perform input of the related information by setting a corresponding information input window at the display unit 160.
Optionally, the display unit 160 further includes a second storage unit and a fourth triggering unit; the second storage unit is used for storing a preset connection state corresponding to the plate to be tested; the execution unit obtains a corresponding preset connection state according to the plate information of the plate to be tested when the fourth trigger unit is triggered, and generates or clears the connection between the virtual nodes 161 according to the preset connection state. When the connection relationship between the virtual nodes 161 is generated, the connection relationship between the virtual nodes 161 can be preset and stored according to the plate information of the plate to be tested corresponding to the possible connection states, when the plate to be tested is tested, the connection between the virtual nodes 161 can be generated or the connection between some virtual nodes 161 can be cleared according to the pre-stored corresponding connection states which are directly called according to the acquired plate information of the plate to be tested by triggering the fourth triggering unit to generate a calling instruction. Meanwhile, when the control unit 140 monitors the action of the execution unit, the corresponding connection nodes in the array switch are triggered to be connected or disconnected according to the action of the execution unit, so that the connection relationship between the connection nodes of the array switch is formed. The call instruction may be generated by triggering a call key set by the display unit 160.
Optionally, the plate information of the plate to be tested includes a plate name of the plate to be tested and/or a plate test case of the plate to be tested. That is, when the connection state of the board to be tested is stored or called, the board to be tested can be distinguished according to the name of the board to be tested, the board to be tested can be distinguished according to the board test case corresponding to the board to be tested, and the board to be tested can be distinguished through the combination of the board to be tested and the board to be tested.
Alternatively, the array switch 130 is composed of a non-contact photoelectric relay, and the array switch is composed of a non-contact photoelectric relay with low thermoelectric voltage and low on-resistance, which can improve the reliability of the system, reduce the power consumption and save the space.
Alternatively, the display unit 160 is a touch display screen. In order to facilitate operation, the virtual contact can be directly triggered by touching the display screen, and the connection relation of the test unit is rapidly realized.
Namely, through the intelligent board testing system with the verification function, the triggering virtual nodes are triggered, the triggering actions of the triggering virtual nodes are verified, the connection relation between the virtual nodes is formed after the triggering actions pass the verification, corresponding connecting lines are generated, and meanwhile, the connection relation between the corresponding connection nodes is formed by controlling the array switch actions according to the connection actions between the virtual nodes, so that the final connection circuit connection relation is formed. And under the circuit connection relationship, obtaining a test result of the plate to be tested, and completing the test of the plate to be tested. The intelligent plate testing system is particularly used for performing various operations according to the intelligent plate testing system so as to realize the testing of different plates to be tested.
It is to be understood that the above examples only represent preferred embodiments of the present invention, which are described in more detail and are not to be construed as limiting the scope of the invention; it should be noted that, for a person skilled in the art, the above technical features can be freely combined, and several variations and modifications can be made without departing from the scope of the invention; therefore, all changes and modifications that come within the meaning and range of equivalency of the claims are to be embraced within their scope.
Claims (7)
1. Intelligent board testing system of area check-up function, its characterized in that includes: the panel socket is installed with the panel to be tested in a pluggable manner, and can be electrically connected with the panel socket, an array switch connected with the panel socket and/or the panel working circuit, a control unit connected with the array switch, a communication unit connected with the control unit and a display unit connected with the communication unit; wherein,
the display unit displays virtual nodes corresponding to the connection nodes of the array switch, the display unit comprises a checking unit and an executing unit,
the verification unit verifies the corresponding relation of the virtual nodes when the virtual nodes are triggered and outputs a verification result, and the execution unit generates or clears the connection lines between the virtual nodes according to the verification result; in each operation process of the virtual nodes, the verification unit needs to judge whether the current operation on the virtual nodes is legal or not according to the connection relation between the existing virtual nodes, and output a corresponding verification result;
the control unit triggers corresponding connection nodes in the array switch to be connected or disconnected according to the connection lines when the execution unit generates or clears the connection lines between the virtual nodes;
the display unit comprises a first storage unit, a second trigger unit, a plate information input unit, a second storage unit and a fourth trigger unit;
the display unit stores a connection state corresponding to the current operation of the virtual node to the first storage unit when the second trigger unit is triggered;
the plate information input unit is used for inputting plate information of the plate to be tested;
the execution unit acquires and stores the plate information of the plate to be detected when the connection state corresponding to the current operation of the virtual node is stored in the first storage unit;
the second storage unit is used for storing a preset connection state corresponding to the plate to be tested;
and the execution unit acquires the corresponding preset connection state according to the plate information when the fourth trigger unit is triggered, and generates or clears the connection between the virtual nodes according to the preset connection state.
2. The intelligent board testing system with the verification function according to claim 1, wherein the board working circuit comprises a power supply unit, a reference signal output unit and an output detection unit;
the array switch includes:
a first array switch connecting first attribute pins of the board socket to form a connection relationship between the first attribute pins;
a second array switch connecting a second attribute pin of the board socket with the power supply unit to form a connection relationship between the power supply unit and the second attribute pin;
a third array switch connecting a third attribute pin of the board socket with the reference signal output unit to form a connection relationship between the reference signal output unit and the third attribute pin; and/or
And a fourth array switch for connecting the fourth attribute pin of the panel socket with the output detection unit to form a connection relationship between the fourth attribute pin and the output detection unit.
3. The intelligent board testing system according to claim 2, wherein,
the communication unit is connected with the reference signal output unit and is used for controlling the reference signal output unit to output a reference signal; and/or
The communication unit is connected with the output detection unit and used for acquiring detection signals of the output detection unit.
4. The board intelligent test system with verification function according to claim 1, wherein the display unit comprises a first trigger unit,
and the execution unit clears the connection lines between all the virtual nodes when the first trigger unit is triggered, and the control unit triggers all the connection nodes in the array switch to be disconnected when the execution unit clears the connection lines between the virtual nodes.
5. The intelligent board testing system with the verification function according to claim 1, wherein,
the display unit comprises a third trigger unit;
and the execution unit acquires and generates or clears the connection between the virtual nodes according to the connection state corresponding to the last operation of the virtual nodes when the third trigger unit is triggered.
6. The board intelligent test system with the verification function according to claim 1, wherein the board information of the board to be tested comprises a board name of the board to be tested and/or a board test case of the board to be tested.
7. The intelligent board testing system with the verification function according to claim 1, wherein,
the array switch is composed of a contactless photoelectric relay, and/or
The display unit is a touch display screen.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010754228.5A CN112067970B (en) | 2020-07-29 | 2020-07-29 | Plate intelligent test system with verification function |
| PCT/CN2021/076110 WO2022021839A1 (en) | 2020-07-29 | 2021-02-08 | Intelligent panel testing system having checking function |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010754228.5A CN112067970B (en) | 2020-07-29 | 2020-07-29 | Plate intelligent test system with verification function |
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| CN112067970A CN112067970A (en) | 2020-12-11 |
| CN112067970B true CN112067970B (en) | 2023-11-17 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112067970B (en) * | 2020-07-29 | 2023-11-17 | 中广核核电运营有限公司 | Plate intelligent test system with verification function |
| CN112083309B (en) * | 2020-07-29 | 2023-11-17 | 中广核核电运营有限公司 | Intelligent test system and method for memory plate |
| CN112083310A (en) * | 2020-07-29 | 2020-12-15 | 中广核核电运营有限公司 | Intelligent plate testing system |
| CN113625600A (en) * | 2021-07-19 | 2021-11-09 | 中广核核电运营有限公司 | Intelligent connection device, system and method for switch array pins |
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