CN112038323A - Circuit arrangement - Google Patents
Circuit arrangement Download PDFInfo
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- CN112038323A CN112038323A CN202010927937.9A CN202010927937A CN112038323A CN 112038323 A CN112038323 A CN 112038323A CN 202010927937 A CN202010927937 A CN 202010927937A CN 112038323 A CN112038323 A CN 112038323A
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- 229910052751 metal Inorganic materials 0.000 claims abstract description 149
- 239000002184 metal Substances 0.000 claims abstract description 149
- 239000000758 substrate Substances 0.000 claims abstract description 60
- 239000010410 layer Substances 0.000 description 124
- 239000000463 material Substances 0.000 description 17
- 238000000034 method Methods 0.000 description 11
- 239000012790 adhesive layer Substances 0.000 description 10
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- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
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- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
Abstract
A circuit device comprises a substrate, a driving circuit, a first metal layer, a first insulating layer, a second insulating layer, a plurality of second metal pads and a transparent conducting layer. The first metal layer is located on the bonding region. The first insulating layer is located on the first metal layer. The second metal pad is located in the first through hole of the first insulating layer. The transparent conductive layer is located in the second through hole of the second insulating layer. The first metal layer comprises a first metal pad directly connected with the second metal pad, and the first metal pad is electrically connected with a plurality of transparent conductive pads in the transparent conductive layer; or the transparent conductive layer comprises a transparent conductive pad directly connected with the second metal pad, and the transparent conductive pad is electrically connected with the first metal pad in the first metal layer.
Description
Technical Field
The present invention relates to a circuit device, and more particularly, to a circuit device including a bonding region.
Background
With the progress of the times, the characteristics of lightness, thinness, shortness, smallness and the like gradually become the main conditions for consumers to select products in order to make the products convenient to carry. In addition to reducing the size of electronic products, many manufacturers also strive to increase the flexibility of electronic products, making the products more competitive. For example, the flexible antenna may be disposed in a garment, a wristband, or a foldable phone. In other words, compared to the conventional antenna that is not easily bent, the flexible antenna has a wider applicable field.
However, in some flexible electronic devices, since different members are easily bent during the bonding process, the manufacturing difficulty of the flexible electronic device is high. For example, in a bonding process for bonding the driving chip to the flexible substrate, the bonding pad of the driving chip is easily damaged by bending, so that the driving chip cannot be correctly bonded to the flexible substrate.
Disclosure of Invention
The invention provides a circuit device which can improve the yield of a bonding process.
At least one embodiment of the invention provides a circuit device, which includes a substrate, a driving circuit, a first metal layer, a first insulating layer, a second insulating layer, a plurality of second metal pads, and a transparent conductive layer. The substrate is provided with a circuit area and a first bonding area. The driving circuit is located on the circuit area. The first metal layer is located on the first bonding area and electrically connected to the driving circuit. The first insulating layer is located on the first metal layer and has a plurality of first through holes overlapping the first metal layer. The second metal pad is located in the first through hole and protrudes out of the upper surface of the first insulating layer. The second insulating layer is located on the second metal pad and has a plurality of second through holes overlapping the second metal pad. The transparent conducting layer is positioned in the second through hole and protrudes out of the upper surface of the second insulating layer. The first metal layer comprises a first metal pad directly connected with a second metal pad, and the first metal pad is electrically connected to a plurality of transparent conductive pads in the transparent conductive layer through the second metal pad; or the transparent conductive layer comprises a transparent conductive pad directly connected with the second metal pads, and the transparent conductive pad is electrically connected to the first metal pads in the first metal layer through the second metal pads.
Drawings
Fig. 1 is a schematic top view of an antenna device according to an embodiment of the invention.
Fig. 2 is a schematic bottom view of a circuit device according to an embodiment of the invention.
Fig. 3A is a schematic cross-sectional view of an antenna device according to an embodiment of the invention.
Fig. 3B is a bottom view of the first bonding area of the circuit device of fig. 3A.
Fig. 4A is a schematic cross-sectional view of an antenna device according to an embodiment of the invention.
Fig. 4B is a bottom schematic view of the first bonding area of the circuit device of fig. 4A.
Fig. 5 is a schematic bottom view of a circuit device according to an embodiment of the invention.
Description of reference numerals:
1. 2: antenna device
10: antenna substrate
20. 20a, 20 b: circuit arrangement
100. 200: substrate
110: antenna with a shield
120A: first antenna pad
120B: second antenna pad
202: circuit area
204A: first bonding region
204B: second bonding region
204C: third bonding region
204D: fourth bonding pad
210: driving circuit
212: digital circuit
214: rectifier
216: frequency divider
220: a first metal layer
222: first metal pad
230: second metal layer
232: second metal pad
240: transparent conductive layer
242: transparent conductive pad
242 a: bump structure
300A, 300B: conductive adhesive layer
AR: array of cells
CH: polycrystalline silicon layer
CH 1: source region
CH 2: channel region
CH 3: drain region
D: drain electrode
E1: direction of rotation
F1, F2, F3, F4: surface of
I1: a first insulating layer
I2: a second insulating layer
G: grid electrode
GI: gate insulating layer
HD: height difference
O1, O2, O3: opening of the container
P1: first pad
P2: second pad
S: source electrode
T: active component
T1, T2, T3, T4, T5: thickness of
TH 1: first through hole
TH 2: second through hole
MT: netted rubber-removing groove
W1: width of
W2: distance between two adjacent plates
θ: included angle
Detailed Description
Throughout the specification, the same reference numerals denote the same or similar elements. In the drawings, the thickness of layers, films, panels, regions, etc. have been exaggerated for clarity. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element. Two elements "electrically connected" or "coupled" to each other may be present as other elements between the elements.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section.
Fig. 1 is a schematic top view of an antenna device according to an embodiment of the invention. Fig. 2 is a schematic bottom view of a circuit device according to an embodiment of the invention. Fig. 2 is an enlarged schematic diagram of the circuit arrangement 20 in fig. 1, for example. For convenience of explanation, the circuit device 20 in fig. 1 and 2 omits some components.
Referring to fig. 1, an antenna device 1 includes an antenna substrate 10 and a circuit device 20, wherein the circuit device 20 is bonded to the antenna substrate 10.
The antenna substrate 10 includes a substrate 100, an antenna 110, a first antenna pad 120A and a second antenna pad 120B. The material of the substrate 100 may be glass, quartz, organic polymer, metal, or the like. In the embodiment, the substrate 100 is a flexible substrate, and the substrate 100 includes a transparent, translucent or opaque material, but the invention is not limited thereto. The antenna 110 is, for example, helical or in other shapes, and two ends of the antenna 110 are electrically connected to the first antenna pad 120A and the second antenna pad 120B, respectively. The material of the antenna 110, the first antenna pad 120A and the second antenna pad 120B includes a conductive material, such as gold, silver, copper, aluminum, molybdenum, titanium or other conductive materials.
Referring to fig. 1 and fig. 2, the substrate 200 of the circuit device 20 has a circuit region 202, a first bonding region 204A and a second bonding region 204B. The first bonding area 204A and the second bonding area 204B are respectively located at two opposite sides of the circuit area 202, wherein a pad (not shown in fig. 1 and 2) on the first bonding area 204A and a pad (not shown in fig. 1 and 2) on the second bonding area 204B are electrically connected to the device on the circuit area 202, and the pad on the first bonding area 204A and the pad on the second bonding area 204B are respectively electrically connected to the first antenna pad 120A and the second antenna pad 120B. The material of the substrate 200 may be glass, quartz, organic polymer, metal, or the like. In the present embodiment, the substrate 200 is a flexible substrate, and the substrate 200 includes a transparent, translucent or opaque material.
In the present embodiment, the driving circuit 210 is disposed on the circuit region 202. The circuit area 202 partially overlaps the antenna 110. In this example, the driving circuit 210 partially overlaps the antenna 110. In the embodiment, the driving circuit 210 includes a Digital circuit (Digital circuit)212, a Rectifier (Rectifier)214, and a frequency Divider (Divider)216, but the invention is not limited thereto.
Fig. 3A is a schematic cross-sectional view of an antenna device according to an embodiment of the invention. For convenience of explanation, fig. 3A omits to show part of the elements on the circuit region. Fig. 3B is a bottom view of the first bonding area of the circuit device of fig. 3A. It should be noted that the embodiment of fig. 3A and 3B follows the element numbers and part of the contents of the embodiment of fig. 1 and 2, wherein the same or similar elements are denoted by the same or similar reference numbers, and the description of the same technical contents is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, which are not repeated herein.
Referring to fig. 3A and 3B, the antenna device 2 includes an antenna substrate 10 and a circuit device 20. For convenience of explanation, fig. 3A shows a state in which the antenna substrate 10 and the circuit device 20 are not yet bonded to each other, and in the antenna device 2, the antenna substrate 10 and the circuit device 20 are actually bonded to each other.
The antenna substrate 10 includes a substrate 100, an antenna 110, a first antenna pad 120A and a second antenna pad 120B. In the present embodiment, the conductive adhesive layers 300A and 300B are respectively formed on the first antenna pad 120A and the second antenna pad 120B. The Conductive adhesive layers 300A and 300B are, for example, Anisotropic Conductive Paste (ACP), Anisotropic Conductive Film (ACF), or other Conductive adhesive layers.
The circuit device 20 includes a substrate 200, a driving circuit, a first metal layer 220, a first insulating layer I1, a second insulating layer I2, a plurality of second metal layers 230, and a transparent conductive layer 240.
The substrate 200 has a circuit region 202, a first bonding region 204A and a second bonding region 204B, wherein the first bonding region 204A and the second bonding region 204B are respectively located at two opposite sides of the circuit region 202.
The driving circuit is located on the circuit area 220. In the present embodiment, the driving circuit 210 includes a plurality of active devices T. For example, the rectifier in the driving circuit 210 includes an active device T.
The active device T is disposed on the substrate 200 and includes a gate G, a polysilicon layer CH, a source S and a drain D. The polysilicon layer CH is disposed on the substrate 200 and includes a source region CH1, a channel region CH2, and a drain region CH3, wherein the channel region CH2 is disposed between the source region CH1 and the drain region CH 3. The source region CH1 and the drain region CH3 are, for example, N-type doped polysilicon or P-type doped polysilicon. The gate insulating layer GI is located on the polysilicon layer CH and the substrate 200. The gate G is located on the gate insulating layer GI and overlaps the polysilicon layer CH. The first insulating layer I1 is on the gate G and the gate insulating layer GI. The source S and the drain D are located on the first insulating layer I1 and are electrically connected to the source region CH1 and the drain region CH3 through the openings O1 and O2, respectively, wherein the openings O1 and O2 penetrate through the first insulating layer I1 and the gate insulating layer GI.
In the present embodiment, the active device T is a top gate thin film transistor, but the invention is not limited thereto. In other embodiments, the active device T is a bottom gate thin film transistor, a dual gate thin film transistor, or other types of thin film transistors. In the present embodiment, the active device T is a polysilicon thin film transistor, but the invention is not limited thereto. In other embodiments, the active device T is a metal oxide thin film transistor, an organic thin film transistor, or other types of thin film transistors.
A first metal layer 220 is located on the first bonding region 204A. In the present embodiment, the first metal layer 220 includes a first metal pad 222 on the first bonding region 204A and a first metal pad 222 on the second bonding region 204B, and the two first metal pads 222 are separated from each other. In some embodiments, the first metal layer 220 is of the same conductive layer as the gate G. For example, the first metal pad 222 and the gate G are formed in the same patterning process (e.g., photolithography and etching process), and both the first metal pad 222 and the gate G are located on the gate insulating layer GI. In some embodiments, the material of the first metal layer 220 and the gate G includes gold, silver, copper, aluminum, molybdenum, titanium, or other metals or alloys containing the foregoing metals, and the thickness T1 of the first metal layer 220 and the gate G is, for example, 1800 a to 2200 a. The first metal layer 220 and the gate G are single-layer or multi-layer structures.
The first insulating layer I1 is located on the first metal layer 220 and has a plurality of first through holes TH1 overlapping the first metal layer 220. The first insulating layer I1 is, for example, a flat layer, and the material includes an inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, other suitable material, or a stacked layer of at least two of the above materials), an organic material (e.g., Polyester (PET), polyolefin, polyacryl, polycarbonate, polyoxirane, polyphenylene, polyether, polyketone, polyol, polyaldehyde, or other suitable material, or a combination thereof), or other suitable material, or a combination thereof, and the thickness T2 of the first insulating layer I1 is, for example, 6500 a to 7900 a. The first insulating layer I1 has a single-layer or multi-layer structure.
The second metal layer 230 is located on the first insulating layer I1, and the second metal layer 230 includes a plurality of second metal pads 232 separated from each other. The second metal pads 232 are located in the first through holes TH1 and directly connected to the first metal pads 222. In the present embodiment, the second metal pads 232 are arranged in a dot-shaped array. The second metal pad 230 protrudes from the upper surface F1 of the first insulating layer I1, wherein the upper surface F1 of the first insulating layer I1 faces the antenna substrate 10. The material of the second metal layer 230 includes gold, silver, copper, aluminum, molybdenum, titanium, or other metals, or alloys containing the foregoing metals, the thickness T3 of the second metal pad 232 protruding beyond the first insulating layer I1 is 2900 a to 3500 a, for example, and the second metal layer 230 is a single-layer or multi-layer structure.
The first metal layer 220 or the second metal layer 230 is electrically connected to the active device T in the driving circuit 210. For example, the drains D of the two active devices T are directly connected to the first metal pad 222 on the first bonding region 204A and the first metal pad 222 on the second bonding region 204B through two openings O3, respectively, wherein the opening O3 penetrates through the first insulating layer I1.
In the present embodiment, the first metal pads 222 are directly connected to the second metal pads 232. One first metal pad 222 overlaps a plurality of second metal pads 232.
In some embodiments, the second metal pad 232, the source S and the drain D belong to the same conductive layer. For example, the second metal pad 232, the source S and the drain D are formed in the same patterning process (e.g., photolithography and etching process), and the second metal pad 232, the source S and the drain D are all located on the first insulating layer I1.
The second insulating layer I2 is disposed on the second metal layer 230 (the second metal pad 232), the source S and the drain D. The second insulating layer I2 material includes inorganic material (e.g., silicon oxide, silicon nitride, silicon oxynitride, other suitable material, or a stack of at least two of the above materials), organic material (e.g., Polyester (PET), polyolefin, polyacryl, polycarbonate, polyalkylene oxide, polyphenylene, polyether, polyketone, polyol, polyaldehyde, or other suitable material or combinations thereof), or other suitable material or combinations thereof, and the thickness T4 of the second insulating layer I2 is, for example, 1750 a to 3300 a. The second insulating layer I2 has a single-layer or multi-layer structure.
In the present embodiment, the second insulating layer I2 is conformal to the second metal layer 230, the source S and the drain D. For example, the second insulating layer I2 extends from the top surface F1 of the first insulating layer I1 to the top surface F2 of the second metal pad 232 along the side surface of the second metal pad 232. In the present embodiment, in the direction E1 perpendicular to the substrate 200, a height difference exists between a portion of the second insulating layer I2 overlapping the second metal pad 232 and a portion of the second insulating layer I2 not overlapping the second metal pad 232. In other words, on the first bonding region 204A and the second bonding region 204B, the upper surface F3 of the second insulating layer I2 is an undulating surface, wherein the upper surface F3 faces the antenna substrate 10. The second insulating layer I2 has a plurality of second through holes TH2 overlapping the upper surface F2 of the second metal pad 232.
The transparent conductive layer 240 is disposed in the second through holes TH2 of the second insulating layer I2 and directly connected to the second metal pads 232. The manufacturing method of the transparent conductive layer 240 includes, for example, a photolithography etching process. In the embodiment, the transparent conductive layer 240 includes a plurality of transparent conductive pads 242, a corresponding transparent conductive pad 242 is disposed in each second through hole TH2, and each transparent conductive pad 242 is directly connected to a corresponding second metal pad 232. A first metal pad 222 is electrically connected to a plurality of transparent conductive pads 242 through a plurality of second metal pads 232.
In the present embodiment, the first metal layer 220 (a first metal pad 222), the second metal layer 230 (a plurality of second metal pads 232) and the transparent conductive layer 240 (a plurality of transparent conductive pads 242) on the first bonding area 204A constitute a first pad P1, and the first metal layer 220 (a first metal pad 222), the second metal layer 230 (a plurality of second metal pads 232) and the transparent conductive layer 240 (a plurality of transparent conductive pads 242) on the second bonding area 204B constitute a second pad P2. The vertical projection area of the first pads P1 on the substrate 200 is greater than or equal to 40000 μm, and the vertical projection area of the second pads P2 on the substrate 200 is greater than or equal to 40000 μm.
The transparent conductive layer 240 protrudes above the upper surface F3 of the second insulating layer I2. In the present embodiment, the upper surface F4 of the transparent conductive layer 240 conforms to the undulating upper surface F3 of the second insulating layer I2 on the first bonding region 204A and the second bonding region 204B. In the present embodiment, on the first bonding region 204A and the second bonding region 204B, a portion of the upper surface F4 of the transparent conductive layer 240 farthest from the substrate 200 and a portion of the upper surface F3 of the second insulating layer I2 closest to the substrate 200 have a height difference HD, wherein the height difference HD is 3200 angstroms to 4200 angstroms.
The transparent conductive layer 240 forms a plurality of protruding structures arranged in a dotted array AR. In the present embodiment, the bump structures are separated from each other, and each of the transparent conductive pads 242 is a bump structure. In other embodiments, each transparent conductive pad 242 includes a plurality of bump structures. The dot-shaped protrusion structures can increase the friction between the first pad P1 and the antenna substrate 10 and the friction between the second pad P2 and the antenna substrate 10, thereby improving the problem of sliding between the circuit device 20 and the antenna substrate 10 during pressure bonding.
The transparent conductive layer 240 is, for example, indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, indium gallium zinc oxide, or a stacked layer of at least two of the foregoing.
An included angle θ between the outward surface F4 of each bump structure (the transparent conductive pad 242) and the upper surface F3 of the second insulating layer I2 is 30 to 60 degrees. The top surface width W1 of each of the bump structures (transparent conductive pads 242) is greater than or equal to the distance W2 between the bottoms of two adjacent bump structures (transparent conductive pads 242). This enables a large bonding area between the circuit device 20 and the antenna substrate 10. In some embodiments, the top surface width W1 of each bump structure (transparent conductive pad 242) is 1: 1 to 2: 1. for example, the top width W1 is 20 to 60 microns and the distance W2 is 10 to 60 microns.
In the present embodiment, the protruding structures have a connected mesh-shaped glue-removing groove MT therebetween, and the mesh-shaped glue-removing groove MT is open on the side and the front of the array AR. In the present embodiment, the width of the mesh glue-discharging groove MT is approximately equal to the distance W2 between the bottoms of two adjacent protruding structures. In the embodiment, when the antenna substrate 10 is coupled to the circuit device 20, the mesh glue-draining groove MT may serve as an overflow path for the conductive adhesive layers 300A and 300B, so that the excess conductive adhesive layers 300A and 300B may be drained along the mesh glue-draining groove MT.
Based on the above, the first metal pads 222 are directly connected to the second metal pads 232 and are electrically connected to the transparent conductive pads 242 through the second metal pads 232, so that the gaps between the second metal pads 232 and the gaps between the transparent conductive pads 242 can prevent the pads from cracking after being bent at the bonding region, thereby improving the yield of the bonding process.
Fig. 4A is a schematic cross-sectional view of an antenna device according to an embodiment of the invention. For convenience of explanation, fig. 4A omits to show part of the elements on the circuit region. Fig. 4B is a bottom schematic view of the first bonding area of the circuit device of fig. 4A. It should be noted that the embodiment of fig. 4A and 4B follows the element numbers and part of the contents of the embodiment of fig. 3A and 3B, wherein the same or similar elements are denoted by the same or similar reference numbers, and the description of the same technical contents is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, which are not repeated herein.
The main differences between the antenna device 3 of fig. 4A and the antenna device 2 of fig. 3A are: in the circuit device 20a of fig. 4A, one transparent conductive pad 242 is directly connected to the plurality of second metal pads 232, and is electrically connected to the plurality of first metal pads 222 through the plurality of second metal pads 232.
Referring to fig. 4A and 4B, in the present embodiment, the first metal layer 220 on the first bonding region 204A includes a plurality of first metal pads 222 separated from each other, and the transparent conductive layer 240 on the first bonding region 204A includes a transparent conductive pad 242; the first metal layer 220 on the second bonding region 204B includes a plurality of first metal pads 222 separated from each other, and the transparent conductive layer 240 on the second bonding region 204B includes a transparent conductive pad 242.
The first metal layer 220 (the first metal pads 222), the second metal layer 230 (the second metal pads 232) and the transparent conductive layer 240 (the transparent conductive pad 242) on the first bonding region 204A constitute a first pad P1, and the first metal layer 220 (the first metal pads 222), the second metal layer 230 (the second metal pads 232) and the transparent conductive layer 240 (the transparent conductive pad 242) on the second bonding region 204B constitute a second pad P2.
In the present embodiment, the transparent conductive layer 240 forms a plurality of protruding structures 242a arranged in a dot-shaped array AR. In the present embodiment, the bump structures 242a on the first bonding region 204A are connected to each other, and each of the transparent conductive pads 242 includes a plurality of bump structures 242 a. The dot-shaped protrusion structures 242a can increase the friction between the first pad P1 and the antenna substrate 10 and the friction between the second pad P2 and the antenna substrate 10, thereby improving the problem of sliding misalignment between the circuit device 20a and the antenna substrate 10 during pressure bonding.
In the present embodiment, the thickness T5 between the upper surface F2 of the second metal pad 232 and the portion of the upper surface F3 of the second insulating layer I2 protruding is 1750 angstroms to 3300 angstroms in the direction E1 perpendicular to the substrate 200 in the first bonding region 204A and the second bonding region 204B. On the first bonding region 204A and the second bonding region 204B, a portion of the surface F4 of the protruding structure 242a farthest from the substrate 200 and a portion of the surface F4 of the protruding structure 242a closest to the substrate 200 have a height difference HD, wherein the height difference HD is 4700 angstroms to 5700 angstroms.
The angle θ between the outward surface F4 of each protruding structure 242a and the upper surface F3 of the second insulating layer I2 is 30 to 60 degrees. The top width W1 of each of the protruding structures 242A is greater than or equal to the distance W2 between the bottoms of two adjacent protruding structures 242A. This enables a large bonding area between the circuit device 20A and the antenna substrate 10. In some embodiments, the width of the top surface of each protruding structure is 1: 1 to 2: 1. for example, the top width W1 is 20 to 60 microns and the distance W2 is 10 to 60 microns.
In the present embodiment, the protruding structures have a connected mesh-shaped glue-removing groove MT therebetween, and the mesh-shaped glue-removing groove MT is open on the side and the front of the array AR. In the present embodiment, the width of the mesh glue-discharging groove MT is approximately equal to the distance W2 between the bottoms of two adjacent protruding structures. In the embodiment, when the antenna substrate 10 is coupled to the circuit device 20, the mesh glue-draining groove MT may serve as an overflow path for the conductive adhesive layers 300A and 300B, so that the excess conductive adhesive layers 300A and 300B may be drained along the mesh glue-draining groove MT.
In the present embodiment, the drains D of the two active devices T are directly connected to the first metal pad 222 on the first bonding region 204A and the first metal pad 222 on the second bonding region 204B, respectively.
Based on the above, the transparent conductive pads 242 are directly connected to the second metal pads 232 and electrically connected to the first metal pads 222 through the second metal pads 232, so that the gaps between the second metal pads 232 and the gaps between the first metal pads 222 can prevent the pads from cracking after being bent at the bonding region, thereby improving the yield of the bonding process.
Fig. 5 is a schematic bottom view of a circuit device according to an embodiment of the invention. It should be noted that the embodiment of fig. 5 follows the element numbers and partial contents of the embodiment of fig. 2, wherein the same or similar element numbers are used to indicate the same or similar elements, and the description of the same technical contents is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, which are not repeated herein.
The main difference between the circuit arrangement 20b of fig. 5 and the circuit arrangement 20 of fig. 2 is that: in the circuit device 20B of fig. 5, the substrate 200 further includes a third bonding region 204C and a fourth bonding region 204D, the first bonding region 204A and the third bonding region 204C are located on the same side of the circuit region 202, and the second bonding region 204B and the fourth bonding region 204D are located on the same side of the circuit region 202.
In the present embodiment, the first bonding region 204A, the second bonding region 204B, the third bonding region 204C and the fourth bonding region 204D respectively include a first bonding pad (not shown in fig. 5), a second bonding pad (not shown in fig. 5), a third bonding pad (not shown in fig. 5) and a fourth bonding pad (not shown in fig. 5), wherein the first bonding pad, the second bonding pad, the third bonding pad and the fourth bonding pad have structures similar to the first bonding pad and the second bonding pad in any of the above embodiments, and are not described again.
To sum up, the first metal pads are directly connected to the plurality of second metal pads and electrically connected to the plurality of transparent conductive pads through the plurality of second metal pads; or the transparent conductive connecting pad is directly connected with the second metal connecting pads and is electrically connected to the first metal connecting pads through the second metal connecting pads. Therefore, the gaps among the metal pads and/or the gaps among the transparent conductive pads can avoid the problem that the pads are cracked after the bonding areas are bent, and therefore the yield of the bonding process is improved. In addition, the point-distributed convex structure formed by the transparent conductive connecting pad can improve the problem that the circuit device and other devices slide and dislocate during pressure joint, and the reticular glue-discharging grooves on the transparent conductive connecting pad can be used as overflow channels of the conductive adhesive layer, so that the redundant conductive adhesive layer can be discharged along the reticular glue-discharging grooves.
Claims (11)
1. A circuit arrangement, comprising:
a substrate having a circuit region and a first bonding region;
a driving circuit located on the circuit region;
a first metal layer located on the first bonding region and electrically connected to the driving circuit;
a first insulating layer on the first metal layer and having a plurality of first through holes overlapping the first metal layer;
a plurality of second metal pads, which are positioned in the first through holes and protrude out of the upper surface of the first insulating layer;
a second insulating layer located on the second metal pads and having a plurality of second through holes overlapping the second metal pads; and
a transparent conductive layer disposed in the second through holes and protruding from the upper surface of the second insulating layer, wherein:
the first metal layer comprises a first metal pad directly connected with the second metal pads, and the first metal pad is electrically connected to a plurality of transparent conductive pads in the transparent conductive layer through the second metal pads; or
The transparent conductive layer includes a transparent conductive pad directly connected to the second metal pads, and the transparent conductive pad is electrically connected to the first metal pads in the first metal layer through the second metal pads.
2. The circuit device of claim 1, wherein the substrate is a flexible substrate.
3. The circuit device of claim 1, wherein the driving circuit comprises a rectifier, and the rectifier comprises an active device, wherein the first metal layer or the second metal layer is electrically connected to the active device.
4. The circuit device of claim 1, wherein the second metal pads are arranged in a point-like array.
5. The circuit device according to claim 1, wherein the transparent conductive layer forms a plurality of protruding structures arranged in a dotted array, and an angle between an outward surface of each protruding structure and the upper surface of the second insulating layer is 30 to 60 degrees.
6. The circuit device according to claim 1, wherein the transparent conductive layer forms a plurality of protruding structures arranged in a dotted array, and a width of a top surface of each protruding structure is greater than or equal to a distance between bottoms of two adjacent protruding structures.
7. The circuit device of claim 6, wherein the width of the top surface of each of the protruding structures is 1: 1 to 2: 1.
8. the circuit device according to claim 1, wherein the transparent conductive layer forms a plurality of protruding structures arranged in a dotted array, and the protruding structures have a mesh-like glue-removing groove therebetween, and the mesh-like glue-removing groove is open on the side and front surfaces of the array.
9. The circuit device of claim 1, wherein the first metal layer, the transparent conductive layer and the second metal layer on the first bonding area form a first pad, and a vertical projection area of the first pad on the substrate is greater than or equal to 40000 μm.
10. The circuit device of claim 1, wherein the substrate is an elongated substrate, the substrate further comprises a second bonding region, and the first bonding region and the second bonding region are respectively located on two opposite sides of the circuit region.
11. The circuit device of claim 10, wherein the substrate further comprises a third bonding area and a fourth bonding area, the first bonding area and the third bonding area are located on the same side of the circuit area, and the second bonding area and the fourth bonding area are located on the same side of the circuit area.
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US201962930794P | 2019-11-05 | 2019-11-05 | |
US62/930,794 | 2019-11-05 | ||
TW109110783 | 2020-03-30 | ||
TW109110783A TWI762894B (en) | 2019-11-05 | 2020-03-30 | Circuit device |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000261009A (en) * | 1999-03-10 | 2000-09-22 | Sanyo Electric Co Ltd | Integrated photovoltaic device |
US20140146279A1 (en) * | 2012-11-29 | 2014-05-29 | Samsung Display Co., Ltd. | Anti-scratch film for flexible display |
CN104765188A (en) * | 2015-04-07 | 2015-07-08 | 深圳市华星光电技术有限公司 | Flexible liquid crystal display |
CN106547407A (en) * | 2016-11-08 | 2017-03-29 | 武汉华星光电技术有限公司 | Bent flexible touch screen and flexible touch display screen |
KR20180016711A (en) * | 2016-08-05 | 2018-02-19 | 삼성디스플레이 주식회사 | Display device and manufacturing method thereof |
-
2020
- 2020-09-07 CN CN202010927937.9A patent/CN112038323B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000261009A (en) * | 1999-03-10 | 2000-09-22 | Sanyo Electric Co Ltd | Integrated photovoltaic device |
US20140146279A1 (en) * | 2012-11-29 | 2014-05-29 | Samsung Display Co., Ltd. | Anti-scratch film for flexible display |
CN104765188A (en) * | 2015-04-07 | 2015-07-08 | 深圳市华星光电技术有限公司 | Flexible liquid crystal display |
KR20180016711A (en) * | 2016-08-05 | 2018-02-19 | 삼성디스플레이 주식회사 | Display device and manufacturing method thereof |
CN106547407A (en) * | 2016-11-08 | 2017-03-29 | 武汉华星光电技术有限公司 | Bent flexible touch screen and flexible touch display screen |
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