CN112035882B

CN112035882B - Method for ensuring data integrity in communication between upper computer and lower computer

Info

Publication number: CN112035882B
Application number: CN202010693952.1A
Authority: CN
Inventors: 王灿; 刘宽; 朱绍维; 王伟; 姜振喜; 罗耀辉; 郑兴
Original assignee: Chengdu Aircraft Industrial Group Co Ltd
Current assignee: Chengdu Aircraft Industrial Group Co Ltd
Priority date: 2020-07-17
Filing date: 2020-07-17
Publication date: 2021-08-03
Anticipated expiration: 2040-07-17
Also published as: CN112035882A

Abstract

The invention discloses a method for ensuring data integrity in communication between an upper computer and a lower computer, which comprises the following specific processes: two-dimensional storage arrays are opened up in a lower computer acquisition program, and all data generated in real time in the processing process are stored; simultaneously opening up a group of corresponding buffer areas for each row of the two-dimensional storage array in the upper computer program, wherein the two buffer arrays in the buffer areas are respectively in a storage state and a full state at the same time; and exchanging the function of the buffer array after the storage is finished with the full state array to finish the complete storage of the data. The invention uses the data buffer pool to buffer the real-time data, can ensure that the problem of data loss caused by too fast acquisition frequency can be avoided when the data volume is too large, and provides complete reference and guarantee for the follow-up data tracing and analysis in the processing process.

Description

Method for ensuring data integrity in communication between upper computer and lower computer

Technical Field

The invention relates to the technical field of data acquisition and communication, in particular to a method for ensuring data integrity in communication between an upper computer and a lower computer.

Background

In recent years, with the rapid development of internet and digital information technology, the wide-range popularization of intelligent manufacturing becomes possible, and the intelligent manufacturing cannot leave the support of workshop production data. In the manufacturing process, the numerical control machine tool is not only a production tool and equipment, but also a node of a workshop information network, and the result is used for improving the manufacturing process through automatic acquisition, statistics, analysis and feedback of machine tool data, so that the flexibility of the manufacturing process and the integration of the machining process are greatly improved. A large amount of real-time processing information collected in the numerical control processing process can be used for analyzing key indexes such as main shaft power, cutter position and the like in the processing process. When the acquisition frequency exceeds the processing speed of an upper computer, the traditional data acquisition mode cannot ensure the complete storage of data, and when the traditional data acquisition mode is applied in engineering, partial data can be selectively lost for ensuring the processing speed. However, the integrity of the collected data has great engineering significance for subsequent analysis and processing, so that a technical problem of ensuring the integrity of the data needs to be solved urgently.

Disclosure of Invention

The invention aims to provide a method for ensuring data integrity in communication between a lower computer and an upper computer, which aims to solve the problems that the real-time performance between the communication between the lower computer and the upper computer is not uniform, the data loss of stored and acquired data cannot ensure the complete acquisition of the data, the subsequent data analysis is influenced and the like.

The invention is realized by the following technical scheme: a method for ensuring data integrity in communication between an upper computer and a lower computer comprises the following steps:

(1) two-dimensional storage arrays are opened up in a lower computer acquisition program, and a state identification bit for judging whether data is full is set for each two-dimensional storage array;

(2) two fixed-length arrays are opened up in an upper computer program to serve as buffer areas, and the buffer areas respectively correspond to each row of data in a two-dimensional storage array in a lower computer acquisition program;

(3) the lower computer acquisition program acquires all data generated in real time in the machining process, alternately stores the data into two-dimensional storage arrays in the lower computer, and modifies the state identification bits of the two-dimensional storage arrays and provides the state identification bits for the upper computer to read after the lower computer acquisition program detects that one two-dimensional storage array is full of data;

(4) the upper computer program reads a column of data in the two-dimensional storage array which is full of data by judging the state identification bit of the two-dimensional storage array, and stores the data in a corresponding buffer area opened up by the upper computer program, so that the alternate work of the two-dimensional storage arrays and the two buffer areas is completed, and the complete storage of the data is completed.

The working principle of the technical scheme is that two-dimensional storage arrays are opened up in a lower computer program, all data generated in real time in the machining process are stored, meanwhile, a group of corresponding buffer areas are opened up for each row of the two-dimensional storage arrays in the upper computer program, and the two buffer arrays in the buffer areas are respectively in a storage state and a full state at the same time; and exchanging the function of the buffer array after the storage is finished with the full state array to finish the complete storage of the data.

In order to better implement the present invention, in step (1), two-dimensional storage ARRAYs with a size of m × n are opened in the lower computer acquisition program, where a value of m is determined by the PLC cycle in which the upper computer reads the two-dimensional storage ARRAYs, a value of n is determined by the number of DATA types of the acquired DATA, and the two-dimensional storage ARRAYs are respectively labeled as DATA _ ARRAY1 and DATA _ ARRAY 2.

In order to better implement the present invention, in the step (2), in the upper computer processing program, two fixed-length arrays with the same length are opened up as a buffer area corresponding to the number n of the collected data types, where i is greater than or equal to 1 and less than or equal to n, and the fixed-length arrays are respectively a buffer area Ai and a buffer area Bi, and each fixed-length array corresponds to the ith column of the two-dimensional storage array in the lower computer program.

In order to better implement the present invention, further, in step (1), the state flag bits include a count flag bit, a cycle count bit k, and four two-dimensional storage array state boolean flag bits set in a lower computer program; the number of the counting identification bits is two, the two-dimensional storage arrays are respectively used as the number counting of the two arrays, and the initial value of the counting identification bits is 1; the number of the cycle counting bits k is one, and the cycle counting bits k are used as storage counting; the two-dimensional storage array state boolean flag bits are four, specifically, biarray 1PutDataExecuting, biarray 1PutDataDone, biarray 2PutDataExecuting, and biarray 2 PutDataDone.

In order to better implement the present invention, further, in step (3), when the lower computer starts to collect real-time data, the n-way data is simultaneously read at the collection frequency f and stored in the two arrays, and the data storage method specifically includes: writing n DATA into one row of DATA _ ARRAY1in each PLC cycle period, and adding 1 to each row of ARRAY1 Index; checking the value of ARRAY1Index, when the ARRAY1Index is less than m, continuing the program, when the ARRAY1Index is more than m, setting the value of bARRAY1PutDataExecuting as FALSE and the value of bARRAY1PutDataDone as TRUE for providing the upper computer for judgment; meanwhile, setting ARRAY2Index as 1, self-adding 1 to the cycle count bit k, and starting to write DATA into the two-dimensional ARRAY2, namely DATA _ ARRAY2, wherein the value of ARRAY2Index is self-added with 1 when writing one row; and simultaneously checking the value of ARRAY2Index, when ARRAY2Index is less than m, continuing the program, when ARRAY2Index is more than m, setting ARRAY1Index to be 1, self-adding 1 to the counting bit k of the cycle times, writing the data into the ARRAY1 again, setting bARRAY2PutDataExecuting to be FALSE and bARRAY2PutDataDone to be TRUE, and repeating the steps in such a cycle, and writing the acquired data into the two ARRAYs.

In order to better implement the present invention, further, in step (4), the process of the upper computer program determining the status flag bit of the two-dimensional storage array is as follows: bArray2PutDataDone ═ TRUE &

When the ARRAY1PutDataExecuting is equal to TRUE and k% 2 is equal to 0, that is, when the ARRAY DATA _ ARRAY1 stores full DATA and the ARRAY DATA _ ARRAY2 is storing, n columns of DATA of the DATA _ ARRAY1 are read into the buffer Ai once for each m columns, respectively, for n columns; when: when the bar 2PutDataDone is equal to TRUE & & bArray1PutDataExecuting is equal to 1, that is, when the ARRAY DATA _ ARRAY2 stores full DATA and the ARRAY DATA _ ARRAY1 is storing, n columns of DATA of the DATA _ ARRAY2 are read into the buffer Bi once for each m columns, respectively, for n columns.

Compared with the prior art, the invention has the following advantages and beneficial effects:

(1) the invention solves the problem that the non-real-time property of the data processed by the upper computer is not matched with the real-time property of the data collected by the lower computer, and the data collected by the lower computer is completely stored locally through processing;

(2) the invention is easy to realize engineering, and can better save data by opening up a virtual buffer area in the development process of programs of the lower computer and the upper computer.

(3) The data stored by double caches can be guaranteed to be continuous and have no loss, and compared with the traditional method for collecting and storing the data in real time, the method can guarantee the completeness and no loss of the data, provides guarantee for the subsequent analysis and processing of the data, and is suitable for wide popularization and application.

Drawings

Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments with reference to the following drawings:

FIG. 1 is a diagram illustrating data caching according to the present invention.

Detailed Description

The present invention will be described in further detail with reference to the following examples for the purpose of making clear the objects, process conditions and advantages of the present invention, but the embodiments of the present invention are not limited thereto, and various substitutions and modifications can be made according to the common technical knowledge and the conventional means in the art without departing from the technical idea of the present invention described above, and the specific examples described herein are only for explaining the present invention and are not intended to limit the present invention.

Example 1:

the method for ensuring the data integrity in the communication between the upper computer and the lower computer comprises the following steps:

in the upper computer processing program, n groups of two fixed-length arrays with the same length as L are opened up as buffer areas, namely a buffer area A_iAnd a buffer B_iWherein i is more than or equal to 1 and less than or equal to n, and the i is respectively corresponding to the ith column of the two-dimensional array in the lower computer program;

in the lower computer collection program, two-dimensional arrays with the size of m × n are opened, wherein the value of m is determined by the period of reading the arrays by the upper computer (in the example, m is L), and the value of n is determined by the data type quantity of the collected data. Wherein the two-dimensional ARRAY1 is denoted as DATA _ ARRAY1, and the two-dimensional ARRAY2 is denoted as DATA _ ARRAY 2.

In a lower computer program, two counting identification bits ARRAY1Index and ARRAY2Index are set as the counting of the number of rows of two ARRAYs, and the initial value is 1; setting a cycle count bit k for storing and counting; setting four array state Boolean identification bits; bArray1PutDataExecuting, bArray1PutDataDone, bArray2PutDataExecuting, and bArray2 PutDataDone. When the boolean flag bit is TRUE, it indicates that data is being stored in the two-dimensional array1, the two-dimensional array1 is full of data, data is being stored in the two-dimensional array2, and the two-dimensional array2 is full of data.

When the lower computer starts to collect data, the n-path data are simultaneously read at the collection frequency f and stored into two arrays, and the storage method comprises the following steps: writing (n) DATA into one row of a two-dimensional ARRAY1, namely DATA _ ARRAY1in each PLC cycle period, and adding 1 to each row of ARRAY1 Index; checking the value of ARRAY1Index, when the ARRAY1Index is less than m, continuing the program, when the ARRAY1Index is more than m, setting the value of bARRAY1PutDataExecuting as FALSE and the value of bARRAY1PutDataDone as TRUE for providing the upper computer for judgment; meanwhile, setting ARRAY2Index as 1, self-adding 1 to the cycle count bit k, and starting to write DATA into the two-dimensional ARRAY2, namely DATA _ ARRAY2, wherein the value of ARRAY2Index is self-added with 1 when writing one row; and simultaneously checking the value of ARRAY2Index, when ARRAY1Index is less than m, continuing the program, when ARRAY1Index is more than m, setting ARRAY1Index to be 1, self-adding 1 to the counting bit k of the cycle times, writing data into the ARRAY1 again, setting the value of bARRAY2PutDataExecuting to be FALSE, and setting bARRAY2PutDataDone to be TRUE. The operation is repeated in a circulating way, and the acquired data is written into the two arrays.

And the upper computer program acquires and judges the values of the four Boolean variables in real time. When: when the ARRAY DATA _ ARRAY1 is full and the ARRAY DATA _ ARRAY2 is storing, n columns (m columns) of DATA _ ARRAY1 are read into the buffer (n columns in total) at a time. When: when the bar 2 push datadone ═ TRUE & & bArray1 push dataexecuting ═ TRUE & & k% 2 ═ 1, that is, when the ARRAY DATA _ ARRAY2 stores full DATA and the ARRAY DATA _ ARRAY1 is storing, n columns of DATA (m per column) of the DATA _ ARRAY2 are read into the buffer at once (n columns in total), respectively. According to the method, the data collected by the lower computer can be completely stored locally through processing, and guarantee is provided for subsequent analysis and processing of the data.

The method comprises the following specific steps:

through a TWINCAT software ADS communication protocol, simulating real-time data acquisition and storage by using a Visual Studio2013 platform, creating two-dimensional arrays DATA ARRAY1 and DATA ARRAY2 with the size of m × n in a lower computer program, simultaneously reading n-path data at an acquisition frequency f, writing each row of the array into a row of the array1in a data _ array _1[ array1Index, i ] mode, wherein i is the row number of the array, (1 is not less than i and not more than n), the array1Index is the row Index of the array, and 1 is added to the array1Index when each row is written. When ARRAY1Index is judged to be more than m, modifying the ARRAY state identification position, setting the value of bArray1PutDataExecuting as FALSE and bArray1PutDataDone as TRUE, and adding 1 to the cycle count bit k; the method comprises the steps that an upper computer program obtains an array state identification position in real time, and when the situation that bArray1PutDataDone is equal to TRUE and bArray2PutDataExecuting is equal to TRUE and k% 2 is equal to 0 is judged, the value of the ith column of a two-dimensional array1 is correspondingly written into an ith group of upper computer buffer area 1; then data is written into the two-dimensional array DATA ARRAY2, and for each column of the array, data _ array _2[ array2Index, i ] is written into the row of the array2, where i is the column number of the array, (1 ≦ i ≦ n), array2Index is the row Index of the array, and for each row written, 1 is added to the array2 Index. When ARRAY2Index is judged to be more than m, modifying the ARRAY state identification position, setting the value of bArray2PutDataExecuting as FALSE and bArray2PutDataDone as TRUE, and adding 1 to the cycle count bit k for providing to an upper computer for judgment; the upper computer program acquires an array state identification bit in real time, and when judging that bArray2PutDataDone ═ TRUE & & bArray1PutDataExecuting ═ TRUE & & k% 2 ═ 1, the value of the ith column of the two-dimensional array2 is correspondingly written into the ith group of upper computer buffer areas 2.

Table 1 shows the simulated acquisition values, the lower computer simulates to acquire a sin function oscillogram at a 1000Hz acquisition frequency, and the upper computer reads the sin function oscillogram in real time, wherein value is sin2 tt, value is the value of the sin function at time t, t is a time variable, and 0.01 is added in each 1 ms. The test is respectively carried out by using the buffering method and the traditional non-buffering method, and the table data is obtained by intercepting comparison values in a period of time. It can be seen that the caching method adopted by the present invention can completely store sin function values, whereas the conventional non-caching method misses data from the 9 th group of data, and the 9 th column of the non-caching method misses data by one than the 9 th column of the caching method, i.e. value (non-caching, 9) ═ value (caching, 10). From column 9 of table 1, the non-buffer method starts to lose data, and data results are collected according to 787 groups of data of the experiment, and it can be found that the data completely restores the sine function by using the buffer method, but the graph distortion is more serious by using the non-buffer method.

TABLE 1 analog acquisition values

While embodiments of the invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A method for ensuring data integrity in communication between an upper computer and a lower computer is characterized by comprising the following steps:

(1) two-dimensional storage arrays are opened up in a lower computer acquisition program, and a state identification bit for judging whether data is full is set for each two-dimensional storage array; in the step (1), two-dimensional storage ARRAYs with the size of m × n are opened up in the lower computer acquisition program, wherein the value of m is determined by reading the PLC cycle of the two-dimensional storage ARRAYs by the upper computer, the value of n is determined by the DATA type number of the acquired DATA, and the two-dimensional storage ARRAYs are respectively marked as DATA _ ARRAY1 and DATA _ ARRAY 2; in the step (1), the state identification bits comprise a counting identification bit, a cycle counting bit k and four two-dimensional storage array state Boolean identification bits which are arranged in a lower computer program; the number of the counting identification bits is two, the two-dimensional storage arrays are respectively used as the number counting of the two arrays, and the initial value of the counting identification bits is 1; the number of the cycle counting bits k is one, and the cycle counting bits k are used as storage counting; four status boolean flag bits of the two-dimensional memory array are specifically, biarray 1PutDataExecuting, biarray 1PutDataDone, biarray 2PutDataExecuting, biarray 2 PutDataDone;

(2) two fixed-length arrays are opened up in an upper computer program to serve as buffer areas, and the buffer areas respectively correspond to each row of data in a two-dimensional storage array in a lower computer acquisition program; in the step (2), in the upper computer processing program, the n groups of two fixed-length arrays with the same length L corresponding to the number n of the collected data types are opened up as buffer areas, and the fixed-length arrays are respectively buffer areas A_iAnd a buffer B_iWherein i is more than or equal to 1 and less than or equal to n, and the i is respectively corresponding to the ith column of the two-dimensional storage array in the lower computer program;

(3) the lower computer acquisition program acquires all data generated in real time in the machining process, alternately stores the data into two-dimensional storage arrays in the lower computer, and modifies the state identification bits of the two-dimensional storage arrays and provides the state identification bits for the upper computer to read after the lower computer acquisition program detects that one two-dimensional storage array is full of data; in the step (3), when the lower computer starts to collect real-time data, the n-path data is simultaneously read at the collection frequency f and stored into the two arrays, and the data storage method specifically comprises the following steps: writing n DATA into one row of DATA _ ARRAY1in each PLC cycle period, and adding 1 to each row of ARRAY1 Index; checking the value of ARRAY1Index, when the ARRAY1Index is less than m, continuing the program, when the ARRAY1Index is more than m, setting the value of bARRAY1PutDataExecuting as FALSE and the value of bARRAY1PutDataDone as TRUE for providing the upper computer for judgment; meanwhile, setting ARRAY2Index as 1, self-adding 1 to the cycle count bit k, and starting to write DATA into the two-dimensional ARRAY2, namely DATA _ ARRAY2, wherein the value of ARRAY2Index is self-added with 1 when writing one row; checking the value of ARRAY2Index, when ARRAY2Index is less than m, continuing the program, when ARRAY2Index is more than m, setting ARRAY1Index to be 1, self-adding 1 to the counting bit k of the cycle times, writing the data into the ARRAY1 again, setting bARRAY2PutDataExecuting to be FALSE and bARRAY2PutDataDone to be TRUE, and repeating the steps in such a cycle, and writing the acquired data into the two ARRAYs;

(4) two-dimensional storage array by judging upper computer programReading a row of data in the two-dimensional storage array which is full of data, and storing the row of data in a corresponding buffer area opened by an upper computer program, thereby finishing the alternate work of the two-dimensional storage arrays and the two buffer areas and finishing the complete storage of the data; in the step (4), the process of judging the state identification bit of the two-dimensional storage array by the upper computer program is as follows: bare 2PutDataDone ═ TRUE&&bArray1PutDataExecuting＝＝TRUE&&When k% 2 is equal to 0, that is, when the ARRAY DATA _ ARRAY1 stores full DATA and the ARRAY DATA _ ARRAY2 is storing DATA, n columns of DATA of the DATA _ ARRAY1, m DATA per column, are read into the buffer a at one time_iN columns in total; when: bare 2PutDataDone ═ TRUE&&bArray1PutDataExecuting＝＝TRUE&&When k% 2 is 1, that is, when the ARRAY DATA _ ARRAY2 stores full DATA and the ARRAY DATA _ ARRAY1 is storing, n columns of DATA of the DATA _ ARRAY2, m DATA columns each, are read into the buffer B at one time_iIn n columns.