CN109815534B - Flash memory life prediction method and system based on decision tree algorithm - Google Patents
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Abstract
The invention relates to a method and a system for predicting the service life of a flash memory based on a decision tree algorithm. The invention has the advantage of being capable of making feasible and effective results on large data sources in a relatively short time.
Description
Technical Field
The invention relates to the technical field of flash memory life prediction, in particular to a method and a system for predicting flash memory life based on a decision tree algorithm.
Background
The memory is a memory device used for storing information in modern information technology. In the operation process of the electronic equipment, input original data, a computer program, an intermediate operation result and a final operation result are all stored in a memory, and the method is one of core components for the development of modern information technology. Currently, the memories on the market are mainly divided into: volatile memory and non-volatile memory. Flash memory is a non-volatile memory, which can store data for a long time after power failure, and has the advantages of high data transmission speed, low production cost, large storage capacity and the like, so the flash memory is widely applied to electronic equipment.
Under the existing flash memory structure, due to the influence of a semiconductor manufacturing process, the cells in the flash memory can cause the oxide layer to degrade along with the increase of the erasing and writing times, so that errors occur in the storage process of the memory chip, and finally the flash memory fails. Therefore, the test to determine the service life of the flash memory has important significance in the production and use processes of the flash memory.
The residual service life of the flash memory is predicted, so that a user of the flash memory storage device can know the loss state of the memory before or during the use of the device, and the data loss caused by the failure of a memory unit is avoided. Meanwhile, the user of the memory can change the strategy of storing data according to the predicted residual life information of the flash memory and effectively utilize the flash memory to store data.
Disclosure of Invention
The invention provides a method and a system for predicting the service life of a flash memory based on a decision tree algorithm, aiming at the technical problems in the prior art, wherein one characteristic quantity or a combination of a plurality of characteristic quantities of the flash memory is measured, mathematical operation is carried out on part of the characteristic quantities or the combination, the operation result or the measurement result or the combination of the operation result and the measurement result is input into the decision tree algorithm, and the predicted value of the service life of the flash memory is obtained by calculation of the decision tree algorithm.
The technical scheme for solving the technical problems is as follows:
in a first aspect, the present invention provides a method for predicting flash memory lifetime based on a decision tree algorithm, comprising the following steps:
acquiring a flash memory characteristic quantity of a flash memory to be predicted, wherein the flash memory characteristic quantity is a characteristic quantity corresponding to a node type of a flash memory life prediction model based on a decision tree algorithm;
and inputting the flash memory characteristic quantity into a flash memory life prediction model based on a decision tree algorithm, and calculating to obtain a life prediction value of the flash memory.
Further, the flash memory characteristic quantity includes flash memory physical information directly acquired through flash memory operation or an operation processing value obtained by performing operation on the flash memory physical information.
Further, the flash physical information directly collected by the flash operation at least includes one or more of the following physical information:
programming time, reading time, erasing time, current, chip power consumption, threshold voltage distribution, memory block number, memory page number, number of programming/erasing cycles currently experienced by the flash memory chip, number of conditional error pages, number of conditional error blocks, number of error bits, and error rate of the flash memory chip.
Further, the operation processing value obtained by performing the operation on the flash physical information at least includes one or more of the following operations:
linear operation of characteristic quantities, nonlinear operation of characteristic quantities, linear operation among different characteristic quantities, nonlinear operation among different characteristic quantities, calculation of maximum values of different storage page characteristic quantities, calculation of minimum values of different storage page characteristic quantities, linear operation among different storage page characteristic quantities, nonlinear operation among different storage page characteristic quantities, linear operation among different storage block characteristic quantities, nonlinear operation among different storage block characteristic quantities, calculation of maximum values of different storage block characteristic quantities and calculation of minimum values of different storage block characteristic quantities.
Further, before the obtaining of the flash memory characteristic quantity of the flash memory to be predicted, the method further comprises the step of establishing a flash memory life prediction model based on a decision tree algorithm, and the method specifically comprises the following steps:
acquiring sample data, and randomly selecting a preset number of flash memory chips from flash memory product sets of the same type and different batches under the same manufacturing process as test samples;
performing corresponding flash memory operation on a sample flash memory, acquiring flash memory physical information and flash memory life information required for establishing a flash memory life prediction model based on a decision tree algorithm, and setting a life prediction node type;
and processing data through a decision tree algorithm to establish a mathematical model, taking the flash memory characteristic quantity corresponding to the node type as an input variable of a mathematical mapping relation in the algorithm, taking the flash memory life prediction value as an output variable of the mathematical mapping relation, and training the mathematical model to obtain the optimal flash memory life prediction model based on the decision tree algorithm.
Further, the performing the flash memory operation on the sample flash memory to obtain the flash memory physical information and the flash memory life information required for establishing the flash memory life prediction model based on the decision tree algorithm includes:
step 601, randomly extracting sample chips from test samples, and randomly selecting a storage block from each sample flash memory;
step 602, performing an erasing operation on the flash memory block, and recording related test physical information;
step 603, sending a test data set to the flash memory storage block, executing write operation on the flash memory storage block after sending the test data vector, and keeping the data stored in the flash memory storage block for a period of time, wherein the storage time is determined according to the type of the flash memory chip;
step 604, performing a data reading operation on the flash memory block, comparing the read data with the sent test data, recording and storing error data information, and if no error occurs, not storing the error data information; simultaneously recording other physical quantities;
step 605, repeatedly executing the operations from step 602 to step 604, and recording the number of erasing operations; when the operation times reach a set value, the test system records the related data of the flash memory block in the last operation from step 602 to step 604;
step 606, counting and saving data error rate information of the flash memory storage block;
in step 607, the operations in step 605 and step 606 are repeatedly executed until the flash memory reaches the lifetime limit, and the number of program/erase operation cycles of the flash memory is counted.
In a second aspect, the present invention further provides a system for predicting flash life based on decision tree algorithm, comprising
The data acquisition unit is connected with the flash memory to be predicted and is used for acquiring the characteristic quantity required by prediction;
and the service life prediction unit is used for inputting the collected characteristic quantity of the flash memory to be predicted into a flash memory service life prediction model based on a decision tree algorithm and calculating to obtain a service life prediction value of the flash memory.
In a third aspect, the present invention further provides a flash memory test device, where the flash memory test device is connected to an upper computer test system through a data switch, and includes a test main control board and a flash memory test sub-board;
the testing main control board is realized by FPGA and is used for carrying out flash memory operation and collecting flash memory characteristic quantity for establishing a life prediction model or for life prediction;
the flash memory test sub-board is used for connecting the sample flash memory or the flash memory to be predicted.
In a third aspect, the present invention further provides a computer-readable storage medium, in which a computer software program for implementing the method for predicting the lifetime of a flash memory based on a decision tree algorithm according to the first aspect of the present invention is stored.
The invention has the beneficial effects that: 1. compared with the prior art, the method has the advantages that the data preparation and training process is very simple, and the data characteristic can be embodied very intuitively. 2. The invention takes various reliability parameters as the input of the decision tree algorithm, and the accuracy of the predicted life value is higher compared with a life prediction model which only takes one parameter as the basis. 3. The decision tree algorithm in the flash memory life prediction method based on the decision tree algorithm has the advantages that feasible and good results can be made on large data sources within relatively short time.
Drawings
Fig. 1 is a schematic flow chart of a method for predicting the lifetime of a flash memory based on a decision tree algorithm according to an embodiment of the present invention.
Fig. 2 is a structural diagram of a flash memory test system according to an embodiment of the invention.
Fig. 3 is a flowchart of establishing a flash life prediction model using a regression tree algorithm according to an embodiment of the present invention.
Fig. 4 is a flowchart of a specific implementation of a training data obtaining method according to an embodiment of the present invention.
Fig. 5 is a flowchart of a specific implementation of splitting and classifying in the regression tree algorithm according to an embodiment of the present invention.
Detailed Description
The principles and features of this invention are described below in conjunction with the following drawings, which are set forth by way of illustration only and are not intended to limit the scope of the invention.
Fig. 1 is a schematic diagram of a flash life prediction process according to the present invention, wherein the flash life prediction process is applicable to all flash types, and fig. 1 is explained in detail below by taking a flash product as an embodiment.
In this embodiment, a 3D multi-level cell NAND flash memory (MLC NAND flash) product in a certain manufacturing process is used as a test object and a life prediction object.
As shown in fig. 1, in this embodiment, the method of the present invention includes the following steps:
step S01, extracting samples from the flash memory product set according to the following rules: the sample flash memories are the same type of flash memories under the same manufacturing process; the same number of chip samples are randomly drawn from different batches of chips to ensure sample diversity. The sampling batches are selected randomly, and the number of samples can be one percent of the total flash memory amount of the sampled batches.
Step S02, connect the sample flash memory with the flash memory test system to start testing and collecting the required flash memory physical information and flash memory life information. The flash memory physical information related in the embodiment includes: data information (threshold voltage distribution is optional physical information) in which the program time, erase time, threshold voltage distribution, and error rate of a block in a flash memory chip vary under an increasing condition of program/erase cycles from the start of use to the period of abnormal use of the flash memory.
The method for acquiring the programming time of the flash memory block comprises the following steps: setting a programming time recording module in a flash memory test system; the programming time recording module records the passed clock period when the flash memory starts to write data operation and stops recording the clock period number after receiving a data programming completion mark returned by the flash memory; the program time value is the clock cycle duration times the number of program clock cycles.
The method for obtaining the erasing time of the flash memory block is similar to the method for obtaining the programming time, an erasing time recording module in the test system records the clock period number of the erasing operation duration, and the erasing time value is the clock period duration multiplied by the erasing clock period number. The method for acquiring the threshold voltage distribution of the flash memory cell comprises the following steps: the test system sends a READ-RETRY command set to the flash memory to gradually change the READ reference voltage of the flash memory while reading data and statistically distributing threshold voltages according to the READ data values.
The flash memory block error rate acquisition mode is as follows: the test system executes read data operation on the flash memory to read data from the flash memory, compares the read data with the written test data to count the number of error data, and the error rate is the number of errors divided by the total number of data.
The flash memory test system used in step S02 has a structure as shown in fig. 2, and mainly includes an upper computer test control system and a flash memory control module. The upper computer testing system is realized by writing a program system through a computer language; the flash memory control module is realized through an FPGA.
Step S03, establishing a mathematical model by processing data through a regression tree algorithm, taking physical information obtained by testing as an input variable of a mathematical mapping relation in the algorithm, and taking a flash memory life prediction value as an output variable of the mathematical mapping relation; in this embodiment, a regression tree algorithm is used as an intelligent algorithm for building a mathematical model, and the decision tree algorithm described in the present invention is not limited to this algorithm. The flash life value refers to the number of program/erase cycles that a flash product can perform before failing.
In step S03 of this embodiment, a process of building a flash life prediction model using a regression tree algorithm is shown in fig. 3. According to fig. 3, the specific steps of establishing the flash memory life prediction model are as follows:
(1) and acquiring data required for establishing the regression tree model, wherein the data can be acquired by testing the same chip, and can also be acquired by using test data of other people on the same chip.
In step (1), the flow chart of the test chip data is shown in fig. 4:
a) randomly extracting sample chips from the flash memory set, connecting the sample flash memories with a test system, and randomly selecting a memory block from each sample flash memory.
b) And performing erasing operation on the flash memory storage block through the flash memory test platform, and recording related test physical quantity.
c) Sending a test data set to the flash memory storage block through the test system, executing write operation on the flash memory storage block after the test data set is sent, and keeping the data stored in the flash memory storage block for a period of time, wherein the storage time is determined according to the type of the flash memory chip.
d) Executing data reading operation on the flash memory through a test system, comparing read data with sent test data, recording and storing error data information, and if errors do not occur, not storing the error data information; while other physical quantities are recorded.
e) Repeatedly executing the operations from the step (b) to the step (d), and recording the times of erasing and writing operations; when the operation times reach the set value, the test system records the related data of the flash memory block in the last operation from the step (b) to the step (d).
f) Measuring the threshold voltage distribution of the flash memory unit through a test system, and recording and storing the threshold voltage distribution information of the unit; this step is optional and is not included in the testing step if the predicted object does not have READ-RETRY functionality.
g) And the test system counts and stores the data error rate information of each storage block of the flash memory.
h) Repeating (e) through (g) until the flash memory reaches a lifetime limit; the test system counts the number of program/erase cycles of the flash memory.
(2) And setting the service life prediction node type.
According to the definition of the decision tree, the life prediction node type in step (2) mainly includes programming time, reading time, erasing time, current, chip power consumption, threshold voltage distribution, memory block number, memory page number, number of programming/erasing cycles currently experienced by the flash memory, number of conditional error pages, number of conditional error blocks, number of error bits, and error rate of the flash memory (one or more of the above feature quantities and variations of the feature quantities may be selected as key nodes).
(3) And (3) substituting the data in the step (1) into the regression tree algorithm, and training the model for predicting the service life of the regression tree algorithm to obtain a service life prediction model of the regression tree algorithm with higher precision.
The high-precision prediction model in the step (3) mainly refers to a regression tree algorithm prediction model obtained by layer-by-layer splitting by taking the attribute with the minimum regression variance as a splitting scheme.
According to the definition of the decision tree, the training mode in step (3) is mainly as shown in fig. 5:
a) according to the data correlation, the physical quantity with higher correlation is selected as a split node (such as programming time).
b) The split nodes are classified (e.g., programming time ranges from a-B, which can be classified as a-a, a-B, …, z-B).
c) Calculating regression variance of the classification mode, wherein the specific mode is
Where I is an interval of split nodes, I is a point within the interval, xiIs the life corresponding to the i point, mu is the average life of all points in the interval; and L represents the whole node value interval. A smaller regression variance indicates a more accurate model. The classification of the node is optimized by some processing means (e.g., C4.5) so that the regression variance is less than a certain threshold, and the classification means is used as the final classification of the split node.
d) Repeating the steps a) to c), and continuing the splitting training on the model. Until the number of layers is split or the regression variance is less than a certain threshold.
e) And extracting a regression tree algorithm model.
The data processing operation required for establishing the flash memory life prediction model is realized by a computer program, and the used computer language is not limited to a certain computer language.
And step S04, measuring the corresponding input physical information of the flash memory to be predicted by using the flash memory test platform in the step S02, using the measured input physical information as an input variable of the life prediction model, calculating an output value of the life prediction model, and predicting the residual life value of the target flash memory product.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (4)
1. A method for predicting the service life of a flash memory based on a decision tree algorithm is characterized by comprising the following steps:
s1, establishing a flash memory life prediction model based on a decision tree algorithm;
s2, acquiring the flash memory characteristic quantity of the flash memory to be predicted, wherein the flash memory characteristic quantity is the characteristic quantity corresponding to the node type of the flash memory life prediction model based on the decision tree algorithm;
s3, inputting the flash memory characteristic quantity into a flash memory life prediction model based on a decision tree algorithm, and calculating to obtain a life prediction value of the flash memory;
the method for establishing the flash memory life prediction model based on the decision tree algorithm specifically comprises the following steps:
s101, obtaining sample data, and randomly selecting a preset number of flash memory chips from flash memory product sets of the same type and different batches under the same manufacturing process as test samples;
s102, carrying out corresponding flash memory operation on a sample flash memory, acquiring flash memory physical information and flash memory life information required for establishing a flash memory life prediction model based on a decision tree algorithm, and setting a life prediction node type; the service life prediction node type comprises programming time, reading time, erasing time, current, chip power consumption, threshold voltage distribution, storage block number, storage page number, programming/erasing period number currently experienced by the flash memory, conditional error page number, conditional error block number, error bit number and error rate of the flash memory;
s103, processing data through a decision tree algorithm to establish a mathematical model, taking the flash memory characteristic quantity corresponding to the node type as an input variable of a mathematical mapping relation in the algorithm, taking a flash memory life prediction value as an output variable of the mathematical mapping relation, and training the mathematical model to obtain an optimal flash memory life prediction model based on the decision tree algorithm; the flash memory characteristic quantity comprises flash memory physical information directly acquired through flash memory operation or an operation processing value obtained by performing operation on the flash memory physical information;
the operation processing value obtained by performing operation on the flash physical information comprises one or more of the following operations:
linear operation of characteristic quantities, nonlinear operation of characteristic quantities, linear operation among different characteristic quantities, nonlinear operation among different characteristic quantities, calculation of maximum values of different storage page characteristic quantities, calculation of minimum values of different storage page characteristic quantities, linear operation among different storage page characteristic quantities, nonlinear operation among different storage page characteristic quantities, linear operation among different storage block characteristic quantities, nonlinear operation among different storage block characteristic quantities, calculation of maximum values of different storage block characteristic quantities and calculation of minimum values of different storage block characteristic quantities;
the training of the mathematical model in step S103 to obtain an optimal flash memory life prediction model based on a decision tree algorithm includes:
s1031, selecting physical quantities with high correlation degrees as split nodes according to the data correlation;
s1032, classifying the split nodes;
s1033, calculating the regression variance of the classification mode, wherein the specific mode is as follows:
where I is an interval of split nodes, I is a point within the interval, xiIs the life corresponding to the i point, mu is the average life of all points in the interval; l represents the whole node value interval; optimizing the node classification to ensure that the regression variance is smaller than a certain threshold value, and taking the classification mode as the final classification of the split node;
s1034, repeating the steps from S1031 to S1033, and continuing splitting training on the model until the model is split to a certain number of layers or the regression variance is smaller than a certain threshold value;
and S1035, extracting a decision tree algorithm model.
2. The method according to claim 1, wherein the flash memory physical information and the flash memory life information required for establishing the flash memory life prediction model based on the decision tree algorithm are obtained by performing corresponding flash memory operations on the sample flash memory, and the method comprises:
step 601, randomly extracting sample chips from test samples, and randomly selecting a storage block from each sample flash memory;
step 602, performing an erasing operation on the flash memory block, and recording related test physical information;
step 603, sending a test data set to the flash memory storage block, executing write operation on the flash memory storage block after the test data set is sent, and keeping the data stored in the flash memory storage block for a period of time, wherein the storage time is determined according to the type of the flash memory chip;
step 604, performing a data reading operation on the flash memory block, comparing the read data with the sent test data, recording and storing error data information, and if no error occurs, not storing the error data information; simultaneously recording other physical quantities;
step 605, repeatedly executing the operations from step 602 to step 604, and recording the number of erasing operations; when the operation times reach a set value, the test system records the related data of the flash memory block in the last operation from step 602 to step 604;
step 606, counting and saving data error rate information of the flash memory storage block;
in step 607, the operations in step 605 and step 606 are repeatedly executed until the flash memory reaches the lifetime limit, and the number of program/erase operation cycles of the flash memory is counted.
3. A flash memory life prediction system based on decision tree algorithm is characterized by comprising
The model establishing unit is used for establishing a flash memory life prediction model based on a decision tree algorithm;
the data acquisition unit is connected with the flash memory to be predicted and is used for acquiring the characteristic quantity required by prediction;
the service life prediction unit is used for inputting the collected characteristic quantity of the flash memory to be predicted into a flash memory service life prediction model based on a decision tree algorithm and calculating to obtain a service life prediction value of the flash memory;
wherein the model building unit includes: the system comprises a sample data acquisition module, a node type setting module and a model training and optimizing module;
the sample data acquisition module is used for acquiring sample data and randomly selecting a preset number of flash memory chips from flash memory product sets of the same type and different batches under the same manufacturing process as test samples;
the node type setting module is used for carrying out corresponding flash memory operation on the sample flash memory, acquiring flash memory physical information and flash memory life information required for establishing a flash memory life prediction model based on a decision tree algorithm, and setting a life prediction node type; the service life prediction node type comprises programming time, reading time, erasing time, current, chip power consumption, threshold voltage distribution, storage block number, storage page number, programming/erasing period number currently experienced by the flash memory, conditional error page number, conditional error block number, error bit number and error rate of the flash memory;
the model training and optimizing module is used for processing data through a decision tree algorithm to establish a mathematical model, taking the flash memory characteristic quantity corresponding to the node type as an input variable of a mathematical mapping relation in the algorithm, taking a flash memory life predicted value as an output variable of the mathematical mapping relation, and training the mathematical model to obtain an optimal flash memory life prediction model based on the decision tree algorithm; the flash memory characteristic quantity comprises flash memory physical information directly acquired through flash memory operation or an operation processing value obtained by performing operation on the flash memory physical information;
the operation processing value obtained by performing operation on the flash physical information comprises one or more of the following operations:
linear operation of characteristic quantities, nonlinear operation of characteristic quantities, linear operation among different characteristic quantities, nonlinear operation among different characteristic quantities, calculation of maximum values of different storage page characteristic quantities, calculation of minimum values of different storage page characteristic quantities, linear operation among different storage page characteristic quantities, nonlinear operation among different storage page characteristic quantities, linear operation among different storage block characteristic quantities, nonlinear operation among different storage block characteristic quantities, calculation of maximum values of different storage block characteristic quantities and calculation of minimum values of different storage block characteristic quantities;
the model training and optimizing module is used for training a mathematical model to obtain an optimal flash memory life prediction model based on a decision tree algorithm, and specifically comprises the following steps:
the node selection submodule is used for selecting physical quantity with higher correlation as a split node according to the data correlation;
the node classification submodule is used for classifying the split nodes;
the regression variance calculation submodule is used for calculating the regression variance of the classification mode, and the specific mode is as follows:
where I is an interval of split nodes, I is a point within the interval, xiIs the life corresponding to the i point, mu is the average life of all points in the interval; l represents the whole node value interval; optimizing the node classification to ensure that the regression variance is smaller than a certain threshold value, and taking the classification mode as the final classification of the split node;
the circulation control sub-module is used for setting training conditions, continuing splitting training on the model until the model is split to a certain number of layers or the regression variance is smaller than a certain threshold value, and ending the training;
and the model extraction submodule is used for extracting the decision tree algorithm model.
4. A computer-readable storage medium, in which a computer software program for implementing the method of any one of claims 1-2 is stored.
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Effective date of registration: 20210727 Address after: 518000 Shenzhen, Longgang, Guangdong Bantian street, Jihua Road, long Bi industrial city 13, 2 level. Patentee after: Futurepath Technology (Shenzhen) Co.,Ltd. Address before: Room 306, building C, Huazhong Shuguang Software Park, 1 Guanshan 1st Road, Donghu New Technology Development Zone, Wuhan City, Hubei Province, 430000 Patentee before: WUHAN RECADATA STORAGE TECHNOLOGY Co.,Ltd. Patentee before: HUAZHONG University OF SCIENCE AND TECHNOLOGY |
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| PE01 | Entry into force of the registration of the contract for pledge of patent right |
Denomination of invention: A flash memory life prediction method and system based on decision tree algorithm Effective date of registration: 20220325 Granted publication date: 20200904 Pledgee: Industrial and Commercial Bank of China Limited Shenzhen gaoxinyuan sub branch Pledgor: FUTUREPATH TECHNOLOGY Co.,Ltd. Registration number: Y2022980003211 |