CN112020764A - Method for evaluating semiconductor wafer and method for manufacturing semiconductor wafer - Google Patents
Method for evaluating semiconductor wafer and method for manufacturing semiconductor wafer Download PDFInfo
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- CN112020764A CN112020764A CN201980025203.7A CN201980025203A CN112020764A CN 112020764 A CN112020764 A CN 112020764A CN 201980025203 A CN201980025203 A CN 201980025203A CN 112020764 A CN112020764 A CN 112020764A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 207
- 238000000034 method Methods 0.000 title claims abstract description 48
- 238000004519 manufacturing process Methods 0.000 title claims description 119
- 238000011156 evaluation Methods 0.000 claims abstract description 98
- 230000002093 peripheral effect Effects 0.000 claims abstract description 27
- 230000004069 differentiation Effects 0.000 claims abstract description 12
- 235000012431 wafers Nutrition 0.000 claims description 244
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 15
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B11/00—Measuring arrangements characterised by the use of optical techniques
- G01B11/24—Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B11/00—Measuring arrangements characterised by the use of optical techniques
- G01B11/24—Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures
- G01B11/255—Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures for measuring radius of curvature
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B2210/00—Aspects not specifically covered by any group under G01B, e.g. of wheel alignment, caliper-like sensors
- G01B2210/56—Measuring geometric parameters of semiconductor structures, e.g. profile, critical dimensions or trench depth
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02002—Preparing wafers
- H01L21/02005—Preparing bulk and homogeneous wafers
- H01L21/02008—Multistep processes
- H01L21/0201—Specific process step
- H01L21/02021—Edge treatment, chamfering
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Abstract
The invention provides an evaluation method of a semiconductor wafer, comprising the following steps: creating a profile curve representing a cross-sectional profile of the semiconductor wafer to be evaluated in a thickness direction; and performing a second differentiation on the profile curve, the semiconductor wafer to be evaluated being a semiconductor wafer having a chamfer formed on an outer peripheral edge portion thereof, the profile curve including a curve portion indicating a cross-sectional profile of a region from an outer peripheral edge portion of a main surface on one surface side of the semiconductor wafer to the main surface side portion of the outer peripheral edge portion, the value of the X axis corresponding to a horizontal direction position coordinate, and the value of the Y axis corresponding to a vertical direction position coordinate, the method for evaluating a semiconductor wafer further including evaluating a shape of a boundary portion between the main surface and the chamfer adjacent to the main surface based on an index determined based on a second differentiation curve obtained by the second differentiation.
Description
Technical Field
The present invention relates to a method for evaluating a semiconductor wafer and a method for manufacturing a semiconductor wafer.
Background
In recent years, the shape of the peripheral edge portion of a semiconductor wafer has been evaluated (see, for example, patent document 1).
Documents of the prior art
Patent document
Patent document 1: japanese patent laid-open publication No. 2016-
Technical problem to be solved by the invention
Semiconductor wafers are generally manufactured by subjecting wafers cut out from an ingot to various processes. The outer peripheral edge of the wafer cut out from the ingot has a corner when it is held as it is, and therefore cracks or chipping easily occurs. Therefore, the chamfered surface is generally formed by chamfering the peripheral edge portion of at least one of the front surface (front surface) of the semiconductor wafer, which is the device formation surface side, and the front surface (back surface) of the semiconductor wafer, which is the opposite side of the front surface. Regarding the chamfered surface, patent document 1 proposes the following: an image is acquired so that the chamfered surface is displayed in white, and the width of the chamfered surface is calculated from the width of the image (see paragraphs 0060 to 0062 in patent document 1). Hereinafter, unless otherwise specified, "front surface" of a semiconductor wafer refers to either or both of the front surface and the back surface.
In the front surface of the semiconductor wafer, the front-side principal surface is a plane on which devices are formed, and the back-side plane is a principal surface of the back-side. The chamfered surface formed at the outer peripheral edge portion of the wafer has a surface shape inclined with respect to the adjacent main surface. Therefore, if the cross-sectional shape of the semiconductor wafer in the thickness direction is observed, the shape greatly changes at the boundary between the main surface and the chamfered surface adjacent to the main surface. The shape of the boundary between the main surface and the chamfered surface can be used as an index for predicting the ease of generation of a notch or a flaw in the manufacturing process of a semiconductor device. For example, in a manufacturing process of a semiconductor device, by appropriately setting the shape of the boundary portion between the front surface (for example, the back surface) and the chamfered surface of the wafer in accordance with the shape of the wafer support that supports the wafer at the time of heat treatment, a notch or a flaw in the boundary portion due to contact is less likely to occur, and therefore, the occurrence rate of dislocation (slip) or dust due to the notch or the flaw can be reduced.
However, the method described in patent document 1 is a method of determining the width dimension of the chamfered surface, and the method described in patent document 1 cannot evaluate the shape of the boundary portion between the chamfered surface and the main surface.
Disclosure of Invention
Therefore, an object of the present invention is to provide a new method for evaluating the shape of the boundary portion between the chamfered surface and the main surface of the semiconductor wafer.
One embodiment of the present invention relates to a method for evaluating a semiconductor wafer (hereinafter, also simply referred to as "evaluation method"), including:
creating a profile curve representing a cross-sectional profile of the semiconductor wafer to be evaluated in a thickness direction; and
performing second differentiation on the profile curve;
the semiconductor wafer to be evaluated is a semiconductor wafer having a chamfered surface formed at the outer peripheral edge portion of the wafer,
the profile curve includes a curve portion which represents a cross-sectional profile of a region from an outer peripheral edge portion of a main surface on one surface side of the semiconductor wafer to be evaluated to the main surface side portion of the outer peripheral edge portion, the curve portion corresponding to the horizontal direction position coordinate and the curve portion corresponding to the vertical direction position coordinate,
the method for evaluating a semiconductor wafer further includes: the shape of the boundary between the main surface and the chamfer surface adjacent to the main surface is evaluated based on an index determined from a secondary differential curve obtained by the secondary differential.
In one aspect, the evaluation method may include:
determining the values of the X-axis of two points which are positioned on the curve of the peak area of the quadratic differential curve obtained by the quadratic differential and have the same value of the Y-axis;
determining a region between two points of the contour curve before the second differentiation, the region having the X-axis value equal to the determined value, as a circle fitting region;
fitting a circle to the contour shape of the circle fitting region to produce a circle; and
the size of the circle thus produced was used as the index.
The present inventors have conducted extensive studies and found newly that: the dimension of the circle is increased as the shape of the boundary between the chamfered surface and the main surface is more gentle; the steeper the shape of the boundary between the chamfered surface and the main surface, the smaller the size of the circle. Therefore, based on the size of the circle, the smoothness/steepness of the shape of the boundary portion between the main surface and the chamfered surface can be evaluated.
In one aspect, the evaluation method may include determining a size of the circle in each of a plurality of different portions of the semiconductor wafer to be evaluated, and the shape of the boundary portion may be evaluated using a representative value of the sizes of the plurality of circles determined in the plurality of different portions as an index.
In one mode, the representative value may be an average value of sizes of the plurality of circles.
In one aspect, the evaluation method may include: the X-axis value of two points located on the curve in the peak region of the quadratic differential curve obtained by the quadratic differential is specified, and the distance in the X-axis direction between the specified two points is used as the index. The present inventors have conducted extensive studies and found newly that: the more gradual the shape of the boundary portion between the chamfer surface and the main surface, the larger the value of the distance; the steeper the shape of the boundary between the chamfer and the main surface, the smaller the value of the distance. Therefore, based on the value of the distance, the smoothness/steepness of the shape of the boundary portion between the main surface and the chamfered surface can be evaluated.
In one aspect, the Y-axis value that determines the X-axis value of the two points may be: the Y-axis value is 0% at the position where the Y-axis value is 0%, 100% at the peak depth or peak height of the peak region, and 40-80% at the depth or height.
In one aspect, the evaluation method may include creating the profile curve using position coordinate information obtained by observing the semiconductor wafer to be evaluated with a microscope from above the one surface side.
In one aspect, the evaluation method may include performing the microscopic observation by a laser microscope.
Another embodiment of the present invention relates to a method for manufacturing a semiconductor wafer, including:
manufacturing a semiconductor wafer as an alternative to product shipment;
evaluating the candidate semiconductor wafer by the evaluation method; and
the semiconductor wafer judged as a non-defective product as a result of the evaluation is delivered for preparation for shipment as a product semiconductor wafer.
Another embodiment of the present invention relates to a method for manufacturing a semiconductor wafer, including:
manufacturing a semiconductor wafer lot including a plurality of semiconductor wafers;
extracting at least one semiconductor wafer from the semiconductor wafer lot;
evaluating the extracted semiconductor wafer by the evaluation method; and
semiconductor wafers of the same semiconductor wafer lot as the semiconductor wafer judged as non-defective as a result of the above evaluation are delivered for preparation for shipment as product semiconductor wafers.
Another embodiment of the present invention relates to a method for manufacturing a semiconductor wafer, including:
manufacturing a semiconductor wafer for evaluation under test manufacturing conditions;
evaluating the manufactured semiconductor wafer for evaluation by the evaluation method;
determining, based on a result of the evaluation, a manufacturing condition in which the test manufacturing condition is changed as an actual manufacturing condition, or determining the test manufacturing condition as the actual manufacturing condition; and
the semiconductor wafer is manufactured under the actual manufacturing conditions determined above.
In one embodiment, the manufacturing condition to which the change is applied is at least one of a polishing condition and a chamfering condition of the surface of the semiconductor wafer.
ADVANTAGEOUS EFFECTS OF INVENTION
According to one aspect of the present invention, a new method for evaluating the shape of the boundary portion between the chamfered surface and the main surface of the semiconductor wafer can be provided.
Drawings
Fig. 1 is an example of a profile curve including a curve portion showing a cross-sectional profile of a region from an outer peripheral edge portion of a main surface on a front surface side of a semiconductor wafer to the main surface side portion of the outer peripheral edge portion.
Fig. 2 is a second order differential curve created by second order differentiating the profile curve shown in fig. 1.
Fig. 3 is an explanatory diagram of a step of determining a circle fitting region.
Fig. 4 is an explanatory diagram of a step of determining a circle fitting region.
Fig. 5 shows an example of a circle formed on the contour curve shown in fig. 1.
Fig. 6 shows a graph in which the diameters (arithmetic mean) of the circles obtained for the various semiconductor wafers in the example are plotted against a reference value.
Fig. 7 is a graph in which the radius of a circle obtained for each semiconductor wafer in the example is plotted against the value of the distance in the X-axis direction between two points having the same value on the Y-axis on the curve located in the peak region of the quadratic differential curve.
Fig. 8 shows a binarized image (an image obtained by binarizing a wafer after 10-fold enlargement in the thickness direction of the wafer only) obtained by an evaluation method for obtaining a reference value.
Fig. 9 shows an example of the evaluation result of the evaluation method for obtaining the reference value.
Detailed Description
[ evaluation method of semiconductor wafer ]
One aspect of the present invention relates to a method for evaluating a semiconductor wafer, including: creating a profile curve representing a cross-sectional profile of the semiconductor wafer to be evaluated in a thickness direction; and performing second differentiation on the profile curve; the semiconductor wafer to be evaluated is a semiconductor wafer having a chamfered surface formed at a peripheral edge portion thereof, the profile curve including a curve portion indicating a cross-sectional profile of a region from an outer peripheral edge portion of a main surface on one surface side of the semiconductor wafer to the main surface side portion of the peripheral edge portion, the curve portion corresponding to a horizontal direction position coordinate, and a Y axis value corresponding to a vertical direction position coordinate, the semiconductor wafer to be evaluated further including: the shape of the boundary between the main surface and the chamfer surface adjacent to the main surface is evaluated based on an index determined from a secondary differential curve obtained by the secondary differential.
The above evaluation method will be described in further detail below.
< semiconductor wafer to be evaluated >
The semiconductor wafer to be evaluated by the above-described evaluation method may be any semiconductor wafer as long as a chamfered surface is formed by chamfering the outer peripheral edge of the wafer. The semiconductor wafer to be evaluated may be various semiconductor wafers generally used as semiconductor substrates. For example, various silicon wafers can be cited as a specific example of the semiconductor wafer. The silicon wafer may be, for example, a silicon single crystal wafer cut out from a silicon single crystal ingot and subjected to various processes such as chamfering. Specific examples of the silicon single crystal wafer include a polished wafer having a polished surface on the surface thereof by polishing. The silicon wafer may be any of various silicon wafers such as an epitaxial wafer having an epitaxial layer on a silicon single crystal wafer, and an annealed wafer having a modified layer formed on a silicon single crystal wafer by annealing treatment.
Hereinafter, each step of the above-described evaluation method will be described with reference to the drawings. However, the embodiments shown in the drawings are examples, and the evaluation method is not limited to the embodiments shown in the drawings.
< preparation of Profile Curve >
The evaluation method includes creating a profile curve (generally, also referred to as a "cross-sectional profile") representing a cross-sectional profile of the semiconductor wafer to be evaluated in the thickness direction. The profile curve is a profile curve including a curve portion representing a cross-sectional profile of a region from an outer peripheral edge portion of a main surface on one surface side of the semiconductor wafer to be evaluated to the main surface side portion of the outer peripheral edge portion, the X-axis (horizontal axis) value of which corresponds to the horizontal direction position coordinate, and the Y-axis (vertical axis) value of which corresponds to the vertical direction position coordinate. Fig. 1 shows an example of such a profile curve. Fig. 1 is a profile curve including a curve portion showing a cross-sectional profile of a region from an outer peripheral edge portion of a main surface on a front surface side of a semiconductor wafer to the main surface side portion of the outer peripheral edge portion. The units of the values of the X axis and the Y axis are both μm (micrometers). The value of the X axis corresponds to the position coordinate of each position on the cross-sectional profile in the thickness direction of the semiconductor wafer in the horizontal direction, that is, in the direction parallel to the main surface, and the value of the Y axis corresponds to the position coordinate of each position on the cross-sectional profile in the thickness direction of the semiconductor wafer in the vertical direction, that is, in the thickness direction. In fig. 1, although noise appears in a region having an X-axis value of about 230 or more, the region corresponds to a region separated from the boundary portion on the cross-sectional profile and does not affect the evaluation of the shape of the boundary portion.
The profile curve can be created using various evaluation apparatuses capable of creating a profile curve representing a cross-sectional profile of a boundary portion including a shape of a semiconductor wafer to be evaluated. In one embodiment, the generation of the profile curve can be performed by a so-called nondestructive method without cutting out a sample from the semiconductor wafer to be evaluated, and in another embodiment, the generation of the profile curve can be performed by cutting out a sample (for example, cleaving) from the semiconductor wafer to be evaluated and exposing a cross section (so-called destructive method). From the viewpoint of ease of evaluation, the contour curve is preferably created by a nondestructive method. In addition, from the viewpoint of ease of evaluating the shape of the boundary portion in a plurality of different portions of the semiconductor wafer to be evaluated, the contour curve is also preferably created by a nondestructive method.
In order to create a profile curve by a nondestructive method, it is preferable to use various microscopes that can acquire positional coordinate information of each position on a cross-sectional profile of a semiconductor wafer in a thickness direction by observing the semiconductor wafer to be evaluated from above on one surface side. Examples of such a microscope include a laser microscope, a white interference microscope, and the like, and a Scanning Probe Microscope (SPM) such as a Scanning Tunneling Microscope (STM) and an Atomic Force Microscope (AFM), and from the viewpoint of resolution and the like, a laser microscope and a white interference microscope are preferable, and a laser microscope is more preferable.
< preparation of Secondary differential Curve >
After the contour curve is created, a second order differential curve is created by performing a second order differential on the created contour curve. Fig. 2 is a second order differential curve created by second order differentiating the profile curve shown in fig. 1. The second differentiation can be performed by a known method using commercially available analysis software or the like.
When the cross-sectional shape of the semiconductor wafer in the thickness direction is observed, the shape greatly changes at the boundary between the main surface and the chamfered surface adjacent to the main surface. On a profile curve representing a cross-sectional profile of the semiconductor wafer in the thickness direction, an inflection region where a coordinate change in the Y-axis direction is large with respect to a coordinate change in the X-axis direction is a region corresponding to the boundary portion. In one aspect of the above evaluation method, the degree of change in shape of the inflection point region can be expressed as a numerical value as a size of a circle created as follows.
< determination of circle fitting region >
Fig. 3 and 4 are explanatory diagrams of the steps of determining the circle fitting region.
Fig. 3 is a diagram in which an ellipse and a broken line for explanation are added to the quadratic differential curve shown in fig. 2. The portion surrounded by the ellipse is a peak region. In the peak region, two points located on the same value of the Y axis on the curve are two points of intersection with the broken line on the curve of the peak region. According to the study of the present inventors, from the viewpoint of further improving the accuracy of the evaluation by the size of the circle, the Y-axis value that determines the X-axis value of the two points is: the peak depth is defined as 100% when the peak region has a valley-shaped peak shape, preferably the peak height is defined as 100% when the peak region has a peak shape, more preferably the Y-axis value at a position of depth or height of 40 to 80%, even more preferably the Y-axis value at a position of 50 to 70%, even more preferably the Y-axis value at a position of 55 to 65%, and most preferably the Y-axis value at a position of 60%. The number of peak regions present in the quadratic differential curve may be one, or two or more. In the case where a plurality of peak regions exist on the quadratic differential curve, the deepest peak depth among the peak regions of a plurality of valley types may be regarded as 100%. For a plurality of peak regions of the mountain shape, the highest peak height in these peak regions may be taken as 100%. Further, two points that are farthest from each other in the plurality of peak regions may be used as the X-axis value that is the two points having the same Y-axis value. For example, when two peak regions (a first peak region and a second peak region) exist on the second order differential curve, the X-axis value having the same Y-axis value includes four points in total of two points (X1 and X2) in the first peak region and two points (X3 and X4) in the second peak region. Here, the X-axis has a value of X1< X2< X3< X4. In this case, the values of the X axis as two points having the same value of the Y axis used for determining the circle fitting region may adopt X1 and X4 as the farthest two points.
In one aspect of the above evaluation method, the shape of the boundary portion may be evaluated using, as an index, the distance in the X axis direction between two points determined by the circle fitting. For example, the distance may be a distance in the X axis direction between two points at the intersection with the broken line on the curve of the peak region surrounded by the ellipse in fig. 3. In the above aspect, the Y-axis value that determines the X-axis value of the two points is: the peak depth is defined as 100% when the peak region has a valley-shaped peak shape, preferably the peak height is defined as 100% when the peak region has a peak shape, more preferably the Y-axis value at a position of depth or height of 40 to 80%, even more preferably the Y-axis value at a position of 50 to 70%, even more preferably the Y-axis value at a position of 55 to 65%, and most preferably the Y-axis value at a position of 60%.
In fig. 4, the upper graph is the profile curve shown in fig. 1, and the lower graph is the second order differential curve shown in fig. 2, and in the lower graph, a broken line is given for explanation as shown in fig. 3. The dotted line in fig. 4 indicates the position where the X-axis value is the same in the upper and lower graphs. Also, in fig. 4, a circle fitting region is shown on the curve of the peak region of the above-described quadratic differential curve by determining two points (intersection points of the two chain lines with the profile curve, respectively) on the above-described profile curve, the two points having the same X-axis values as the two points determined in the manner shown in fig. 3. In addition, although only one-dot chain lines are shown in fig. 4 for the sake of explanation, two points on the contour curve may be specified as two points having the same X-axis value as the X-axis value of the two points specified in the quadratic differential curve.
< preparation of round >
If the circle fitting region is determined in the above manner, a circle is fitted to the contour shape (curve shape) of the circle fitting region to make a circle. The fitting can be performed by a known method such as using commercially available analysis software. Fig. 5 shows an example of a circle formed on the contour curve shown in fig. 1. The units of the X-axis and the Y-axis of fig. 1 are μm (micrometers), and thus the size of the circle can be expressed in units of μm (micrometers).
< evaluation of shape of boundary portion >
In one aspect, the shape evaluation of the boundary portion may be performed based on the size of the circle. Specifically, the smaller the size of the circle, the steeper the shape of the boundary portion can be determined; the larger the size of the circle, the gentler the shape of the boundary portion can be determined. The shape of the boundary portion can be evaluated using the size of the circle in the above-described manner, and the evaluation can be objectively performed based on the numerical value, so that the evaluation is preferable from the viewpoint of reliability of the evaluation. In addition, from the viewpoint of easy comparison with the evaluation results in the past, it is also preferable that evaluation can be performed based on a numerical value such as the size of a circle.
The size of the circle may be, for example, the diameter or radius of the circle at a certain portion of the semiconductor wafer to be evaluated. Alternatively, the evaluation method may include determining the size of the circle at each of a plurality of different portions of the semiconductor wafer to be evaluated. The shape of the boundary portion can be evaluated using, as an indicator, representative values of the sizes of a plurality of circles obtained at a plurality of different positions. For example, the representative value may be an average (e.g., arithmetic average), a minimum, a maximum, or the like of the diameters or radii of a plurality of circles.
In one embodiment, the shape of the boundary portion may be evaluated using the distance in the X axis direction between the two points determined as described above as an index without performing circle fitting. Specifically, the shape of the boundary portion can be determined to be steeper as the value of the distance is smaller, and the shape of the boundary portion can be determined to be gentler as the value of the distance is larger. The shape of the boundary portion that can be evaluated using the value of the distance in the above-described manner can be objectively evaluated based on the numerical value, and therefore is preferable from the viewpoint of reliability of evaluation. Further, from the viewpoint of easy comparison with the evaluation results in the past, it is also preferable that evaluation can be performed based on numerical values in the above manner.
The value of the distance may be, for example, a value of the distance obtained in the above-described manner at a certain portion of the semiconductor wafer to be evaluated. Alternatively, the evaluation method may include determining the distances at a plurality of different portions of the semiconductor wafer to be evaluated. The shape of the boundary portion can be evaluated using, as an indicator, a representative value of the values of the distances thus obtained at a plurality of different portions. For example, the representative value may be an average (e.g., arithmetic mean), a minimum, a maximum, or the like of values of a plurality of distances.
As described above, according to the above evaluation method, the shape of the boundary portion between the main surface and the chamfered surface adjacent to the main surface can be evaluated on the wafer front surface (front surface or back surface) of the semiconductor wafer.
[ method for producing semiconductor wafer ]
A method for manufacturing a semiconductor wafer according to an aspect of the present invention (a first manufacturing method) includes:
manufacturing a semiconductor wafer as an alternative to product shipment;
evaluating the candidate semiconductor wafer by the evaluation method; and
the semiconductor wafer judged as a non-defective product as a result of the evaluation is delivered for preparation for shipment as a product semiconductor wafer.
A method for manufacturing a semiconductor wafer according to another aspect of the present invention (second manufacturing method) includes:
manufacturing a semiconductor wafer lot including a plurality of semiconductor wafers;
extracting at least one semiconductor wafer from the semiconductor wafer lot;
evaluating the extracted semiconductor wafer by the evaluation method; and the number of the first and second groups,
semiconductor wafers of the same semiconductor wafer lot as the semiconductor wafer judged as non-defective as a result of the above evaluation are delivered for preparation for shipment as product semiconductor wafers.
A method for manufacturing a semiconductor wafer according to another aspect of the present invention (third manufacturing method) includes:
manufacturing a semiconductor wafer for evaluation under test manufacturing conditions;
evaluating the manufactured semiconductor wafer for evaluation by the evaluation method;
determining, based on a result of the evaluation, a manufacturing condition in which the test manufacturing condition is changed as an actual manufacturing condition, or determining the test manufacturing condition as the actual manufacturing condition; and
the semiconductor wafer is manufactured under the actual manufacturing conditions determined above.
The first manufacturing method performs the evaluation of the above-described evaluation method as so-called pre-factory inspection. In the second manufacturing method, the semiconductor wafers of the same lot as the semiconductor wafers judged as non-defective products as a result of the so-called sampling inspection are delivered to be ready for shipment as product semiconductor wafers. In the third manufacturing method, the semiconductor wafer manufactured under the test manufacturing conditions is evaluated, and the actual manufacturing conditions are determined based on the evaluation result. In any of the first manufacturing method, the second manufacturing method, and the third manufacturing method, the evaluation of the semiconductor wafer is performed by the evaluation method according to one embodiment of the present invention described above.
< first production method >
In the first manufacturing method, the manufacturing of a semiconductor wafer lot that is an alternative for product shipment can be performed in the same manner as in a general manufacturing method of semiconductor wafers. For example, a polished wafer, which is one mode of a silicon wafer, can be manufactured by a manufacturing process including: silicon wafers are cut (sliced) from a silicon single crystal ingot grown by the czochralski method (CZ method) or the like, chamfered, rough ground (e.g., polished), etched, mirror ground (finish ground), and cleaned between the above-described machining steps or after the machining step. Further, the annealed wafer can be manufactured by subjecting the polished wafer manufactured in the above-described manner to an annealing treatment. The epitaxial wafer can be produced by vapor-phase growth (epitaxial growth) of an epitaxial layer on the surface of the polished wafer produced in the above-described manner.
The shape of the boundary between the main surface and the chamfered surface adjacent to the main surface of the manufactured semiconductor wafer is evaluated by the evaluation method according to one aspect of the present invention. Details of the evaluation method are as described above. And the semiconductor wafer judged as a non-defective product as a result of the evaluation is delivered for preparation for shipment as a product semiconductor wafer. The criterion for determining a non-defective product may be determined according to the quality required for the production semiconductor wafer. For example, in one aspect, the required circle size or the distance in the X axis direction between the two previously described points is equal to or greater than a certain value (i.e., equal to or greater than a threshold value) as a criterion for determining a non-defective product. The size of the circle or the value of the distance may be a representative value (for example, an average value (for example, an arithmetic average), a minimum value, a maximum value, or the like) of the sizes of a plurality of circles or the values of a plurality of distances obtained by evaluation in different portions of the same semiconductor wafer. This also applies to the second manufacturing method and the third manufacturing method. Examples of the preparation for shipping the product semiconductor wafer include packaging. Thus, according to the first manufacturing method, the semiconductor wafer having the boundary portion between the main surface and the chamfered surface in the shape desired for the product semiconductor wafer can be stably supplied to the market.
< second production method >
The semiconductor wafer lot in the second manufacturing method can be manufactured in the same manner as in the general manufacturing method of semiconductor wafers, for example, as described above with respect to the first manufacturing method. The total number of semiconductor wafers included in a semiconductor wafer lot is not particularly limited. The number of semiconductor wafers extracted from a manufactured semiconductor wafer lot and delivered to a so-called sampling inspection is at least one, and may be two or more, and the number is not particularly limited.
A semiconductor wafer extracted from a semiconductor wafer lot is evaluated for the shape of a boundary between a main surface and a chamfered surface adjacent to the main surface by an evaluation method according to one aspect of the present invention. Details of the evaluation method are as described above. The semiconductor wafers of the same lot as the semiconductor wafer judged as non-defective as a result of the evaluation are delivered for preparation for shipment as product semiconductor wafers. The criterion for determining a non-defective product may be determined according to the quality required for the production semiconductor wafer. For example, in one aspect, the required circle size or the distance in the X axis direction between the two previously described points is equal to or greater than a certain value (i.e., equal to or greater than a threshold value) as a criterion for determining a non-defective product. The preparation for shipment as a product semiconductor wafer is, for example, as described above for the first manufacturing method. According to the second manufacturing method, the semiconductor wafer having the boundary portion between the main surface and the chamfered surface in the shape desired for the product semiconductor wafer can be stably supplied to the market. In addition, since the evaluation method according to one aspect of the present invention can perform nondestructive evaluation, in one aspect of the second manufacturing method, the semiconductor wafer that is extracted from the semiconductor wafer lot and delivered for evaluation can be delivered for preparation for shipment as a product semiconductor wafer as long as it is determined as a non-defective product as a result of the evaluation, and can be delivered for shipment as a product semiconductor wafer after the preparation.
< third production method >
In the third manufacturing method, various conditions in various steps for manufacturing a semiconductor wafer can be cited as the test manufacturing conditions and the actual manufacturing conditions. The various steps for manufacturing the semiconductor wafer are as described in the first manufacturing method. The "actual manufacturing conditions" refer to manufacturing conditions of the product semiconductor wafer.
In the third manufacturing method, as a preceding stage for determining actual manufacturing conditions, test manufacturing conditions are set, and semiconductor wafers for evaluation are manufactured under the test manufacturing conditions. The shape of the boundary between the main surface and the chamfered surface adjacent to the main surface of the manufactured semiconductor wafer is evaluated by the evaluation method according to one aspect of the present invention. Details of the evaluation method are as described above. The number of the evaluation semiconductor wafers is not particularly limited, and may be at least one or two or more. If the shape of the boundary portion of the semiconductor wafer for evaluation is the desired shape of the product semiconductor wafer as a result of the evaluation, the product semiconductor wafer is manufactured and shipped using the test manufacturing conditions as actual manufacturing conditions, whereby the product semiconductor wafer having the boundary portion in the desired shape can be stably supplied to the market. On the other hand, if the shape of the boundary portion of the semiconductor wafer for evaluation is different from the desired shape of the product semiconductor wafer as a result of the evaluation, the manufacturing conditions in which the test manufacturing conditions are changed are determined as actual manufacturing conditions. The manufacturing conditions to be changed are preferably manufacturing conditions that take into account the influence on the shape of the boundary portion. As an example of such manufacturing conditions, polishing conditions for the front surface (front surface and/or back surface) of the semiconductor wafer can be cited. Specific examples of the polishing conditions include rough polishing conditions and mirror polishing conditions, and more specifically, include the type of polishing liquid, the abrasive grain concentration of the polishing liquid, and the type of polishing pad (e.g., hardness). Further, as an example of the manufacturing conditions, chamfering conditions may be mentioned, specifically, machining conditions such as grinding and polishing in chamfering, and more specifically, the type of a polishing tape used for chamfering. By determining the manufacturing conditions in which the test manufacturing conditions are changed as described above as actual manufacturing conditions and manufacturing and shipping product semiconductor wafers under the actual manufacturing conditions, the product semiconductor wafers having the boundary portion in the desired shape can be stably supplied to the market. Further, the evaluation of the semiconductor wafer for evaluation may be performed by the evaluation method according to one embodiment of the present invention by newly manufacturing the semiconductor wafer for evaluation under the manufacturing conditions in which the test manufacturing conditions are changed, or it may be determined whether the manufacturing conditions are actually changed or further changed by repeating the evaluation once or twice or more.
In the third manufacturing method described above, the method for determining whether or not the shape of the boundary portion of the semiconductor wafer for evaluation is the desired shape of the product semiconductor wafer may refer to the description related to the determination of the non-defective product in the first manufacturing method and the second manufacturing method described above.
Other details of the first manufacturing method, the second manufacturing method, and the third manufacturing method can also apply the known technology related to the manufacturing method of the semiconductor wafer.
[ examples ]
The present invention will be further described below based on examples. However, the present invention is not limited to the embodiment shown in the examples.
1. Evaluation of semiconductor wafers
(1) Production of profile curves
Four kinds of semiconductor wafers (silicon single crystal wafers (polished wafers) having a surface of 300mm in diameter and a (100) plane) were prepared, the polishing conditions of the wafer surface being different from the chamfering conditions. When these semiconductor wafers were observed from the front side with a laser microscope (VK-X200, manufactured by keyence corporation), the cut-out was set to 0 °, and the contour curve of the curved portion including the cross-sectional contour of the region from the outer peripheral edge portion of the front main surface to the main surface side portion of the outer peripheral edge portion was obtained at each of the left turns of 45 °, 90 °, 135 °, 180 °, 225 °, 270 °, and 315 °.
(2) Determination of circle fitting area and circle making
The profile curve is subjected to second differentiation using analysis software to obtain a second differentiation curve. In the peak region (valley type) of the obtained quadratic differential curve, the position at which the Y-axis value is 0 is defined as 0%, the peak depth is defined as 100%, and the X-axis values of two points having the same Y-axis value at the position at which the depth is 60% are determined.
Two points having the thus determined value of the X axis are determined on the contour curve, and the region between the two points is determined as a circle fitting region.
Next, a circle is created by fitting the circle to the contour shape (curve shape) of the circle fitting region thus determined, and the diameter of the created circle is determined. Table 1 shows the arithmetic mean of the diameters of the circles obtained at the respective portions for the above four semiconductor wafers (hereinafter referred to as "wafer 1", "wafer 2", "wafer 3", and "wafer 4").
[ Table 1]
2. Description of evaluation method for obtaining reference value
The size of the circle obtained by the evaluation method according to one aspect of the present invention is a value that can be an index of the shape of the boundary portion, and can be confirmed, for example, as follows: the reference value obtained by the following evaluation method showed a good correlation with the size of the circle obtained by the evaluation method of one embodiment of the present invention.
First, a cross-sectional image including a boundary portion to be evaluated is obtained for a semiconductor wafer. The cross-sectional image can be obtained by, for example, capturing a cross section exposed by cleaving the semiconductor wafer at the cleavage plane with a microscope.
An enlarged image is produced in which the acquired cross-sectional image is enlarged only in the thickness direction of the wafer. By enlarging only in the wafer thickness direction, the shape of the boundary portion can be emphasized with respect to the main surface (so-called horizontal plane) in the outline of the cross-sectional shape, and therefore, the smoothness/steepness of the boundary portion can be evaluated with higher accuracy by using an enlarged image than by using a non-enlarged cross-sectional image. Further, since the contour of the cross-sectional shape can be displayed more clearly by performing binarization processing on the enlarged image, the degree of smoothness/steepness of the boundary portion can be evaluated with higher accuracy.
In the binarized image thus obtained, the contour of the wafer cross-sectional shape is generally curved at the boundary between the main surface and the chamfer surface. Therefore, a circle having an arc shape that approximates or matches the shape of the curve is fitted to the contour of the curve at the boundary between the main surface and the chamfered surface. The larger the size, for example, the diameter or the radius, of the circle (circle of curvature) obtained in this way, the gentler the shape of the boundary portion can be determined, and the steeper the shape of the boundary portion can be determined as the size of the circle is smaller. As an example, fig. 9 shows the binarized images obtained by the above-described method (images obtained by performing the binarization process after enlarging the wafer thickness direction by 10 times) for two different types of semiconductor wafers. Fig. 9 also shows a circle having a circular arc that substantially matches the shape of the curve of the boundary portion. The values shown in the circles are the diameters of the circles. In fig. 9, if the cross-sectional shapes of sample 1 and sample 2 are compared, the shape of the boundary portion of sample 2 is gentler than the shape of the boundary portion of sample 1. Regarding the size of the circle, if sample 1 is compared with sample 2, the diameter of the circle obtained for sample 2 is larger than that of sample 1. As described above, the size of the circle obtained by the evaluation method for obtaining the reference value is correlated with the shape of the boundary portion.
3. Reference value acquisition
The four types of semiconductor wafers evaluated in the above item 1 were cleaved on the (110) plane to prepare samples for cross-section observation.
The brightness and contrast of the prepared cross-section observation sample were adjusted by using a differential interference microscope, and a cross-section image (imaging magnification: 500 times) including the boundary portion evaluated in the above 3 was obtained.
The obtained cross-sectional image was taken into image processing software (Adobe corporation, software name Photoshop CS5), and subjected to binarization processing after being enlarged by 10 times only in the thickness direction of the wafer.
The binarized image obtained by the binarization processing is captured in software (PowerPoint software, manufactured by microsoft corporation), and a circle in which the shape of the curve of the boundary portion and the shape of the arc substantially match each other is drawn on the outline of the cross-sectional shape using a graphic drawing tool of the same software. The shape of the curve was visually judged to be substantially identical to the shape of the arc. Fig. 8 shows a binarized image (an image obtained by performing binarization processing after enlarging the wafer thickness by 10 times) obtained by the above-described method. Fig. 8 also shows a circle having a circular arc that substantially matches the shape of the curve of the boundary portion. In fig. 8, the numerical values shown in the circles are the diameters (unit: arbitrary unit) of the circles, and these values are taken as reference values.
4. Evaluation results
Fig. 6 shows a graph in which the diameters (arithmetic mean) of the circles obtained in the above 1 are plotted against the reference values obtained in the above 3 for each of the above four semiconductor wafers. Fig. 6 also shows an approximate straight line obtained by the least square method for the four plotted points. Two times R of approximately linear correlation coefficient2Exceeding 0.99 shows very good correlation. From this result, it was shown that the size of the circle obtained in the above 1 can be used as an index for evaluating the shape of the boundary portion. Based on the evaluation based on the numerical value such as the size of the circle, for example, the threshold value (the size of the circle) that can be determined as a non-defective product is determined from the past experience, and therefore, the non-defective product determination can be easily performed.
The size of the circle obtained in the above manner can be used for pre-factory inspection as described above, can be used for sampling inspection from a lot, and can also be used for determining actual manufacturing conditions of semiconductor wafers.
5. Study of circle fitting region
(1) Production of profile curves
An epitaxial wafer having a diameter of 300mm was prepared, and the opposite side of the notch was observed with a laser microscope (VK-X200, manufactured by keyence corporation) from the front side under a microscope to obtain a profile curve including a curved line portion indicating a cross-sectional profile of a region from a peripheral edge portion side portion of the front main surface to the peripheral edge portion of the main surface.
The above operation was performed 10 times.
(2) Determination of circle fitting area and circle making
The profile curves obtained by the above 10 operations were subjected to secondary differentiation using analysis software to obtain secondary differential curves. In the peak region (valley type) of the obtained quadratic differential curve, the position at which the Y-axis value is 0 is defined as 0%, the peak depth is defined as 100%, the X-axis values of two points having the same Y-axis value at positions at depths of 40%, 50%, 60%, 70%, and 80% are determined, and a circle is fitted using the region between these two points as a circle fitting region. Table 2 shows the radius of the circle thus produced.
[ Table 2]
As described above, the Y-axis value that determines the X-axis values of the two points is: the position where the Y-axis value is 0 is defined as 0%, the peak depth or peak height of the peak region is defined as 100%, and the Y-axis value at the position where the depth or height is preferably 40 to 80%. Since the smaller the value of the standard deviation obtained in the above manner, the more preferable from the viewpoint of improving the evaluation accuracy of the circle size, it can be seen from the values of the standard deviation shown in table 2 that the Y-axis value that specifies the X-axis value of the two points is: the Y-axis value is preferably about 60% (e.g., 55 to 65%), and more preferably 60%, with the position of the Y-axis value being 0%, the peak depth or peak height of the peak region being 100%, and the depth or height being more preferably 50 to 70%.
Fig. 7 is a graph as follows: for a plurality of semiconductor wafers (silicon single crystal wafers (polished wafers) having a surface of (100) plane with a diameter of 300 mm) and having wafer surfaces of different polishing conditions and chamfering conditions, a circle obtained in the same manner as described above and between two points having the same radius of the circle and the same value of the Y axis on a curve located in the peak region of a quadratic differential curve determined for making the circle by circle fitting is shownThe relationship between the values of the distances in the X-axis direction. In the peak region (valley type) of the obtained quadratic differential curve, the position at which the Y-axis value is 0 is defined as 0%, the peak depth is defined as 100%, and the X-axis values of two points having the same Y-axis value at the position at depth of 60% are determined. Fig. 7 also shows approximate straight lines obtained by the least square method for the various plotted points. Two times R of approximately linear correlation coefficient2Exceeding 0.7 shows good correlation. As described above, the size of the circle can be an index for evaluating the shape of the boundary portion. Since the size of the circle and the value of the distance show a good correlation, it can be confirmed that the value of the distance can also be an index for evaluating the shape of the boundary portion.
Industrial applicability
The present invention is useful in the field of manufacturing various semiconductor wafers such as silicon wafers.
Claims (12)
1. A method for evaluating a semiconductor wafer, comprising:
creating a profile curve representing a cross-sectional profile of the semiconductor wafer to be evaluated in a thickness direction; and
performing second differentiation on the profile curve;
the semiconductor wafer to be evaluated is a semiconductor wafer having a chamfered surface formed at the outer peripheral edge portion of the wafer,
the profile curve includes a curved portion representing: a cross-sectional profile of a region from an outer peripheral edge portion of a main surface on one surface side of the semiconductor wafer to be evaluated to a main surface side portion of the outer peripheral edge portion, the X-axis value corresponding to a horizontal direction position coordinate and the Y-axis value corresponding to a vertical direction position coordinate;
the method of evaluating a semiconductor wafer further includes evaluating a shape of a boundary portion between the main surface and a chamfer surface adjacent to the main surface based on an index determined from a secondary differential curve obtained by the secondary differential.
2. The method of evaluating a semiconductor wafer according to claim 1, comprising:
determining the values of the X-axis of two points which are positioned on the curve of the peak area of the quadratic differential curve obtained by the quadratic differential and have the same value of the Y-axis;
determining, as a circle fitting region, a region between two points of the profile curve before the second differentiation, the region having the X-axis value as the determined value;
fitting a circle to the contour shape of the circle fitting region to make a circle; and
the size of the manufactured circle is used as the index.
3. The method for evaluating a semiconductor wafer according to claim 2,
comprises determining the size of the circle in a plurality of different parts of a semiconductor wafer to be evaluated,
the shape of the boundary between the main surface and the chamfered surface adjacent to the main surface is evaluated using, as an index, representative values of the sizes of the plurality of circles obtained at the plurality of different portions.
4. The method of evaluating a semiconductor wafer according to claim 3, wherein the representative value is an average value of sizes of the plurality of circles.
5. The method for evaluating a semiconductor wafer according to claim 1,
the method includes determining the X-axis value of two points having the same Y-axis value on a curve in the peak region of a quadratic differential curve obtained by the quadratic differential, and using the distance in the X-axis direction between the determined two points as the index.
6. The method for evaluating a semiconductor wafer according to any one of claims 2 to 5, wherein a value of a Y axis which determines a value of an X axis of the two points is: and setting the position of the Y-axis value as 0 percent, setting the peak depth or peak height of the peak area as 100 percent, and setting the position of the Y-axis value at the position of the depth or height of 40-80 percent.
7. The method according to any one of claims 1 to 6, comprising creating the profile curve using positional coordinate information obtained by microscopic observation of the semiconductor wafer to be evaluated from above the one surface side.
8. The method of evaluating a semiconductor wafer according to claim 7, comprising performing the microscopic observation by a laser microscope.
9. A method of manufacturing a semiconductor wafer, comprising:
manufacturing a semiconductor wafer as an alternative to product shipment;
evaluating the candidate semiconductor wafer by the evaluation method according to any one of claims 1 to 8; and
the semiconductor wafer judged as a non-defective product as a result of the evaluation is delivered for preparation for shipment as a product semiconductor wafer.
10. A method of manufacturing a semiconductor wafer, comprising:
manufacturing a semiconductor wafer lot including a plurality of semiconductor wafers;
extracting at least one semiconductor wafer from the semiconductor wafer lot;
evaluating the extracted semiconductor wafer by the evaluation method according to any one of claims 1 to 8; and
semiconductor wafers of the same semiconductor wafer lot as the semiconductor wafer judged as non-defective as a result of the evaluation are delivered for preparation for shipment as product semiconductor wafers.
11. A method of manufacturing a semiconductor wafer, comprising:
manufacturing a semiconductor wafer for evaluation under test manufacturing conditions;
evaluating the manufactured semiconductor wafer for evaluation by the evaluation method according to any one of claims 1 to 8;
determining, as an actual manufacturing condition, a manufacturing condition in which the test manufacturing condition is changed, or determining the test manufacturing condition as the actual manufacturing condition, based on a result of the evaluation; and the number of the first and second groups,
and manufacturing the semiconductor wafer under the determined actual manufacturing conditions.
12. The method of manufacturing a semiconductor wafer according to claim 1, wherein the manufacturing condition to which the change is applied is at least one of a polishing treatment condition and a chamfering treatment condition of the surface of the semiconductor wafer.
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