CN112019045A - Fixed open-time controller and buck converter device using the same - Google Patents

Fixed open-time controller and buck converter device using the same Download PDF

Info

Publication number
CN112019045A
CN112019045A CN201910459153.5A CN201910459153A CN112019045A CN 112019045 A CN112019045 A CN 112019045A CN 201910459153 A CN201910459153 A CN 201910459153A CN 112019045 A CN112019045 A CN 112019045A
Authority
CN
China
Prior art keywords
voltage
current
circuit
open
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201910459153.5A
Other languages
Chinese (zh)
Other versions
CN112019045B (en
Inventor
何仪修
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Elite Semiconductor Memory Technology Inc
Original Assignee
Elite Semiconductor Memory Technology Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Elite Semiconductor Memory Technology Inc filed Critical Elite Semiconductor Memory Technology Inc
Priority to CN201910459153.5A priority Critical patent/CN112019045B/en
Publication of CN112019045A publication Critical patent/CN112019045A/en
Application granted granted Critical
Publication of CN112019045B publication Critical patent/CN112019045B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/02Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/44Circuits or arrangements for compensating for electromagnetic interference in converters or inverters

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Dc-Dc Converters (AREA)

Abstract

A fixed open-time controller has a voltage divider, a current ripple extractor, a single-open-circuit timer, a comparator and a flip-flop. The voltage divider generates a feedback voltage according to the regulator output voltage. The current ripple extractor senses the current in the energy storage inductor of the buck converter, which flows through the equivalent series resistance of the output capacitor, and accordingly generates an extracted ripple current without a dc component. The single-shot open-circuit timer outputs a fixed open-circuit time control signal according to the buck converter input voltage and the regulator output voltage. The modulation circuit outputs a modulation signal according to the reference voltage signal, the feedback voltage and the extracted ripple current. The flip-flop generates a control signal to the buck converter according to the modulation signal and the fixed open-circuit time control signal. The turn-off time of the buck converter is determined according to the modulation signal.

Description

Fixed open-time controller and buck converter device using the same
Technical Field
The present invention relates to a buck converter, and more particularly, to a constant on-time controller for a buck converter device.
Background
A fixed open-time controller may be used in a buck converter device that may use the regulator output voltage ripple to initiate an open-time whenever the regulator output voltage falls below a reference voltage. The open time may be terminated (generating an open time pulse) by the circuit reacting to other conditions, such as the level of the regulator input voltage. During the open-time pulses, energy is supplied directly from the regulator input voltage to the regulator output voltage via the electronic switching device. Similarly, when the open-time pulse has been terminated, the energy stored in the energy storage inductor will be supplied to the regulator output voltage.
Buck converter devices with fixed open-time controllers typically include circuitry that adjusts the open-time pulse interval as a function of the regulator input voltage and the regulator output voltage, so that an almost fixed frequency is still obtained as the duty cycle changes. The ripple of the regulator's output voltage is determined to a large extent by the ripple current in the energy storage inductor through the Equivalent Series Resistance (ESR) of the output capacitor. In some applications, a multilayer ceramic capacitor (ESR) has a small ESR, so that the voltage ripple from the energy storage inductor is also small. This causes two problems for the fixed open time controller, stability and noise susceptibility to noise.
Disclosure of Invention
It is an object of the present invention to provide a fixed open-time controller for a buck converter device to extend the noise margin (noise margin) of the fixed open-time controller.
It is another object of the present invention to provide a fixed open-time controller for a buck converter device to minimize the noise susceptibility (susceptability) of the fixed open-time controller to noise, so that the jitter of the signal can be greatly reduced.
It is another object of the present invention to provide a buck converter device including a buck converter fixed open time controller, which is electrically connected to the buck converter, so as to solve the problems of stability and noise susceptibility to noise.
To achieve at least one of the above objectives, the present invention provides a fixed open-time controller, which comprises a voltage divider, a current ripple extractor, a single-open-circuit timer, a comparator and a flip-flop. The voltage divider generates a feedback voltage according to the regulator output voltage. The current ripple extractor senses the current in the energy storage inductor of the buck converter, which flows through the equivalent series resistance of the output capacitor, and accordingly generates an extracted ripple current without a dc component. The single-shot open-circuit timer outputs a fixed open-circuit time control signal according to the buck converter input voltage and the regulator output voltage. The modulation circuit outputs a modulation signal according to the reference voltage signal, the feedback voltage and the extracted ripple current. The flip-flop generates a control signal to the buck converter according to the modulation signal and the fixed open-circuit time control signal. The turn-off time of the buck converter is determined according to the modulation signal.
To achieve at least one of the above objectives, the present invention provides a buck converter device, which includes a buck converter and a fixed open-time controller electrically connected to the buck converter.
In an embodiment of the invention, the flip-flop is a reset-set (RS) flip-flop, a set end of the RS flip-flop is electrically connected to the comparator and the single-shot open-circuit timer to receive the comparison result signal and an inverted signal of the fixed open-circuit time control signal, and a reset end of the RS flip-flop is electrically connected to the single-shot open-circuit timer to receive the fixed open-circuit time control signal.
In one embodiment of the present invention, the one-shot open-circuit timer comprises a capacitor, a current source and a voltage comparator. The current source is electrically connected to the ground through the capacitor and is used for generating a current proportional to the input voltage of the regulator, so that a first voltage is formed across the capacitor. The voltage comparator is electrically connected to the connecting end of the capacitor and the current source and used for comparing the output voltage of the regulator with the first voltage so as to output a fixed open-circuit time control signal.
In an embodiment of the present invention, the fixed open-time controller further includes a ramp generator. The ramp generator is electrically connected to the modulation circuit to generate a ramp voltage signal. The modulation circuit outputs a modulation signal according to the feedback voltage, the reference voltage signal, the ramp voltage signal and the extracted ripple current.
In one embodiment of the present invention, the current ripple extractor comprises a current sense amplifier, a sample-and-hold circuit and a subtractor. The current sense amplifier senses the current in the energy storage inductor of the buck converter, which flows through the equivalent series resistance of the output capacitor to obtain the sensed current. The sample-and-hold circuit is electrically connected to the current sense amplifier for sampling and holding the DC component of the sensed current. The subtractor is electrically connected to the current sense amplifier and the sample-and-hold circuit, and is used for subtracting the held direct-current component from the sensed current to generate the extraction ripple current.
In one embodiment of the present invention, the modulation circuit includes an amplifier, a capacitor, an adder and a modulator. The amplifier receives a reference voltage signal and a feedback voltage to generate a regulated reference voltage signal. The two ends of the capacitor are respectively and electrically connected with the amplifier and the ground. The adder is electrically connected to the amplifier for subtracting the regulated reference voltage signal from the first voltage signal associated with the extracted ripple current to generate a second voltage signal. The modulator is electrically connected to the adder and used for generating a modulation signal according to the second voltage signal and the feedback voltage.
In an embodiment of the present invention, the modulation circuit includes an adder and a modulator. The adder is electrically connected to the amplifier for subtracting the reference voltage signal from the first voltage signal associated with the extracted ripple current to generate a second voltage signal. The modulator is electrically connected to the adder and used for generating a modulation signal according to the second voltage signal and the feedback voltage.
In an embodiment of the present invention, the voltage divider includes a plurality of resistors electrically connected in series.
In summary, the present invention provides a fixed open-time controller for enhancing the noise margin of a buck converter device. In addition, signal jitter may be improved in some embodiments, and thus the provided fixed open-time controller may have even further improved stability and noise margin.
Drawings
The characteristic points of the present application will be highlighted in the figures with specific reference signs, in which;
FIG. 1 is a circuit diagram of one embodiment of a buck converter device of the present invention;
FIG. 2A is a circuit diagram of a single-switch timer according to an embodiment of the present invention;
FIG. 2B is a circuit diagram of a single-shot open-circuit timer according to another embodiment of the present invention;
FIG. 3 is a circuit diagram of a current ripple extractor in accordance with one embodiment of the present invention;
FIG. 4A is a circuit diagram of a modulation circuit according to an embodiment of the present invention;
FIG. 4B is a circuit diagram of a modulation circuit according to another embodiment of the present invention;
fig. 5 is a signal waveform diagram of an embodiment of a buck converter device according to the present invention.
[ List of reference numerals ]
11 fixed open-circuit time controller
111 current ripple extractor
112 voltage divider
113 modulation circuit
114 single-shot open-circuit timer
115 RS flip-flop
116 ramp generator
12 step-down converter
121 predriver
21 hysteresis comparator
22 current source
23 Voltage comparator
31 current sense amplifier
32 sample-and-hold circuit
33 subtracter
41 Amplifier
42 adder
43 Modulator
C1, C2 and CT _ ON capacitance
CO output capacitor
FB feedback voltage
GND ground
ISW current
LX energy storage inductor
M1, M2 transistor
RCO output resistance
R1, RFBH, RFBL resistance
RLOAD output load
VC voltage
VCOT voltage signal
VDD supply voltage
VIN input voltage
VREF, VREF' reference voltage signal
VREFX comparison voltage signal
VOUT output voltage
Voltage of VSW
TON open circuit time control signal
Detailed Description
In order to make the examination committee more easily understand the objects, effects, and technical features of the present invention, a detailed description of the embodiments of the present invention is provided together with the accompanying drawings.
An embodiment of the present invention provides a buck converter device, which includes a fixed open-time controller and a buck converter electrically connected to the buck converter, wherein a current ripple extractor of the fixed open-time controller senses a current flowing in an energy storage inductor, which flows through an equivalent series resistance of an output capacitor (i.e., senses a low side current of the buck converter), to remove a dc current component in the sensed current to generate an extraction ripple current, and generates a ripple voltage signal to a comparator of the fixed open-time controller according to the extraction ripple current to extend a noise margin (noise margin) of the fixed open-time controller.
Further, in another embodiment of the present invention, a ramp generator is provided in the fixed open-time controller with a ramp voltage signal to a comparator of the fixed open-time controller, and thus minimizes noise susceptibility (susceptability) of the fixed open-time controller to noise and greatly reduces jitter of the signal. In short, the fixed open-time controller of the buck converter device provided may solve the problems of stability and noise susceptibility to noise.
Referring to fig. 1, fig. 1 is a circuit diagram of an embodiment of a buck converter device of the present invention. The buck converter device 1 comprises a fixed open-time controller 11 and a buck converter 12, wherein the buck converter 12 is electrically connected to the fixed open-time controller 11. The buck converter 12 is controlled to turn on or off by the fixed open-time controller 11. When the buck converter 12 is turned on, the buck converter 11 transfers the energy of the regulator input voltage VIN to the regulator output voltage VOUT via the electronic switching device (formed by the transistors M1 and M2). When the buck converter 12 is off, the energy stored in the energy storage inductor LX is supplied to the regulator output voltage VOUT.
The fixed open-time controller 11 receives the regulator output voltage VOUT and senses the current ISW in the energy storage inductor LX flowing through the equivalent series resistance of the output capacitor (i.e., the impedance of the resistor RCO of the output capacitor CO). Current ISW is also the low side current of buck converter 12. The fixed open-time controller 11 generates a feedback voltage FB according to the regulator output voltage VOUT and generates an extraction ripple current according to the sensed current. The fixed open-time controller 11 can determine the open-time of the buck converter 12 (i.e., the interval during which the buck converter 12 is turned off) according to the feedback voltage FB and the extracted ripple current, and determine the open-time of the buck converter 12 (i.e., the interval during which the buck converter 12 is turned on) according to the regulator input voltage VIN and the regulator output voltage VOUT. Since the extraction ripple current does not have a dc component of the current ISW, the dc component of the current ISW is not amplified in the fixed open-time controller 11, so that the noise margin of the fixed open-time controller 11 can be extended and the fixed open-time controller 11 can accurately control the open-time of the buck converter 12.
Furthermore, in order to take into account the signal jitter caused by noise, the fixed open-time controller 11 further generates a ramp voltage signal, and determines the open-time of the buck converter 12 according to not only the feedback voltage FB and the extracted ripple current, but also the ramp voltage signal. Because of the consideration of the added ramp voltage signal, the susceptibility of the fixed open-time controller 11 to noise is reduced and the signal jitter caused by noise is reduced.
The description of the buck converter 12 will be detailed below. The buck converter 12 includes a pre-driver 121 (or logic circuit), transistors M1, M2, an energy storage inductor LX, an output capacitor CO, and an output resistor RCO. The output load RLOAD may be electrically connected to the regulator output voltage VOUT. The output capacitor CO is electrically connected to the output resistor RCO in a series connection manner, wherein the output resistor RCO is electrically connected to ground through the output capacitor CO.
The regulator output voltage VOUT is electrically connected to the output resistor RCO and the energy storage inductor LX. Transistors M1 and M2 (e.g., PMOS transistors) constitute electronic switching devices. The gates of the transistors M1 and M2 are electrically connected to the pre-driver 121, the source of the transistor M1 is electrically connected to the regulator input voltage VIN, the drain of the transistor M1 is electrically connected to the energy storage inductor LX and the source of the transistor M2, and the drain of the transistor M2 is electrically connected to ground. The drains of the transistors M1 and M2 are also electrically connected to the fixed open-time controller 11, so that the fixed open-time controller 11 can sense the current ISW.
The pre-driver 121 receives a control signal from the fixed open-time controller 11. The pre-driver 121 outputs gate control signals to the gates of the transistors M1 and M2 according to the control signals. When the transistor M1 is turned on (and at the same time, the transistor M2 is turned off), the buck converter 12 is turned on, so that the energy of the regulator input voltage VIN is transferred to the regulator output voltage VOUT (i.e., the current ISW increases); and when the transistor M2 is turned on (and at the same time the transistor M1 is turned off), the buck converter 11 is turned off, so that the energy stored in the energy storage inductor LX is supplied to the regulator output voltage VOUT (i.e., the current ISW decreases).
With continued reference to fig. 1, a description of the fixed open-time controller 11 will be described below. The fixed open-time controller 11 includes a current ripple extractor 111, a voltage divider 112, a modulation circuit 113, a single-open-circuit timer 114, a reset-set (RS) flip-flop 115, and a ramp generator 116. The current ripple extractor 111 is electrically connected to the drain of the transistor M2, and is further electrically connected to the modulation circuit 113. The voltage divider 112 is electrically connected to the regulator output voltage VOUT and the modulation circuit 113. The ramp generator 116 is electrically connected to the modulation circuit 113. The modulation circuit 113 is electrically connected to the reference voltage signal VREF and the RS flip-flop 115. The RS flip-flop 115 is electrically connected to the pre-driver 121 and the single open-circuit timer 114.
The current ripple extractor 111 senses a current ISW in the energy storage inductor LX flowing through the equivalent series resistance of the output capacitor (i.e., the low side current of the buck converter 12) to generate a sensed current, and removes a dc component of the sensed current to generate an extracted ripple current. Then, the current ripple extractor 111 generates a ripple voltage signal to the modulation circuit 113 according to the extracted ripple current.
The ramp generator 116 generates a ramp voltage signal to the modulation circuit 113, and the ramp voltage signal and the ripple voltage signal are combined to form a voltage signal VCOT. As described above, the ramp voltage signal reduces the signal jitter caused by noise, so the ramp generator 116 is not needed if the signal jitter does not affect the result (i.e. when the voltage signal VCOT is a ripple voltage signal).
The voltage divider 112 includes resistors RFBH and RFBL, wherein the resistor RFBH is electrically connected to the regulator output voltage VOUT, the modulation circuit 113 and the resistor RFBL, and the resistor RFBL is electrically connected to ground. The voltage divider 112 generates a feedback voltage FB across the resistor RFBL according to the regulator output voltage VOUT, and the feedback voltage FB is received by the modulation circuit 113.
The modulation circuit 113 generates a modulation signal according to the addition result of the voltage signal VCOT and the feedback voltage FB and the reference voltage signal VREF, and outputs the modulation signal to the set terminal of the RS flip-flop 115. For example, when the sum of the voltage signal VCOT and the feedback voltage FB is smaller than the reference voltage signal VREF (or the reference adjusted voltage signal generated from the reference voltage signal VREF), the RS flip-flop 115 outputs a control signal with a logic high level to the pre-driver 121, and the gate control signal generated by the pre-driver 121 turns on the transistor M1 and turns off the transistor M2. That is, the off-time of the buck converter can be terminated when the sum of the voltage signal VCOT and the feedback voltage FB is less than the reference voltage signal VREF (or a reference adjusted voltage signal generated from the reference voltage signal VREF).
The one-shot open-circuit timer 114 receives the regulator input voltage VIN and the regulator output voltage VOUT, and generates an open-time control signal TON (as shown in fig. 2A and 2B) and an inverse signal of the open-time control signal TON according to the regulator input voltage VIN and the regulator output voltage VOUT. The open-time control signal TON and the inverse signal of the open-time control signal TON are respectively input to the reset terminal and the set terminal of the RS flip-flop 115.
When the open-time control signal TON is at a logic low level, the RS flip-flop 115 outputs a control signal at a logic high level to the pre-driver 121, and the gate control signal generated by the pre-driver 121 turns on the transistor M2 and turns off the transistor M1. That is, when the addition result of the open-time control signal TON is at a logic level low, the open-time of the buck converter is terminated. Thus, the fixed open-time controller 11 can control the open-time as well as the open-time of the buck converter 12.
It should be noted that the embodiment of the fixed open-time controller 11 in fig. 1 is not intended to limit the present invention. Other embodiments that can achieve the function of the fixed open-time controller 11 can be found by those skilled in the art after referring to the present disclosure. For example, in another embodiment, the RS flip-flop 15 can be replaced by another type of flip-flop.
Referring to fig. 1 and fig. 2A, fig. 2A is a circuit diagram of a single-switch timer according to an embodiment of the present invention. It is noted that fig. 2A shows a circuit diagram of an embodiment of the single-shot open-circuit timer 114 of fig. 1, which should not be construed as a limitation of the invention. The single-shot open-circuit timer 114 includes a hysteresis comparator 21, a resistor R1 and a capacitor C1. The resistor R1 is electrically connected between the drain of the transistor M1 and the source of the transistor M2 to the voltage VSW (i.e., the voltage at one end of the energy storage inductor LX), and further electrically connected to ground via the capacitor C1. The positive input end and the negative input end of the hysteresis comparator 21 are electrically connected to the regulator output voltage VOUT and the connection point of the capacitor C1 and the resistor R1, respectively.
The hysteresis comparator 21 compares the voltage across the capacitor C1 with the regulator output voltage VOUT to output a hysteresis comparison result signal as the open-time control signal TON. The voltage VSW varies according to the regulator input voltage VIN, the voltage across the capacitor C1 is generated according to the voltage VSW, and the open-time control signal TON is determined according to the voltage VSW and the regulator output voltage VOUT. That is, the open-circuit time of the buck converter 12 is determined according to the regulator input voltage VIN and the regulator output voltage VOUT.
Referring to fig. 1 and 2B, fig. 2B is a circuit diagram of a single-shot open-circuit timer according to another embodiment of the present invention. It should be noted that fig. 2B shows a circuit diagram of another embodiment of the single-shot open-circuit timer 114 in fig. 1, which should not be construed as a limitation of the invention. The one-shot open-circuit timer 114 includes a current source 22, a voltage comparator 23, and a capacitor CT _ ON. The current source 22 is electrically connected to the supply voltage VDD and ground through the capacitor CT _ ON. A positive input terminal and a negative input terminal of the voltage comparator 23 are electrically connected to a connection point of the current source 22 and the capacitor CT _ ON and the regulator output voltage VOUT, respectively.
The current source 22 generates a current flowing through the capacitor CT _ ON according to the regulator input voltage VIN, wherein the current is proportional to the regulator input voltage VIN. The current flows through the capacitor CT _ ON to form a voltage VC across the capacitor CT _ ON, and the voltage comparator 23 compares the voltage VC with the regulator output voltage VOUT to generate a comparison result signal as the open-time control signal TON. Thus, the open-circuit time of the buck converter 12 is determined according to the regulator input voltage VIN and the regulator output voltage VOUT.
Next, referring to fig. 1 and fig. 3, fig. 3 is a circuit diagram of a current ripple extractor according to an embodiment of the present invention. It should be noted that fig. 3 shows a circuit diagram of an embodiment of the current ripple extractor 111 in fig. 1, which should not be construed as a limitation of the present invention. The current ripple extractor 111 includes a current sense amplifier 31, a sample-and-hold circuit 32, and a subtractor 33. An input terminal of the current sense amplifier 31 is electrically connected to the drain of the transistor M1 and the energy storage inductor LX for receiving the low-side current (i.e., the current ISW) of the buck converter 12, and another input terminal of the current sense amplifier 31 is electrically connected to ground. The output terminal of the current sense amplifier 31 is electrically connected to the subtractor 33 and the sample-and-hold circuit 32. The subtractor 33 is electrically connected to the sample-and-hold circuit 32 and the comparator 113.
Current sense amplifier 31 senses current ISW. The sensed current is generated by a current sense amplifier 31 and is provided to a subtractor 33 and a sample-and-hold circuit 32. The dc component of the sensed current may be sampled and held by sample and hold circuit 32. The subtractor 33 may subtract the maintained dc component (i.e., the dc component of the previously sensed current) from the sensed current to generate the extraction ripple current, and the extraction ripple current outputs a ripple voltage signal. The subtractor 33 may further add the ramp voltage signal from the ramp generator 116 to the ripple voltage signal to form a voltage signal VCOT at the input of the modulation circuit 113.
Next, referring to fig. 1 and fig. 4A, fig. 4A is a circuit diagram of a modulation circuit according to an embodiment of the invention. It should be noted that fig. 4A shows a circuit diagram of an embodiment of the modulation circuit 113 in fig. 1, and the invention is not limited thereto. The modulation circuit 113 includes an amplifier 41, a capacitor C2, an adder 42, and a modulator 43. The output terminal of the amplifier 41 is electrically connected to one terminal of the capacitor C2. Two input terminals of the amplifier 41 are electrically connected to the feedback voltage FB and the reference voltage signal VREF, respectively. The other end of the capacitor C2 is electrically connected to ground. Two input terminals of the modulator 43 are electrically connected to the feedback voltage FB and the output terminal of the adder 42, respectively, and an output terminal of the modulator 43 is electrically connected to the RS flip-flop 115. The two input ends of the adder 42 are electrically connected to the voltage signal VCOT and the output end of the amplifier 41, respectively.
Based on the feedback voltage FB and the reference voltage signal VREF, the amplifier 41 generates a regulated reference voltage signal VREF'. The adder 42 subtracts the voltage signal VCOT from the self-regulated reference voltage signal VREF' to generate the voltage signal VREFX. Then, the modulator 43 generates a modulation signal according to the voltage signal VREFX and the feedback voltage FB.
It should be noted that the amplifier 41 adjusts the reference voltage signal VREF, so the correctness is not affected by the noise margin. However, the invention is not limited thereto. Referring to fig. 4B, fig. 4B is a circuit diagram of another embodiment of a modulation circuit according to the invention. In the present embodiment, the amplifier 41 and the capacitor C2 in fig. 4A are not included. Therefore, the adder 42 in fig. 4B adds the reference voltage signal VREF and the voltage signal VCOT to generate the voltage signal VREFX, and the modulator 43 generates the modulation signal according to the voltage signal VREFX and the feedback voltage FB.
Next, referring to fig. 1, fig. 4A and fig. 5, fig. 5 is a signal waveform diagram of a buck converter device according to an embodiment of the present invention. When buck converter 12 is on, current ISW increases, and when buck converter 12 is off, current ISW decreases. When the buck converter 12 is off, the voltage VSW is positive and decreases, and when the buck converter 12 is off, the voltage VSW is negative and increases.
The sensed current has a dc component and thus the dc component of the sensed current may be sampled and held according to a sample/hold trigger. The ripple current extractor 111 subtracts the maintained dc component of the sensed current from the current sensed to generate the extracted ripple current. The comparison voltage signal VREFX can be generated by the extraction ripple current and the reference voltage signal VREF. The feedback voltage FB and the comparison voltage VREFX can determine the off-time of the buck converter 12. In particular, when the feedback voltage FB is smaller than the comparison voltage VREFX, the off-time of the buck converter 12 is terminated.
To summarize, the present invention provides a fixed open-time controller for use in a buck converter device, and provides a fixed open-time controller that obtains an extracted ripple current from a sensed current of the ESR flowing in an energy storage inductor through an output capacitor, wherein the extracted ripple current and a feedback voltage can be used to determine the open-time of the buck converter. Because the extraction ripple current does not have a dc component, the fixed open-time controller can have an enhanced noise margin. Further, signal ripple can also be improved by using a ramp voltage signal to compensate for the slope of the extracted ripple current, and thus the fixed open-time controller has improved stability and noise immunity.
While the present invention has been described with respect to the specific embodiments, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the spirit of the invention and beyond the scope of the appended claims.

Claims (10)

1. A fixed open-time controller, comprising:
a voltage divider for generating a feedback voltage from a regulator output voltage of the buck converter;
a current ripple extractor for sensing a current in an energy storage inductor of the buck converter, which flows through an Equivalent Series Resistance (ESR) of an output capacitor, and for generating an extracted ripple current having no dc component according to the sensed current;
a single-shot open-circuit timer for outputting a fixed open-circuit time control signal according to a regulator input voltage of the buck converter and the regulator output voltage;
a modulation circuit, electrically connected to the voltage divider and the current ripple extractor, for outputting a modulation signal according to a reference voltage signal, the feedback voltage and the extracted ripple current; and
the flip-flop is electrically connected to the single-shot open-circuit timer and the modulation circuit and used for generating a control signal to the buck converter according to the modulation signal and the fixed open-circuit time control signal;
wherein the open-circuit time of the buck converter is determined according to the fixed open-circuit time control signal, and the open-circuit time of the buck converter is determined according to the modulation signal.
2. The fixed open-circuit time controller of claim 1, wherein the flip-flop is a set-Reset (RS) flip-flop, a set terminal of the RS flip-flop is electrically connected to a comparator and the single-shot open-circuit timer to receive the comparison result signal and an inverted signal of the fixed open-circuit time control signal, and a reset terminal of the RS flip-flop is electrically connected to the single-shot open-circuit timer to receive the fixed open-circuit time control signal.
3. The fixed open-circuit time controller of claim 1, wherein the single shot open-circuit timer comprises:
a capacitor;
a resistor electrically connected to ground via the capacitor for receiving a first voltage at one end of the energy storage inductor, wherein the first voltage varies according to the regulator input voltage; and
and the hysteresis comparator is electrically connected to the connecting end of the capacitor and the resistor, and compares the second voltage with the output voltage of the regulator at the connecting end of the capacitor and the resistor to generate a hysteresis comparison result signal to serve as the fixed open-circuit time control signal.
4. The fixed open-circuit time controller of claim 1, wherein the single shot open-circuit timer comprises:
a capacitor;
a current source electrically connected to ground through the capacitor for generating a current proportional to the regulator input voltage to form a first voltage across the capacitor; and
and the voltage comparator is electrically connected to the connecting end of the capacitor and the current source and compares the output voltage of the regulator with the first voltage to output the fixed open-circuit time control signal.
5. The fixed open-time controller according to claim 1, further comprising:
the ramp generator is electrically connected with the modulation circuit and used for generating a ramp voltage signal;
the modulation circuit outputs the modulation signal according to the feedback voltage, the reference voltage signal, the ramp voltage signal and the extraction ripple current.
6. The fixed open-time controller of claim 1, wherein said current ripple extractor comprises:
a current sense amplifier for sensing a current in an energy storage inductor of the buck converter flowing through an equivalent series resistance of the output capacitor to obtain the sensed current;
a sample-and-hold circuit electrically connected to the current sense amplifier for sampling and holding a dc component of the sensed current; and
a subtractor electrically connected to the current sense amplifier and the sample-and-hold circuit for subtracting the held dc component from the sensed current to generate the extraction ripple current.
7. The fixed open-time controller of claim 1, wherein the modulation circuit comprises:
an amplifier for receiving the reference voltage signal and the feedback voltage to generate a regulated reference voltage signal;
the two ends of the capacitor are respectively and electrically connected with the amplifier and the ground;
an adder electrically connected to the amplifier for subtracting the regulated reference voltage signal from a first voltage signal associated with the extracted ripple current to generate a second voltage signal; and
and the modulator is electrically connected to the adder and used for generating the modulation signal according to the second voltage signal and the feedback voltage.
8. The fixed open-time controller of claim 1, wherein the modulation circuit comprises:
an adder for subtracting the reference voltage signal from a first voltage signal associated with the extracted ripple current to generate a second voltage signal; and
and the modulator is electrically connected to the adder and used for generating the modulation signal according to the second voltage signal and the feedback voltage.
9. The fixed open-time controller of claim 1, wherein the voltage divider comprises a plurality of resistors electrically connected in series.
10. A buck converter device, comprising:
the fixed open-time controller of any one of claims 1 to 9, and a buck converter electrically connected to the fixed open-time controller, wherein;
the fixed open-circuit time controller includes:
a voltage divider for generating a feedback voltage from a regulator output voltage of the buck converter;
a current ripple extractor for sensing a current in an energy storage inductor of the buck converter, which flows through an ESR of the output capacitor, and for generating an extraction ripple current having no dc component according to the sensed current;
a single-shot open-circuit timer for outputting a fixed open-circuit time control signal according to a regulator input voltage of the buck converter and the regulator output voltage;
a modulation circuit, electrically connected to the voltage divider and the current ripple extractor, for outputting a modulation signal according to a reference voltage signal, the feedback voltage and the extracted ripple current; and
the flip-flop is electrically connected to the single-shot open-circuit timer and the modulation circuit and used for generating a control signal to the buck converter according to the modulation signal and the fixed open-circuit time control signal;
wherein the open-time of the buck converter is determined according to the fixed open-time control signal, and the open-time of the buck converter is determined according to the modulation signal.
CN201910459153.5A 2019-05-29 2019-05-29 Fixed open-time controller and buck converter device using the same Active CN112019045B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910459153.5A CN112019045B (en) 2019-05-29 2019-05-29 Fixed open-time controller and buck converter device using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910459153.5A CN112019045B (en) 2019-05-29 2019-05-29 Fixed open-time controller and buck converter device using the same

Publications (2)

Publication Number Publication Date
CN112019045A true CN112019045A (en) 2020-12-01
CN112019045B CN112019045B (en) 2021-09-21

Family

ID=73500782

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910459153.5A Active CN112019045B (en) 2019-05-29 2019-05-29 Fixed open-time controller and buck converter device using the same

Country Status (1)

Country Link
CN (1) CN112019045B (en)

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481178A (en) * 1993-03-23 1996-01-02 Linear Technology Corporation Control circuit and method for maintaining high efficiency over broad current ranges in a switching regulator circuit
US20110062932A1 (en) * 2009-09-17 2011-03-17 Linear Technology Corporation Dc/dc converter having a fast and accurate average current limit
CN203504410U (en) * 2012-11-16 2014-03-26 力智电子股份有限公司 DC-DC converter
US8698467B2 (en) * 2009-02-24 2014-04-15 Fujitsu Semiconductor Limited Multi-mode DC-DC power converters
CN105071655A (en) * 2014-09-18 2015-11-18 成都芯源系统有限公司 Self-adaptive constant on-time controlled switching power supply, controller and control method
CN105356750A (en) * 2014-12-10 2016-02-24 成都芯源系统有限公司 Switching power supply with overvoltage protection function, controller and overvoltage protection method
CN105978337A (en) * 2016-06-22 2016-09-28 电子科技大学 COT control mode based offset voltage canceling circuit
CN106059292A (en) * 2015-04-09 2016-10-26 联发科技股份有限公司 Pulse width control device based on constant on-time and method thereof
CN106787726A (en) * 2017-01-19 2017-05-31 电子科技大学 The dynamic removing method of self adaptation ON time control converter output voltage imbalance

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5481178A (en) * 1993-03-23 1996-01-02 Linear Technology Corporation Control circuit and method for maintaining high efficiency over broad current ranges in a switching regulator circuit
US8698467B2 (en) * 2009-02-24 2014-04-15 Fujitsu Semiconductor Limited Multi-mode DC-DC power converters
US20110062932A1 (en) * 2009-09-17 2011-03-17 Linear Technology Corporation Dc/dc converter having a fast and accurate average current limit
CN203504410U (en) * 2012-11-16 2014-03-26 力智电子股份有限公司 DC-DC converter
CN105071655A (en) * 2014-09-18 2015-11-18 成都芯源系统有限公司 Self-adaptive constant on-time controlled switching power supply, controller and control method
CN105356750A (en) * 2014-12-10 2016-02-24 成都芯源系统有限公司 Switching power supply with overvoltage protection function, controller and overvoltage protection method
CN106059292A (en) * 2015-04-09 2016-10-26 联发科技股份有限公司 Pulse width control device based on constant on-time and method thereof
CN105978337A (en) * 2016-06-22 2016-09-28 电子科技大学 COT control mode based offset voltage canceling circuit
CN106787726A (en) * 2017-01-19 2017-05-31 电子科技大学 The dynamic removing method of self adaptation ON time control converter output voltage imbalance

Also Published As

Publication number Publication date
CN112019045B (en) 2021-09-21

Similar Documents

Publication Publication Date Title
US8717002B2 (en) Constant on-time converter and control method thereof
US9548658B2 (en) Control circuit, switching power supply and control method
US9425688B2 (en) Converter circuit and associated method
EP2947762B1 (en) Duty cycle based current estimation in buck converter
US9035638B2 (en) DC/DC converter arrangement and method for DC/DC conversion
US11183930B2 (en) Power-save mode pulse gating control for switching converter
US10587196B1 (en) Constant on-time controller and buck regulator device using the same
EP4134778A1 (en) Voltage regulating apparatus, chip, power supply, and electronic device
US10103720B2 (en) Method and apparatus for a buck converter with pulse width modulation and pulse frequency modulation mode
CN107667463B (en) Voltage regulator and method for voltage regulation
US11095221B1 (en) Constant on-time controller and buck regulator device using the same
CN113098267B (en) Switch converter, switch integrated circuit and control circuit thereof
EP4102336A1 (en) Voltage adjustment apparatus, chip, power source, and electronic device
TWI699640B (en) Contstant on-time controller and buck regulator device using the same
CN211481150U (en) Electronic device, microcontroller and buck converter
CN117155073A (en) Switching converter and control circuit thereof
CN112019045B (en) Fixed open-time controller and buck converter device using the same
US9471071B2 (en) Apparatus, system and method for voltage regulator with an improved voltage regulation using a remote feedback loop and filter
CN113972837B (en) Constant on-time controller and buck regulator device using the same
CN211857324U (en) Voltage adjusting device, chip, power supply and electronic equipment
CN116094323A (en) Switch converter
CN212433648U (en) Voltage adjusting device, chip, power supply and electronic equipment
Li et al. Fixed‐frequency adaptive on‐time buck converter with ramp compensation
CN116742951B (en) Switching power supply circuit and electronic device
CN116032103B (en) Turn-off time control circuit and turn-off time control method for boost circuit and boost circuit

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant