CN112003483A - Self-adaptive voltage regulating circuit - Google Patents
Self-adaptive voltage regulating circuit Download PDFInfo
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- CN112003483A CN112003483A CN202010864978.8A CN202010864978A CN112003483A CN 112003483 A CN112003483 A CN 112003483A CN 202010864978 A CN202010864978 A CN 202010864978A CN 112003483 A CN112003483 A CN 112003483A
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- 230000001105 regulatory effect Effects 0.000 title claims abstract description 29
- 239000003990 capacitor Substances 0.000 claims description 26
- 230000003044 adaptive effect Effects 0.000 claims description 17
- 229910044991 metal oxide Inorganic materials 0.000 claims description 3
- 150000004706 metal oxides Chemical class 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims description 3
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/06—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
- H02M7/08—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode arranged for operation in parallel
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
- H02M1/15—Arrangements for reducing ripples from dc input or output using active elements
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
- H02M7/06—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode
- H02M7/10—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes without control electrode or semiconductor devices without control electrode arranged for operation in series, e.g. for multiplication of voltage
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/0003—Details of control, feedback or regulation circuits
Abstract
The invention discloses a self-adaptive voltage regulating circuit, belonging to the technical field of voltage regulating circuits, comprising: the negative end of the error amplifier inputs a Vref comparison signal; the positive terminal of the error amplifier is connected with the input terminal of the filter circuit, and the output terminal of the filter circuit is also connected with the input terminal of the error amplifier to form a loop; bridge rectifier circuit, filter circuit's output is connected with bridge rectifier circuit's input, wherein: the bridge rectifier circuit comprises a first rectifier bridge, a second rectifier bridge, a third rectifier bridge and a fourth rectifier bridge, the first rectifier bridge and the second rectifier bridge are connected in parallel to form a first parallel circuit, the third rectifier bridge and the fourth rectifier bridge are connected in parallel to form a second parallel circuit, and the first parallel circuit and the second parallel circuit are connected in series; and the output end of the third rectifier bridge is connected with the input end of the filter circuit, and the output end of the third rectifier bridge is also connected with the output end of the fourth rectifier bridge.
Description
Technical Field
The invention relates to the technical field of voltage regulating circuits, in particular to a self-adaptive voltage regulating circuit.
Background
The power consumption of integrated circuits becomes more and more important along with the development of performance of portable electronic products and the trend of light, thin, short and small, adaptive voltage regulation (AVS) is an effective power management technology proposed in recent years, the AVS adjusts the frequency according to a certain strategy by monitoring hardware, and adaptively regulates the voltage based on the working condition of a load, so that the load can further reduce the power consumption by 30-70%.
The grant publication "CN 104300788B" describes "an adaptive voltage regulation circuit, which includes power transistors MP and MN, an inductor L, a capacitor C, a first resistor RF1, a second resistor RF2, an analog phase lead compensation module, a delay phase lag compensation module, a critical path replica module, a sawtooth wave generation module, a comparator, a power transistor driver, an output voltage Vout divided by resistors RF1 and RF2, an operational amplifier, resistors R1 and R2, a capacitor Cc implementing the analog phase lead compensation, an operational transconductance amplifier GM loaded with RGM1 providing a loop gain for APD compensation, a delay of the critical path replica compared with a system clock CLK by phase detection, then, a delay error signal integrated by a charge pump, an output voltage VPD of the charge pump connected to a positive input terminal of the transconductance amplifier GM, by comparing a sawtooth wave current generated by an oscillator OSC with an output current of the GM, PWM waveforms can be obtained, and the power loss of the digital circuit is greatly reduced.
The above patent has the following problems: the current direction of the output end of the comparator cannot be changed in time by the circuit, as is well known, the alternating current has positive phase input and negative phase input, so that the fault of the circuit can be caused due to the fact that the output current direction cannot be adjusted in time, and meanwhile, the current output by the comparator cannot pass through large current and is only suitable for passing through small current, so that the circuit has limitation.
Disclosure of Invention
In view of the problems in the prior art, it is an object of the present invention to provide an adaptive voltage regulating circuit.
In order to solve the problems, the invention adopts the following technical scheme:
an adaptive voltage regulation circuit comprising:
the negative end of the error amplifier inputs a Vref comparison signal;
the positive terminal of the error amplifier is connected with the input terminal of the filter circuit, and the output terminal of the filter circuit is also connected with the input terminal of the error amplifier to form a loop;
bridge rectifier circuit, filter circuit's output is connected with bridge rectifier circuit's input, wherein:
the bridge rectifier circuit comprises a first rectifier bridge, a second rectifier bridge, a third rectifier bridge and a fourth rectifier bridge, the first rectifier bridge and the second rectifier bridge are connected in parallel to form a first parallel circuit, the third rectifier bridge and the fourth rectifier bridge are connected in parallel to form a second parallel circuit, and the first parallel circuit and the second parallel circuit are connected in series;
the output end of the third rectifier bridge is connected with the input end of the filter circuit, and the output end of the third rectifier bridge is also connected with the output end of the fourth rectifier bridge, wherein:
the filter circuit comprises a PMOS (P-channel metal oxide semiconductor) tube and an inductor L, the output end of the third rectifier bridge is connected with the input end of the PMOS tube, the PMOS tube is provided with two output ends, one output end of the PMOS tube is connected with a VCC (voltage holding) end, the other output end of the PMOS tube is respectively connected with the input end of the inductor L, and the output end of the inductor L is connected with a GND (ground) end;
the output end of the PMOS tube is connected with the input end of the compensation circuit; and
the voltage regulating tube is provided with two output ends, the output end of the compensating circuit is connected with the input end of the voltage regulating tube, one output end of the voltage regulating tube is connected with a negative feedback circuit, the output end of the negative feedback circuit is connected with the negative end of the error amplifier, the other output end of the voltage regulating tube is connected with a slide rheostat R7, and the output end of the slide rheostat R7 is connected with the VDD end.
As a preferable mode of the present invention, the filter circuit includes a first resistor R1, a first capacitor C1, a seventh diode D7, a second resistor R2, and a third resistor R3, a positive terminal of the error amplifier is connected to an input terminal of a first resistor R1, the first resistor R1, the first capacitor C1, and the seventh diode D7 are sequentially connected in series, output terminals of the seventh diode D7 are connected to input terminals of a second resistor R2 and a third resistor R3, the second resistor R2 and the third resistor R3 are connected in parallel, an input terminal of the second resistor R2 is connected to a GND terminal, an output terminal of the third resistor R3 is connected to input terminals of the first rectifier circuit and the third rectifier circuit, and an output terminal of the third resistor R3 is connected to an input terminal of the error amplifier to form a loop.
As a preferable embodiment of the present invention, the first rectifying circuit includes four first rectifying diodes D1, two of the first rectifying diodes D1 are connected in series, and after two of the first rectifying diodes D1 are connected in series, every two of the first rectifying diodes D1 are connected in series and then connected in parallel.
As a preferable embodiment of the present invention, the second rectifying circuit includes four second rectifying diodes D2, two of the second rectifying diodes D2 are connected in series, after two other second rectifying diodes D2 are connected in series, every two second rectifying diodes D2 are connected in series and then connected in parallel, and the direction of the second rectifying diode D2 is opposite to that of the first rectifying diode D1.
As a preferable embodiment of the present invention, the third rectifying circuit includes four third rectifying diodes D3, two of the third rectifying diodes D3 are connected in series, after two of the third rectifying diodes D3 are connected in series, every two third rectifying diodes D3 are connected in series and then connected in parallel, and the third rectifying diode D3 and the first rectifying diode D1 have the same direction.
As a preferable embodiment of the present invention, the fourth rectifying circuit includes four fourth rectifying diodes D4, two of the fourth rectifying diodes D4 are connected in series, after two of the other fourth rectifying diodes D4 are connected in series, every two of the fourth rectifying diodes D4 are connected in series and then connected in parallel, and the directions of the fourth rectifying diode D4 and the second rectifying diode D2 are the same.
As a preferable aspect of the present invention, the compensation circuit includes a fifth diode D5, a second capacitor C2, a sixth diode D6, and a third capacitor C3 connected in series in this order.
As a preferable scheme of the present invention, the negative feedback circuit includes an oscillator a, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6, one of the output terminals of the voltage adjustment tube is respectively connected to the negative terminal of the oscillator a and the input terminal of the fourth resistor R4, the fourth resistor R4 and the oscillator a form a parallel connection relationship, and the positive terminal of the oscillator a and the U terminal of the oscillator a form a parallel connection relationshippThe output end of the fourth resistor R4 is connected with the input ends of a fifth resistor R5 and a sixth resistor R6 respectively, the fifth resistor R5 and the sixth resistor R6 form a parallel relation, the output end of the fifth resistor R5 is connected with the GND end, the output end of the sixth resistor R6 is connected with the negative electrode end of the error amplifier, and the output end of the sixth resistor R6 is also connected with the input end of the oscillator A to form a loop.
In a preferred embodiment of the present invention, the first capacitor C1, the second capacitor C2, and the third capacitor C3 are all polar capacitors.
Compared with the prior art, the invention has the advantages that:
(1) when the error amplifier outputs positive half-cycle current, the positive half-cycle current is firstly well filtered under the action of the filter circuit and is output after error ripples are eliminated, meanwhile, the filter circuit and the error amplifier form a closed loop, the positive half-cycle current is output and then sequentially passes through the first rectifying circuit and the fourth rectifying circuit, and then is compensated by the compensation circuit, so that voltage regulation is realized through regulation of the voltage regulation tube.
(2) When the error amplifier outputs negative half-cycle current, the negative half-cycle current is firstly well filtered under the action of the filter circuit, and is output after error ripple is eliminated, meanwhile, the filter circuit and the error amplifier form a closed loop, the negative half cycle current is output and then sequentially passes through the second rectifying circuit and the third rectifying circuit, at the moment, the output current is the negative half cycle, so the action of the filter circuit is required, the direction of the voltage regulating tube is adjusted in time, the phase position of the voltage regulating tube is changed to make the direction of the voltage regulating tube be a positive half cycle, then the voltage regulating tube is compensated by the compensation circuit, and the voltage regulating tube is adjusted to realize voltage regulation, in the process, the voltage regulator is suitable for passing of strong current and weak current under the action of the first rectifying circuit and the fourth rectifying circuit, and a closed loop negative feedback loop is formed by the action of the negative feedback circuit and the error amplifier.
Drawings
FIG. 1 is a circuit diagram of an adaptive voltage regulation circuit according to the present invention;
FIG. 2 is a circuit diagram of the adaptive voltage regulator circuit outputting positive half cycle current according to the present invention;
FIG. 3 is a circuit diagram of the adaptive voltage regulator circuit outputting negative half cycle current according to the present invention.
The reference numbers in the figures illustrate:
1. an error amplifier; 2. a filter circuit; 3. an inverter circuit; 4. a bridge rectifier circuit; 5. a compensation circuit; 6. a negative feedback circuit; 7. and a voltage adjusting tube.
Detailed Description
The technical solutions in the embodiments of the present invention will be described clearly and completely with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, rather than all embodiments, and all other embodiments obtained by a person of ordinary skill in the art without creative efforts based on the embodiments of the present invention belong to the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "upper", "lower", "inner", "outer", "top/bottom", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only for convenience in describing the present invention and simplifying the description, and do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and operate, and thus are not to be construed as limiting the present invention, and furthermore, the terms "first" and "second" are only used for descriptive purposes and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "disposed," "sleeved/connected," "connected," and the like are to be construed broadly, e.g., "connected," which may be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; the two elements can be directly connected or indirectly connected through an intermediate medium, and the two elements can be communicated with each other, so that the specific meaning of the terms in the invention can be understood by those skilled in the art.
Example (b):
referring to fig. 1, an adaptive voltage regulation circuit includes:
the negative pole end of the error amplifier 1 inputs a Vref comparison signal;
the positive pole end of the error amplifier 1 is connected with the input end of the filter circuit 2, the output end of the filter circuit 2 is further connected with the input end of the error amplifier 1 to form a loop, the filter circuit 2 comprises a first resistor R1, a first capacitor C1, a seventh diode D7, a second resistor R2 and a third resistor R3, the positive pole end of the error amplifier 1 is connected with the input end of a first resistor R1, the first resistor R1, the first capacitor C1 and the seventh diode D7 are sequentially connected in series, and an output terminal of the seventh diode D7 are connected to input terminals of the second resistor R2 and the third resistor R3, the second resistor R2 and the third resistor R3 are connected in parallel, the input end of the second resistor R2 is connected with the GND end, the output end of the third resistor R3 is respectively connected with the input ends of the first rectifying circuit and the third rectifying circuit, and the output end of the third resistor R3 is also connected with the input end of the error amplifier 1 to form a loop;
bridge rectifier circuit 4, filter circuit 2's output is connected with bridge rectifier circuit 4's input, wherein:
the bridge rectifier circuit 4 comprises a first rectifier bridge, a second rectifier bridge, a third rectifier bridge and a fourth rectifier bridge, the first rectifier bridge and the second rectifier bridge are connected in parallel to form a first parallel circuit, the third rectifier bridge and the fourth rectifier bridge are connected in parallel to form a second parallel circuit, and the first parallel circuit and the second parallel circuit are connected in series;
the first rectifying circuit comprises four first rectifying diodes D1, wherein two first rectifying diodes D1 are connected in series, and after the other two first rectifying diodes D1 are connected in series, every two first rectifying diodes D1 are connected in series and then connected in parallel;
the second rectifying circuit comprises four second rectifying diodes D2, wherein two second rectifying diodes D2 are connected in series, after the other two second rectifying diodes D2 are connected in series, every two second rectifying diodes D2 are connected in series and then connected in parallel, and the direction of the second rectifying diode D2 is opposite to that of the first rectifying diode D1;
the third rectifying circuit comprises four third rectifying diodes D3, wherein two third rectifying diodes D3 are connected in series, after the other two third rectifying diodes D3 are connected in series, every two third rectifying diodes D3 are connected in series and then connected in parallel, and the directions of the third rectifying diodes D3 and the first rectifying diode D1 are the same;
the fourth rectifying circuit comprises four fourth rectifying diodes D4, wherein two fourth rectifying diodes D4 are connected in series, after the other two fourth rectifying diodes D4 are connected in series, every two fourth rectifying diodes D4 are connected in series and then connected in parallel, and the directions of the fourth rectifying diodes D4 and the second rectifying diodes D2 are the same;
filter circuit 3, the output of third rectifier bridge is connected with filter circuit 3's input, and the output of third rectifier bridge still is connected with the output of fourth rectifier bridge, wherein:
the filter circuit 3 comprises a PMOS (P-channel metal oxide semiconductor) tube and an inductor L, the output end of the third rectifier bridge is connected with the input end of the PMOS tube, the PMOS tube is provided with two output ends, one output end of the PMOS tube is connected with a VCC (voltage holding) end, the other output end of the PMOS tube is respectively connected with the input end of the inductor L, and the output end of the inductor L is connected with a GND (ground) end;
the output end of the PMOS tube is connected with the input end of the compensation circuit 5, and the compensation circuit 5 comprises a fifth diode D5, a second capacitor C2, a sixth diode D6 and a third capacitor C3 which are sequentially connected in series; and
the voltage adjusting tube 7 is provided with two output ends, the output end of the compensating circuit 5 is connected with the input end of the voltage adjusting tube 7, one output end of the voltage adjusting tube 7 is connected with the negative feedback circuit 6, the output end of the negative feedback circuit 6 is connected with the negative end of the error amplifier 1, the other output end of the voltage adjusting tube 7 is connected with the slide rheostat R7, and the output end of the slide rheostat R7 is connected with the VDD end;
wherein: the negative feedback circuit 6 comprises an oscillator A, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6, one output end of the voltage adjusting tube 7 is respectively connected with the negative electrode end of the oscillator A and the input end of the fourth resistor R4, the fourth resistor R4 and the oscillator A form a parallel connection relation, and the positive electrode end of the oscillator A and the U-shaped resistor R4 are connected in parallelpThe output end of the fourth resistor R4 is connected with the input ends of a fifth resistor R5 and a sixth resistor R6 respectively, the fifth resistor R5 and the sixth resistor R6 form a parallel relation, the output end of the fifth resistor R5 is connected with a GND end, the output end of the sixth resistor R6 is connected with the negative pole end of the error amplifier 1, and the output end of the sixth resistor R6 is also connected with the input end of the oscillator A to form a loop;
preferably, the first capacitor C1, the second capacitor C2 and the third capacitor C3 are polar capacitors;
referring to fig. 2, when the error amplifier 1 outputs a positive half-cycle current, the positive half-cycle current is first filtered well by the filter circuit 2 to eliminate error ripples and then output, and meanwhile, the filter circuit 2 and the error amplifier 1 form a closed loop, the positive half-cycle current is output and then sequentially passes through the first rectifying circuit and the fourth rectifying circuit, and then is compensated by the compensation circuit 5, so as to adjust the voltage by the adjustment of the voltage adjusting tube 7, in the above process, the positive half-cycle current is suitable for passing of strong current and weak current by the action of the first rectifying circuit and the fourth rectifying circuit, and after the adjustment of the voltage adjusting tube 7, the positive half-cycle current and the error amplifier 1 form a closed loop negative feedback loop by the action of the negative feedback circuit 6.
Referring to fig. 3, when the error amplifier 1 outputs the negative half-cycle current, the negative half-cycle current is first filtered well by the filter circuit 2 to eliminate the error ripple and then output, meanwhile, the filter circuit 2 and the error amplifier 1 form a closed loop, the negative half cycle current is output and then sequentially passes through a second rectifying circuit and a third rectifying circuit, at the moment, the output current is the negative half cycle, so the action of the filter circuit 3 is needed, the direction of the voltage is adjusted in time, the phase position of the voltage is changed to make the direction of the voltage be a positive half cycle, then the voltage is compensated by the compensation circuit 5, and the voltage adjustment is realized by the adjustment of the voltage adjusting tube 7, in the process, the voltage regulating tube 7 is adjusted through the action of the first rectifying circuit and the fourth rectifying circuit and is suitable for passing of strong current and weak current, through the action of the negative feedback circuit 6, a closed loop negative feedback loop is formed with the error amplifier 1.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the equivalent replacement or change according to the technical solution and the modified concept of the present invention should be covered by the scope of the present invention.
Claims (9)
1. An adaptive voltage regulation circuit, comprising:
the negative end of the error amplifier (1) inputs a Vref comparison signal;
the positive end of the error amplifier (1) is connected with the input end of the filter circuit (2), and the output end of the filter circuit (2) is also connected with the input end of the error amplifier (1) to form a loop;
bridge rectifier circuit (4), the output of filter circuit (2) is connected with the input of bridge rectifier circuit (4), wherein:
the bridge rectifier circuit (4) comprises a first rectifier bridge, a second rectifier bridge, a third rectifier bridge and a fourth rectifier bridge, the first rectifier bridge and the second rectifier bridge are connected in parallel to form a first parallel circuit, the third rectifier bridge and the fourth rectifier bridge are connected in parallel to form a second parallel circuit, and the first parallel circuit and the second parallel circuit are connected in series;
a filter circuit (3), the output of the third rectifier bridge is connected with the input of the filter circuit (3), the output of the third rectifier bridge is also connected with the output of the fourth rectifier bridge, wherein:
the filter circuit (3) comprises a PMOS (P-channel metal oxide semiconductor) tube and an inductor L, the output end of the third rectifier bridge is connected with the input end of the PMOS tube, the PMOS tube is provided with two output ends, one output end of the PMOS tube is connected with a VCC (voltage holding) end, the other output end of the PMOS tube is respectively connected with the input end of the inductor L, and the output end of the inductor L is connected with a GND (ground) end;
the output end of the PMOS tube is connected with the input end of the compensation circuit (5); and
the voltage regulating tube (7), the voltage regulating tube (7) is provided with two output ends, the output end of the compensating circuit (5) is connected with the input end of the voltage regulating tube (7), one of the output ends of the voltage regulating tube (7) is connected with a negative feedback circuit (6), the output end of the negative feedback circuit (6) is connected with the negative end of the error amplifier (1), the other output end of the voltage regulating tube (7) is connected with a sliding rheostat R7, and the output end of the sliding rheostat R7 is connected with the VDD end.
2. The adaptive voltage regulating circuit according to claim 1, wherein the filter circuit (2) comprises a first resistor R1, a first capacitor C1, a seventh diode D7, a second resistor R2 and a third resistor R3, the positive terminal of the error amplifier (1) is connected with the input terminal of a first resistor R1, the first resistor R1, a first capacitor C1 and a seventh diode D7 are sequentially connected in series, the output terminals of the and seventh diodes D7 are connected to the input terminals of the second resistor R2 and the third resistor R3, and a second resistor R2 and a third resistor R3 are connected in parallel with each other, the input terminal of the second resistor R2 is connected with the GND terminal, the output end of the third resistor R3 is respectively connected with the input ends of the first rectifying circuit and the third rectifying circuit, the output end of the third resistor R3 is also connected with the input end of the error amplifier (1) to form a loop.
3. The adaptive voltage regulator circuit according to claim 2, wherein the first rectifying circuit comprises four first rectifying diodes D1, two of the first rectifying diodes D1 are connected in series, and after two of the first rectifying diodes D1 are connected in series, every two first rectifying diodes D1 are connected in series and then connected in parallel.
4. The adaptive voltage regulating circuit according to claim 3, wherein said second rectifying circuit comprises four second rectifying diodes D2, two of said second rectifying diodes D2 are connected in series, and two of said second rectifying diodes D2 are connected in series, and every two of said second rectifying diodes D2 are connected in series and connected in parallel, and said second rectifying diode D2 is opposite to said first rectifying diode D1.
5. The adaptive voltage regulating circuit according to claim 4, wherein the third rectifying circuit comprises four third rectifying diodes D3, two of the third rectifying diodes D3 are connected in series, and after two of the third rectifying diodes D3 are connected in series, every two third rectifying diodes D3 are connected in series and then connected in parallel, and the third rectifying diode D3 is in the same direction as the first rectifying diode D1.
6. The adaptive voltage regulator circuit according to claim 5, wherein said fourth rectifier circuit comprises four fourth rectifier diodes D4, two of said fourth rectifier diodes D4 are connected in series, and after two of said fourth rectifier diodes D4 are connected in series, every two of said fourth rectifier diodes D4 are connected in series and then connected in parallel, and said fourth rectifier diode D4 is in the same direction as said second rectifier diode D2.
7. The adaptive voltage regulating circuit according to claim 6, wherein the compensating circuit (5) comprises a fifth diode D5, a second capacitor C2, a sixth diode D6 and a third capacitor C3 connected in series.
8. The adaptive voltage regulating circuit according to claim 7, wherein the negative feedback circuit (6) comprises an oscillator A, a fourth resistor R4, a fifth resistor R5 and a sixth resistor R6, one of the output terminals of the voltage regulating tube (7) is respectively connected with the negative terminal of the oscillator A and the input terminal of the fourth resistor R4, the fourth resistor R4 is connected with the oscillator A in parallel, and the positive terminal of the oscillator A and U are connected with each otherpThe output end of the fourth resistor R4 is connected with the input ends of a fifth resistor R5 and a sixth resistor R6 respectively, the fifth resistor R5 and the sixth resistor R6 form a parallel relation, the output end of the fifth resistor R5 is connected with the GND end, the output end of the sixth resistor R6 is connected with the negative end of the error amplifier (1), and the output end of the sixth resistor R6 is further connected with the input end of the oscillator A to form a loop.
9. The adaptive voltage regulating circuit according to claim 8, wherein the first capacitor C1, the second capacitor C2 and the third capacitor C3 are polar capacitors.
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Cited By (1)
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CN114900055A (en) * | 2022-07-12 | 2022-08-12 | 深圳核心医疗科技有限公司 | Wireless charging rectification circuit and wireless charging device |
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CN210839382U (en) * | 2019-12-20 | 2020-06-23 | 无锡市欧瑞杰电子科技有限公司 | Ultra-wide voltage rectifying circuit by using bridge rectifier |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN114900055A (en) * | 2022-07-12 | 2022-08-12 | 深圳核心医疗科技有限公司 | Wireless charging rectification circuit and wireless charging device |
CN114900055B (en) * | 2022-07-12 | 2022-10-11 | 深圳核心医疗科技有限公司 | Wireless charging rectifier circuit and wireless charging device |
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