CN112002802B - Preparation method of nano-sized tungsten plug small-electrode phase change memory device - Google Patents

Preparation method of nano-sized tungsten plug small-electrode phase change memory device Download PDF

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CN112002802B
CN112002802B CN202010855149.3A CN202010855149A CN112002802B CN 112002802 B CN112002802 B CN 112002802B CN 202010855149 A CN202010855149 A CN 202010855149A CN 112002802 B CN112002802 B CN 112002802B
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tungsten
tungsten plug
electrode
siox
hard mask
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CN112002802A (en
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刘成
郑勇辉
成岩
齐瑞娟
黄荣
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East China Normal University
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/841Electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/841Electrodes
    • H10N70/8418Electrodes adapted for focusing electric field or current, e.g. tip-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/882Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8828Tellurides, e.g. GeSbTe

Abstract

The invention discloses a preparation method of a tungsten plug small electrode phase change memory device with a nanometer size. Selecting a preprocessed silicon oxide substrate filled with a tungsten plug, and obtaining the tungsten plug with a smaller nano-size tungsten plug by adopting a focused ion beam etching method according to the etching rate difference between silicon oxide and the tungsten plug. The phase-change material and the electrode material layer are sequentially deposited on the upper layer of the tungsten plug by adopting a physical vapor deposition method, a smaller-size tungsten hard mask is deposited right above the W plug by utilizing a focused ion beam system, the phase-change material and the electrode material layer around the hard mask are etched by adopting a reactive ion etching method, the whole device unit is coated by the deposited dielectric layer, and the deposited electrode material finally forms the phase-change memory device with the minimum volume. The invention finely processes the W electrode with the diameter of nanometer magnitude and the phase change memory device with corresponding extremely small size on the micro-nano scale, and can be used for constructing a novel phase change memory device with high density and low power consumption.

Description

Preparation method of nano-sized tungsten plug small-electrode phase change memory device
Technical Field
The invention belongs to the field of semiconductor device processing, and relates to a preparation method of a tungsten plug small electrode phase change memory device with a nanometer size.
Background
Phase Change Random Access Memory (PCRAM) is one of the most competitive candidates for the next generation of nonvolatile Memory due to its characteristics of non-volatility, long cycle life, good scalability, perfect compatibility with the existing standard Complementary Metal Oxide Semiconductor (CMOS) process, and the like, and is receiving wide attention in the field of Memory technology. Since the first introduction of chalcogenide alloys with reversible phase change characteristics in 1968, s.r.ovshinsky, related companies and research institutes have conducted research on phase change memory technology, but limited to early integrated circuit technology and semiconductor processing, the phase change memory technology has been developed more slowly. With the gradual maturity of semiconductor processing technology, size nodes break through from hundreds of nanometers to tens of nanometers, the traditional memory device faces a serious challenge of physical mechanism failure under the condition of size reduction in the practice of realizing integration and miniaturization, and the phase change memory material has good scalability, so that the memory device with nanometer magnitude is developed based on the phase change memory material, and the memory device with 4F2 memory unit size has important application value and significance. Starting from a vertical-structure PCRAM, a phase-change memory device with a nanometer scale is realized from two aspects. Pirovano et al demonstrated that in a vertical structure PCRAM, the operating current decreases with decreasing contact area, achieving the characteristic of lower power consumption of the phase-change memory device. Firstly, a Focused Ion Beam (FIB) technology is adopted, an electromagnetic lens is utilized to deflect and Focus the focused Ion Beam to form a conical Ion Beam with extremely small size to bombard the surface of a material, the purposes of peeling, cutting, depositing, injecting, modifying and the like are realized, along with the rapid development of the nanoscale manufacturing industry, the nanometer processing capacity of the focused Ion Beam enables the focused Ion Beam to become the core of the nanoscale manufacturing industry, the focused Ion Beam is matched with a scanning electron microscope and other high-power electron microscopes to monitor in real time and becomes a main method for nanoscale analysis and manufacturing, a preprocessed silicon oxide substrate filled with a tungsten plug is etched in the FIB, according to the difference of the etching rates of metal tungsten and silicon oxide, a nanoscale small-size tip is etched at the top end of the tungsten plug, the size of a heating electrode is reduced, and the contact area of a phase-change material and the electrode is reduced. Secondly, with the demand of an integrated circuit for high integration density and small feature size, an etching technology is one of core technologies for solving the feature size, a Reactive Ion Etching (RIE) technology in dry etching is adopted, the advantages of anisotropy, high selection ratio, uniformity and the like are fully exerted, a redundant phase-change storage material layer around a W plug is etched, an extremely-small-sized phase-change storage device is formed, the size of a 4F2 storage unit is expected to be realized, high-density integration is realized, operation current is reduced, and durability is improved.
Disclosure of Invention
The invention aims to provide a preparation method of a nano-scale tungsten plug small electrode phase change memory device, which can be used for finely processing a W electrode with a nano-scale diameter and a corresponding phase change memory device with an extremely small size on a micro-nano scale through the advantages of advanced micro-area processing capability of focused ion beams, anisotropic reaction ion etching technology, high selection ratio and the like, and can be used for constructing a novel high-density and low-power-consumption phase change memory device.
To achieve the object of the invention the specific technical scheme is as follows:
a method for preparing a tungsten plug small electrode phase change memory device with a nanometer size comprises the following steps:
step 1: selecting a preprocessed silicon oxide substrate filled with a tungsten plug, etching the tungsten plug and silicon oxide at the periphery of the tungsten plug according to the etching rate difference of the silicon oxide and the tungsten plug, and etching a truncated cone-shaped tip with a small upper part and a big lower part at the top end of the tungsten plug to form a nano-sized tungsten plug small electrode 1 because metal tungsten has a lower etching rate than the silicon oxide;
step 2: depositing a SiOx insulating layer 2 to fill the etched area around the small tungsten plug electrode 1 to a position higher than the small tungsten plug electrode 1;
and step 3: polishing the area around the small electrode 1 of the tungsten plug, and removing the redundant SiOx insulating layer 2 around the small electrode of the tungsten plug to obtain a flat surface, so that the top end of the small electrode 1 of the tungsten plug is flush with the surface of the SiOx insulating layer 2;
and 4, step 4: depositing a phase change material 3 and an electrode layer 4 above the small tungsten plug electrode 1 in sequence;
and 5: depositing a tungsten column hard mask 5 right above the small tungsten plug electrode 1;
step 6: etching the redundant phase change materials 3 and TiNx electrode materials 4 around the tungsten column hard mask 5 to expose the SiOx insulating layer 2, and forming a nano-sized phase change memory device;
and 7: depositing a truncated cone-shaped SiOx coating layer 6 to completely coat the phase-change memory device;
and 8: etching the SiOx coating layer 6 on the surface of the tungsten column hard mask 5 until the tungsten column hard mask 5 is just exposed to form a clean surface;
and step 9: and sequentially depositing a TiNx top electrode 7 and a tungsten top electrode 8 around the tungsten column hard mask 5 respectively, and completely coating the SiOx coating layer 6 and the SiOx insulating layer 2.
In the preparation method, in the step 1, the tungsten plug and the silicon oxide around the tungsten plug are etched by adopting a focused ion beam etching method, and the diameter of the tungsten plug is 100-200 nanometers.
In the preparation method, in the step 1, the diameter of the top of the truncated cone-shaped tip is less than 50 nanometers and is greater than the diameter of the tungsten column hard mask 5.
In the preparation method, in the step 2, the SiOx insulating layer 2 is deposited by adopting a physical vapor deposition or chemical vapor deposition method.
In the preparation method, in the step 2, the thickness of the SiOx insulating layer 2 is 100-300 nanometers.
In the preparation method, in the step 3, the area around the small electrode 1 of the tungsten plug is polished by adopting a chemical mechanical polishing technology.
In the step 4, ge with the thickness of 5-100 nanometers is sequentially deposited above the small tungsten plug electrode 1 by adopting a physical vapor deposition method 2 Sb 2 Te 5 A phase-change material 3 and a TiN electrode layer 4 with the thickness of 5-200 nanometers.
In the preparation method, in the step 5, a tungsten column hard mask 5 with the thickness of 10-100 nanometers and the diameter of 5-100 nanometers is deposited right above the tungsten plug small electrode 1 by adopting a focused ion beam deposition technology.
In the preparation method, in the step 6, the redundant phase change material 3 and the TiNx electrode material 4 around the tungsten column hard mask 5 are etched by adopting a reactive ion etching technology to expose the SiOx insulating layer 2.
The method as claimed in claim 1, wherein in step 7, a truncated cone-shaped SiOx coating layer 6 with a height of 10-300 nm is deposited by focused ion beam deposition.
In the step 8, the SiOx coating layer 6 on the surface of the tungsten column hard mask 5 is etched by using a focused ion beam etching technique.
In the step 9 of the preparation method, an electron beam evaporation process is adopted to sequentially deposit a TiNx top electrode 7 with a thickness of 20 nm and a tungsten top electrode 8 with a thickness of 30 nm around the tungsten column hard mask 5, and the SiOx cladding layer 6 and the SiOx insulating layer 2 are all clad inside.
In the preparation method, in the step 4, the phase-change material 3 is one or at least two of Ge2Sb2Te5, sb2Te3, geTe and Sb2Te which are mixed or superposed, and the thickness is 5-100 nanometers.
In the preparation method, in the step 4, the electrode layer 4 is made of one of TiNx, al, W and Pt, and the thickness is 5-200 nanometers.
The beneficial effects obtained by the invention are as follows: by adopting the advantages of advanced micro-area processing capability of focused ion beams, anisotropic reaction ion etching technology, high selection ratio and the like, the W electrode with the nanometer-scale diameter and the phase change memory device with the corresponding nanometer size are finely processed on the micro-nano scale, and the method can be used for constructing a novel phase change memory device with high density and low power consumption.
Drawings
FIG. 1 is a silicon oxide substrate of the present invention filled with tungsten plugs having a diameter of 180 nanometers;
FIGS. 2-10 are schematic diagrams corresponding to steps 1-9, respectively;
1-tungsten plug small electrode
2- - -SiOx insulating layer
3---Ge 2 Sb 2 Te 5 Phase change material
4- - -TiNx electrode layer
5-tungsten column hard mask
6- - -SiOx coating
7-TiNx top electrode
8-tungsten top electrode
Detailed Description
The present invention will be described in detail with reference to specific examples.
Referring to fig. 1 to 10, the present invention provides a method for manufacturing a tungsten plug small electrode phase change memory device with a nanometer size, including the following steps:
step 1: selecting a preprocessed silicon oxide substrate (a black area in fig. 1 is a tungsten plug) filled with a tungsten plug with the diameter of 180 nanometers, etching the tungsten plug and silicon oxide at the periphery of the tungsten plug by adopting a focused ion beam etching method, and etching a circular truncated cone-shaped tip with the top diameter smaller than 50 nanometers (for example, 35 nanometers in the embodiment and slightly larger than the diameter of a tungsten column hard mask 5) at the top end of the tungsten plug because metal tungsten has a slower etching rate than the silicon oxide to form a tungsten plug small electrode 1 (fig. 2) with the nanometer size;
step 2: as shown in fig. 3, a SiOx insulating layer 2 with a deposition thickness of 200 nm is deposited by physical vapor deposition or chemical vapor deposition to fill the etched region around the tungsten plug small electrode 1 to a height higher than the tungsten plug small electrode 1;
and 3, step 3: as shown in fig. 4, the area around the small electrode 1 of the tungsten plug is polished by using a chemical mechanical polishing technique, and the excess SiOx insulating layer 2 around the small electrode of the tungsten plug is removed to obtain a flat surface, so that the top end of the small electrode 1 of the tungsten plug is flush with the surface of the SiOx insulating layer 2.
And 4, step 4: as shown in fig. 5, ge with a thickness of 40 nm is sequentially deposited above the tungsten plug small electrode 1 by adopting a physical vapor deposition method 2 Sb 2 Te 5 A phase change material 3 and a TiN electrode layer 4 with the thickness of 15 nanometers;
and 5: as shown in fig. 6, a tungsten column hard mask 5 with a thickness of 40 nm and a diameter of 30 nm is deposited right above the tungsten plug small electrode 1 by using a focused ion beam deposition technology;
step 6: as shown in fig. 7, by using a reactive ion etching technique, the excessive phase change material 3 and the TiNx electrode material 4 around the tungsten pillar hard mask 5 are etched to expose the SiOx insulating layer 2, so as to form a nano-sized phase change memory device;
and 7: as shown in fig. 8, a truncated cone-shaped SiOx cladding layer 6 with a height of 120 nm is deposited by focused ion beam deposition technique to completely cover the phase-change memory device;
and step 8: as shown in fig. 9, the SiOx cladding layer 6 on the surface of the tungsten pillar hard mask 5 is etched away by using a focused ion beam etching technique until the tungsten pillar hard mask 5 is just exposed, so as to form a clean surface;
and step 9: as shown in fig. 10, by using an electron beam evaporation process, sequentially depositing a TiNx top electrode 7 with a thickness of 20 nm and a tungsten top electrode 8 with a thickness of 30 nm around the tungsten pillar hard mask 5, respectively, and completely coating the SiOx cladding layer 6 and the SiOx insulating layer 2 therein;
in summary, the present embodiment provides a method for manufacturing a tungsten plug small electrode phase change memory device with a nanometer size. The advanced micro-area processing capability of the focused ion beam and the advantages of anisotropic reaction ion etching technology, high selection ratio and the like are adopted, the W electrode with the nanometer-scale diameter and the phase change memory device with the corresponding nanometer size are finely processed on the micro-nano scale, and the method can be used for constructing a novel phase change memory device with high density and low power consumption.
It will be appreciated that modifications and variations are possible to those skilled in the art in light of the above teachings, and it is intended to cover all such modifications and variations as fall within the scope of the appended claims.

Claims (12)

1. A preparation method of a tungsten plug small electrode phase change memory device with a nanometer size is characterized by comprising the following steps:
step 1: selecting a preprocessed silicon oxide substrate filled with a tungsten plug, etching the tungsten plug and silicon oxide at the periphery of the tungsten plug according to the etching rate difference of the silicon oxide and the tungsten plug, and etching a truncated cone-shaped tip with a small upper part and a big lower part at the top end of the tungsten plug to form a tungsten plug small electrode (1) with a nanometer size;
and 2, step: depositing a SiOx insulating layer (2) to fill the etched area around the small tungsten plug electrode (1) to a position higher than the small tungsten plug electrode (1);
and step 3: polishing the area around the small electrode (1) of the tungsten plug, and removing the redundant SiOx insulating layer (2) around the small electrode of the tungsten plug to obtain a flat surface, so that the top end of the small electrode (1) of the tungsten plug is flush with the surface of the SiOx insulating layer (2);
and 4, step 4: depositing a phase change material (3) and an electrode layer (4) above the small tungsten plug electrode (1) in sequence;
and 5: depositing a tungsten column hard mask (5) right above the small tungsten plug electrode (1);
step 6: etching the redundant phase change material (3) and TiNx electrode material (4) around the tungsten column hard mask (5) to expose the SiOx insulating layer (2) to form a nano-sized phase change memory device;
and 7: depositing a truncated cone-shaped SiOx coating layer (6) to completely coat the phase-change memory device;
and 8: etching the SiOx coating layer (6) on the surface of the tungsten column hard mask (5) until the tungsten column hard mask (5) is just exposed to form a clean surface;
and step 9: sequentially depositing a TiNx top electrode (7) and a tungsten top electrode (8) around the tungsten column hard mask (5) respectively, and completely coating the SiOx coating layer (6) and the SiOx insulating layer (2);
the diameter of the top of the truncated cone-shaped tip is smaller than 50 nanometers and larger than the diameter of the tungsten column hard mask (5).
2. The method according to claim 1, wherein in step 1, the tungsten plug and the silicon oxide around the tungsten plug are etched by focused ion beam etching, and the diameter of the tungsten plug is 100-200 nm.
3. The method according to claim 1, wherein in step 2, the SiOx insulating layer (2) is deposited by physical vapor deposition or chemical vapor deposition.
4. The method according to claim 1, wherein the SiOx insulating layer (2) in step 2 has a thickness of 100-300 nm.
5. The preparation method according to claim 1, characterized in that in step 3, the area around the tungsten plug small electrode (1) is polished by using a chemical mechanical polishing technique.
6. The preparation method according to claim 1, characterized in that in the step 4, ge with the thickness of 5-100 nm is sequentially deposited above the tungsten plug small electrode (1) by adopting a physical vapor deposition method 2 Sb 2 Te 5 A phase-change material (3) and a TiN electrode layer (4) with the thickness of 5-200 nanometers.
7. The preparation method according to claim 1, characterized in that in the step 5, a tungsten column hard mask (5) with a thickness of 10-100 nm and a diameter of 5-100 nm is deposited directly above the tungsten plug small electrode (1) by using a focused ion beam deposition technique.
8. The method according to claim 1, wherein in step 6, the SiOx insulating layer (2) is exposed by etching the excess phase change material (3) and the TiNx electrode material (4) around the tungsten pillar hard mask (5) by using a reactive ion etching technique.
9. The method according to claim 1, characterized in that in step 7, a truncated cone-shaped SiOx cladding layer (6) with a height of 10-300 nm is deposited by focused ion beam deposition.
10. The method according to claim 1, wherein in step 8, the SiOx cladding layer (6) on the surface of the tungsten pillar hard mask (5) is etched away by focused ion beam etching.
11. The method according to claim 1, wherein in the step 9, a TiNx top electrode (7) with a thickness of 20 nm and a tungsten top electrode (8) with a thickness of 30 nm are sequentially deposited around the tungsten pillar hard mask (5) by an electron beam evaporation process, and the SiOx cladding layer (6) and the SiOx insulating layer (2) are all clad.
12. The preparation method according to claim 1, wherein in the step 4, the phase-change material (3) is one or a mixture or a superposition of at least two of Ge2Sb2Te5, sb2Te3, geTe and Sb2Te, and the thickness is 5-100 nm.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101640251A (en) * 2008-09-27 2010-02-03 中国科学院上海微系统与信息技术研究所 Bottom electrode structural improvement of storage unit of phase-change memory and manufacturing implementation method
WO2016039694A1 (en) * 2014-09-12 2016-03-17 Agency For Science, Technology And Research Memory cell and method of forming the same

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TWI264087B (en) * 2005-12-21 2006-10-11 Ind Tech Res Inst Phase change memory cell and fabricating method thereof
CN101488555A (en) * 2009-02-10 2009-07-22 中国科学院上海微系统与信息技术研究所 Manufacturing method for low power consumption phase changing memory
TWI449170B (en) * 2009-12-29 2014-08-11 Ind Tech Res Inst Phase change memory devices and fabrication methods thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101640251A (en) * 2008-09-27 2010-02-03 中国科学院上海微系统与信息技术研究所 Bottom electrode structural improvement of storage unit of phase-change memory and manufacturing implementation method
WO2016039694A1 (en) * 2014-09-12 2016-03-17 Agency For Science, Technology And Research Memory cell and method of forming the same

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