CN112002773B - Large-area array infrared detector and chip low-stress cold head structure thereof - Google Patents

Large-area array infrared detector and chip low-stress cold head structure thereof Download PDF

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CN112002773B
CN112002773B CN202010871113.4A CN202010871113A CN112002773B CN 112002773 B CN112002773 B CN 112002773B CN 202010871113 A CN202010871113 A CN 202010871113A CN 112002773 B CN112002773 B CN 112002773B
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ceramic
layer
ceramic frame
chip
detector
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CN112002773A (en
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付志凯
张磊
吴卿
王成刚
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CETC 11 Research Institute
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/024Arrangements for cooling, heating, ventilating or temperature compensation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/09Devices sensitive to infrared, visible or ultraviolet radiation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by at least one potential-jump barrier or surface barrier, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation

Abstract

The invention discloses a large-area array infrared detector and a chip low-stress cold head structure thereof. Big area array infrared detector chip low stress cold head structure includes: a dewar cooling station; the ceramic structural member is bonded to the Dewar cold stage; at least one layer of ceramic frame, which is adhered to one side of the ceramic structural member far away from the Dewar cold stage; and the detector hybrid chip is adhered to one side of the at least one layer of ceramic frame, which is far away from the ceramic structural member. By adopting the invention, the cold head structure is optimized, so that the low-temperature stress of the whole structure is released, the low-temperature reliability of the detector chip is ensured, the problems that the large-area array detector chip is concentrated in thermal stress at low temperature and is easy to damage by temperature impact can be solved, and meanwhile, the frame is selected as an electrical transition structure, so that the electrical information extraction of the detector can be ensured.

Description

Large-area array infrared detector and chip low-stress cold head structure thereof
Technical Field
The invention relates to the field of infrared detectors, in particular to a large-area-array infrared detector and a chip low-stress cold head structure thereof.
Background
The refrigeration type infrared detector assembly is widely applied to infrared imaging systems and is a core component of various infrared test systems. With the rapid development of the refrigeration type infrared detector, the scale of the infrared detector is larger and larger, and is continuously improved from the traditional 320 × 256 scale, at present, large area-array detectors such as 1024 × 1024, 2048 × 2048 and the like have been implemented by engineering, and international advanced detector manufacturers have also implemented the production and application of 4096 × 4096 ultra-large area-array detectors. In the process of developing a large-area detector, the area array scale of the infrared focal plane detector is enlarged, a detector chip is easy to damage due to temperature impact, the performance of the detector is directly influenced, and even the detector is caused to lose efficacy, so that the problem which is urgently needed to be solved by a large-area detector production process is solved.
Disclosure of Invention
The embodiment of the invention provides a large-area array infrared detector and a chip low-stress cold head structure thereof, which are used for solving the problems that in the prior art, a large-area array detector chip is concentrated in thermal stress at low temperature and is easy to damage due to temperature impact.
The low-stress cold head structure of the large-area array infrared detector chip provided by the embodiment of the invention comprises the following components:
a dewar cooling station;
the ceramic structural part is bonded to the Dewar cold stage;
at least one layer of ceramic frame, which is adhered to one side of the ceramic structural component far away from the Dewar cold stage;
and the detector hybrid chip is bonded to one side of the at least one layer of ceramic frame, which is far away from the ceramic structural member.
According to some embodiments of the invention, the at least one ceramic frame comprises a first ceramic frame, a second ceramic frame, and a third ceramic frame, which are sequentially stacked, the first ceramic frame is bonded to the second ceramic frame, and the second ceramic frame is bonded to the third ceramic frame.
According to some embodiments of the present invention, the ceramic structural member includes a main body portion and a support portion, wherein the support portion is annular and externally sleeved on the main body portion;
the lower end of the main body part is bonded with the Dewar cold stage, and the upper end of the main body part is bonded with the second layer of ceramic frame;
the third layer of ceramic frame is annular and is sleeved outside the main body part, the upper surface of the third layer of ceramic frame is bonded with the second layer of ceramic frame, and the lower surface of the third layer of ceramic frame is bonded with the supporting part.
According to some embodiments of the invention, the detector is mixed into a chip with an area of 16mm × 12.8 mm.
According to some embodiments of the invention, the at least one ceramic frame and the ceramic structural member are both Al2O3A piece of material.
According to some embodiments of the invention, the at least one layer of ceramic frame comprises a fourth layer of ceramic frame;
big area array infrared detector chip low stress cold head structure still includes: a ceramic gasket;
the lower surface of the fourth layer of ceramic frame is bonded with the ceramic structural member, the upper surface of the fourth layer of ceramic frame is bonded with the lower surface of the ceramic gasket, and the upper surface of the ceramic gasket is bonded with the detector mixed chip.
According to some embodiments of the invention, the ceramic shim is a piece of SiC material;
the fourth layer of ceramic frame and the ceramic structural member are all AlN material pieces.
According to some embodiments of the invention, the detector hybrid chip has an area of 32mm by 25.6 mm.
According to some embodiments of the invention, the detector is a hybrid chip comprising:
a silicon readout circuit;
and the detector chip is interconnected with the silicon reading circuit through the indium columns and the glue.
The large-area array infrared detector according to the embodiment of the invention comprises: according to the large-area-array infrared detector chip low-stress cold head structure.
By adopting the embodiment of the invention, the cold head structure is optimized, so that the low-temperature stress of the whole structure is released, the low-temperature reliability of the detector chip is ensured, the problems that the large-area array detector chip is concentrated in thermal stress at low temperature and is easy to damage by temperature impact can be solved, and meanwhile, the frame is selected as an electrical transition structure, so that the electrical information extraction of the detector can be ensured.
The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. In the drawings:
FIG. 1 is a structural diagram of a low-stress cold head of a large-area array infrared detector chip in an embodiment of the invention;
FIG. 2 is a structural diagram of a low-stress cold head of a large-area array infrared detector chip in the embodiment of the invention.
Reference numerals:
a large-area array infrared detector chip low-stress cold head structure 1,
the detector is a hybrid chip 10 that is,
a first layer of ceramic frame 21, a second layer of ceramic frame 22, a third layer of ceramic frame 23, a fourth layer of ceramic frame 24,
a ceramic spacer 30 is provided on the outer surface of the ceramic spacer,
a ceramic structural member 40, a main body portion 41, a support portion 42,
a dewar cold plate 50.
Detailed Description
Exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the invention are shown in the drawings, it should be understood that the invention can be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
As shown in fig. 1-2, a low-stress cold head structure 1 of a large-area array infrared detector chip according to an embodiment of the present invention includes:
a dewar cold plate 50;
a ceramic structural member 40 bonded to the dewar cold stage 50;
at least one layer of ceramic frame, which is adhered to one side of the ceramic structural component 40 far away from the Dewar cold stage 50;
the detector hybrid chip 10 is bonded to the side of the at least one ceramic frame away from the ceramic structural member 40.
It can be understood that the ceramic structural member 40, the at least one layer of ceramic frame, and the detector hybrid chip 10 are sequentially stacked on the dewar cold stage 50, in other words, from top to bottom, the large-area-array infrared detector chip low-stress cold head structure 1 sequentially includes the detector hybrid chip 10, the at least one layer of ceramic frame, the ceramic structural member 40, and the dewar cold stage 50, and any two adjacent layers are connected to each other. Thermal stress caused by the mismatch of low temperature parameters can be relieved by at least one layer of ceramic frame, so that the thermal stress finally suffered by the detector hybrid chip 10 is relieved.
By adopting the embodiment of the invention, the cold head structure 1 is optimized, so that the low-temperature stress of the whole cold head structure 1 is released, the low-temperature reliability of the detector chip is ensured, the problems that the large-area array detector chip is concentrated in thermal stress at low temperature and is easy to damage by temperature impact can be solved, and meanwhile, the ceramic frame is selected as an electrical transition structure, so that the electrical information extraction of the detector can be ensured.
On the basis of the above-described embodiment, various modified embodiments are further proposed, and it is to be noted herein that, in order to make the description brief, only the differences from the above-described embodiment are described in the various modified embodiments.
As shown in fig. 1, according to some embodiments of the present invention, the at least one ceramic frame includes a first ceramic frame 21, a second ceramic frame 22, and a third ceramic frame 23 sequentially stacked, the first ceramic frame 21 is bonded to the second ceramic frame 22, and the second ceramic frame 22 is bonded to the third ceramic frame 23.
In the process of refrigeration, cold energy is conducted to the detector hybrid chip 10 through the Dewar cold stage 50, the ceramic structural member 40, the third ceramic frame 23, the second ceramic frame 22 and the first ceramic frame 21, and in the process of conduction, the first ceramic frame 21, the second ceramic frame 22 and the third ceramic frame 23 expand and contract to generate thermal stress, but due to mutual action, the internal stress is mutually restricted and released, so that the thermal stress finally received by the detector hybrid chip 10 is relieved.
As shown in fig. 1, according to some embodiments of the present invention, the ceramic structural member 40 includes a main body portion 41 and a supporting portion 42, wherein the supporting portion 42 is annular and is externally sleeved on the main body portion 41;
the lower end of the main body part 41 is bonded with the Dewar cold stage 50, and the upper end of the main body part 41 is bonded with the second layer ceramic frame 22;
the third ceramic frame 23 is annularly and externally sleeved on the main body portion 41, an upper surface of the third ceramic frame 23 is bonded to the second ceramic frame 22, and a lower surface of the third ceramic frame 23 is bonded to the support portion 42.
As shown in fig. 1, in some embodiments of the present invention, the support portion 42 is located at a middle region of the main body portion 41.
According to some embodiments of the present invention, the area of the detector hybrid chip 10 is 16mm by 12.8 mm.
According to some embodiments of the present invention, at least one of the ceramic frame and the ceramic structural member 40 is Al2O3A piece of material.
As shown in fig. 2, according to some embodiments of the present invention, the at least one layer of ceramic frame includes a fourth layer of ceramic frame 24;
big area array infrared detector chip low stress cold head structure 1 still includes: a ceramic gasket 30;
the lower surface of the fourth layer of ceramic frame 24 is bonded with the ceramic structural member 40, the upper surface of the fourth layer of ceramic frame 24 is bonded with the lower surface of the ceramic gasket 30, and the upper surface of the ceramic gasket 30 is bonded with the detector hybrid chip 10.
It can be understood that, from top to bottom, the large-array infrared detector chip low-stress cold head structure 1 sequentially comprises: a detector hybrid chip 10, a ceramic spacer 30, a fourth layer ceramic frame 24, a ceramic structural member 40, and a dewar cold plate 50.
According to some embodiments of the invention, the ceramic shim 30 is a piece of SiC material;
the fourth ceramic frame 24 and the ceramic structural member 40 are each an AlN material.
According to some embodiments of the present invention, the area of the detector hybrid chip 10 is 32mm × 25.6 mm.
According to some embodiments of the present invention, a detector-hybrid chip 10 includes:
a silicon readout circuit;
and the detector chip is interconnected with the silicon reading circuit through the indium columns and the glue.
The large-area array infrared detector according to the embodiment of the invention comprises: the large-area array infrared detector chip low-stress cold head structure 1 is described above.
By adopting the embodiment of the invention, the cold head structure is optimized, so that the low-temperature stress of the whole structure is released, the low-temperature reliability of the detector chip is ensured, the problems that the large-area array detector chip is concentrated in thermal stress at low temperature and is easy to damage by temperature impact can be solved, and meanwhile, the frame is selected as an electrical transition structure, so that the electrical information extraction of the detector can be ensured.
The large-area array infrared detector chip low-stress cold head structure 1 according to the embodiment of the invention is described in detail in two specific embodiments with reference to fig. 1 and fig. 2. It is to be understood that the following description is illustrative only and is not intended to be in any way limiting. All similar structures and similar variations thereof adopted by the invention are intended to fall within the scope of the invention.
The chip cold head structure of the conventional infrared detector comprises a Dewar cold stage, a single-layer frame, a detector mixed chip and the like. The detector hybrid chip is formed by interconnecting the detector chip and a silicon reading circuit through indium columns and filling low-temperature glue in the middle gap. The detector hybrid chip is bonded on the single-layer frame, and the single-layer frame is directly bonded on the Dewar cold stage. When the detector works at low temperature, due to the fact that the low-temperature parameters of the materials of the cold head structure are different, such as the linear expansion coefficient, the Young modulus and the like, the cold head structure expands or contracts at low temperature to different degrees, the cold head composition structure is limited by internal and external comprehensive constraints, large internal stress is generated, the mismatch phenomenon at low temperature is shown, the phenomenon easily causes damage such as cracks of the detector chip, and the like, and the damage is one of main reasons for causing the detector chip to lose efficacy. The larger the detector area array size is, the more obvious the thermal mismatch phenomenon is.
Based on this, an embodiment of the present invention provides a large-area array infrared detector chip low-stress cold head structure 1, as shown in fig. 1, including: the detector is composed of a chip 10, a first layer of ceramic frame 21, a second layer of ceramic frame 22, a third layer of ceramic frame 23, a ceramic structural member 40 and a Dewar cold stage 50. The silicon readout circuit and the detector chip are interconnected by indium columns and glue to form a detector hybrid chip 10, which receives optical signals to complete photoelectric conversion.
As shown in fig. 1, the ceramic structural member 40 is adhered to the dewar cold stage 50 by using low-temperature glue, the third ceramic frame 23 is adhered to the supporting portion 42 of the ceramic structural member 40 by using low-temperature glue, the second ceramic frame 22 is adhered to the main body portion 41 of the ceramic structural member 40 by using low-temperature glue, the first ceramic frame 21 is adhered to the second ceramic frame 22 by using low-temperature glue, and the detector hybrid chip 10 is adhered to the first ceramic frame 21 by using low-temperature glue. All ceramic frames and ceramic structural members 40 are made of Al2O3A piece of material. And a lead is welded between the second layer of ceramic frame 22 and a silicon reading circuit in the detector hybrid chip 10, a lead is welded between the second layer of ceramic frame 22 and the third layer of ceramic frame 23, a lead is welded between the third layer of ceramic frame 23 and the Dewar cold stage 50, and signals of the detector chip are led out to the outside of the Dewar cold stage 50 through multiple transitions. The detector chip size is 16mm by 12.8 mm.
When the detector chip works, the refrigerating machine provides cold energy for the detector chip, the cold energy is conducted to the detector chip through the Dewar cold stage 50, the ceramic structural member 40, the multilayer ceramic framework and the silicon reading circuit, in the conducting process, the multilayer ceramic framework expands and contracts to generate thermal stress, but due to interaction, the internal stress is mutually restricted and released, so that the thermal stress finally received by the detector chip is relieved.
Through structural analysis by adopting simulation software, the thermal stress of the detector chip is 146Mpa, the deformation of the detector chip is 16.4 μm, the thermal stress (112.5Mpa) of the detector chip in the embodiment of the invention is increased by about 22% compared with the thermal stress of the detector chip in the related technology, the deformation (12.5 μm) of the detector chip in the related technology is increased by 23%, and the situation of fold increase is not generated, thereby showing the effectiveness of the embodiment.
By adopting the embodiment of the invention, the multilayer ceramic frame is designed, and the low temperature of the whole structure is ensured by optimizing the structure and the size of the cold headThe force is released to ensure the low-temperature reliability of the detector chip, meanwhile, the multilayer ceramic frame is used as an electrical transition structure to ensure the electrical signal extraction of the detector, and the multilayer ceramic frame and the ceramic structural member 40 are made of Al2O3The material guarantees cold head structural heat conductivity, and structural design is compact, and the material chooses for use rationally, is convenient for assemble, has high reliability.
The second embodiment of the present invention also provides a large-area array infrared detector chip low-stress cold head structure 1, as shown in fig. 2, including: the detector hybrid chip 10, the ceramic spacer 30, the fourth layer ceramic frame 24, the ceramic structural member 40 and the dewar cold stage 50. The silicon readout circuit and the detector chip are interconnected by indium columns and glue to form a detector hybrid chip 10, which receives optical signals to complete photoelectric conversion.
Ceramic structure 40 adopts the low temperature glue to connect on dewar cold plate 50, and fourth layer ceramic frame 24 adopts the low temperature glue to connect on ceramic structure 40, and ceramic gasket 30 adopts the low temperature glue to connect on fourth layer ceramic frame 24, and detector thoughtlessly becomes chip 10 and adopts the low temperature glue to connect on ceramic gasket 30. The ceramic gasket 30 is made of a SiC material, the fourth-layer ceramic frame 24 is made of an AlN material, and the ceramic structural member 40 is made of an AlN material. The detector chip size is up to 32mm by 25.6 mm.
When the detector chip works, the refrigerator provides cold energy for the detector chip, the cold energy is conducted to the detector chip through the Dewar cold stage 50, the ceramic structural member 40, the fourth layer of ceramic frame 24, the ceramic gasket 30 and the silicon reading circuit, in the conducting process, the fourth layer of ceramic frame 24 and the ceramic gasket 30 expand and contract to generate thermal stress, but due to interaction, the internal stress is mutually restricted and released, so that the thermal stress finally borne by the detector chip is relieved.
Through structural analysis by adopting simulation software, the thermal stress of the detector chip is 54.2Mpa, the deformation of the detector chip is 7 microns, and the thermal stress (146Mpa) and the deformation (16.4 microns) of the detector chip in the first embodiment are reduced, so that the effectiveness of the embodiment of the invention is shown.
By adopting the embodiment of the invention, the low-temperature thermal stress of the cold head is released, and the constituent materials of the cold head are adjusted, so that the constituent materials are more matched at a low temperature, and the thermal stress of the detector chip is reduced. The ceramic frame is used as an electrical transition substrate and is mixed with a detector to form a welding lead between a reading circuit in the chip 10, and an electrical signal is led out of the Dewar through the welding lead between the ceramic frame and the Dewar.
It should be noted that the above-mentioned embodiments are only preferred embodiments of the present invention, and are not intended to limit the present invention, and those skilled in the art can make various modifications and changes. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Furthermore, references to the description of the terms "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," or the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Although some embodiments described herein include some features included in other embodiments instead of others, combinations of features of different embodiments are meant to be within the scope of the invention and form different embodiments. The particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. For example, in the claims, any of the claimed embodiments may be used in any combination.
While embodiments of the invention have been shown and described, it will be understood by those of ordinary skill in the art that: various changes, modifications, substitutions and alterations can be made to the embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims (8)

1. The utility model provides a big array infrared detector chip low stress cold head structure which characterized in that includes:
a dewar cooling station;
the ceramic structural part is bonded to the Dewar cold stage;
at least one layer of ceramic frame, which is adhered to one side of the ceramic structural component far away from the Dewar cold stage;
the detector hybrid chip is bonded to one side, away from the ceramic structural component, of the at least one layer of ceramic frame;
the at least one layer of ceramic frame comprises a first layer of ceramic frame, a second layer of ceramic frame and a third layer of ceramic frame which are sequentially stacked, wherein the first layer of ceramic frame is bonded with the second layer of ceramic frame, and the second layer of ceramic frame is bonded with the third layer of ceramic frame;
the ceramic structural part comprises a main body part and a supporting part, wherein the supporting part is annular and is sleeved outside the main body part;
the lower end of the main body part is bonded with the Dewar cold stage, and the upper end of the main body part is bonded with the second layer of ceramic frame;
the third layer of ceramic frame is annular and is sleeved outside the main body part, the upper surface of the third layer of ceramic frame is bonded with the second layer of ceramic frame, and the lower surface of the third layer of ceramic frame is bonded with the supporting part.
2. The large-area array infrared detector chip low-stress cold head structure as claimed in claim 1, wherein the area of the detector mixed chip is 16mm x 12.8 mm.
3. The large-area-array infrared detector chip low-stress cold head structure as claimed in any one of claims 1-2, wherein the at least one ceramic frame and the ceramic structural member are both Al2O3A piece of material.
4. The large-area array infrared detector chip low stress cold head structure as claimed in claim 1, wherein said at least one ceramic frame comprises a fourth ceramic frame;
big area array infrared detector chip low stress cold head structure still includes: a ceramic gasket;
the lower surface of the fourth layer of ceramic frame is bonded with the ceramic structural member, the upper surface of the fourth layer of ceramic frame is bonded with the lower surface of the ceramic gasket, and the upper surface of the ceramic gasket is bonded with the detector mixed chip.
5. The large-area array infrared detector chip low-stress cold head structure as claimed in claim 4, characterized in that said ceramic spacer is a SiC material;
the fourth layer of ceramic frame and the ceramic structural member are all AlN material pieces.
6. The large-area array infrared detector chip low-stress cold head structure as claimed in claim 5, wherein the area of the detector hybrid chip is 32mm x 25.6 mm.
7. The large-area array infrared detector chip low-stress cold head structure as claimed in claim 1, wherein the detector is a hybrid chip comprising:
a silicon readout circuit;
and the detector chip is interconnected with the silicon reading circuit through the indium columns and the glue.
8. A large-area array infrared detector is characterized by comprising: the large-area array infrared detector chip low-stress cold head structure according to any one of claims 1 to 7.
CN202010871113.4A 2020-08-26 2020-08-26 Large-area array infrared detector and chip low-stress cold head structure thereof Active CN112002773B (en)

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红外探测器封装陶瓷衬底材料特性及其应用研究;王玉龙等;《激光与红外》;20180531;第48卷(第5期);第2-4部分,图5 *

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