CN111953209B - Switch type converter and control circuit and control method thereof - Google Patents
Switch type converter and control circuit and control method thereof Download PDFInfo
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- CN111953209B CN111953209B CN202010789837.4A CN202010789837A CN111953209B CN 111953209 B CN111953209 B CN 111953209B CN 202010789837 A CN202010789837 A CN 202010789837A CN 111953209 B CN111953209 B CN 111953209B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
Abstract
The operating mode of the switch type converter under light load is controlled according to the magnitude of the input voltage of the switch type converter, so that the switch type converter is switched between a forced continuous conduction mode and an interrupted conduction mode, and the phenomenon that the input voltage is increased and devices are damaged due to the fact that energy on an output capacitor flows back into the input voltage when the switch type converter works in the forced continuous conduction mode for a long time is avoided.
Description
Technical Field
The invention relates to the technical field of power electronics, in particular to a switch-type converter and a control circuit and a control method thereof.
Background
In a DC/DC switching converter, when the output load is light load or even no load, the converter is usually controlled to operate in a Forced Continuous Conduction Mode (FCCM) to reduce the output voltage ripple, but in the FCCM mode, the energy on the output capacitor flows back to the input terminal, which causes the input voltage to increase, and the device is damaged.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a switching type converter, a control circuit and a control method thereof, which control an operating mode of the switching type converter under a light load according to a magnitude of an input voltage of the switching type converter, so as to switch between a forced continuous conduction mode and an interrupted conduction mode, thereby preventing the input voltage from being increased and devices from being damaged due to energy on an output capacitor from flowing back into the input voltage when the switching type converter operates in the forced continuous conduction mode for a long time.
According to a first aspect of the present invention, there is provided a control circuit for a switch-type converter, wherein the switch-type converter comprises a main power transistor and a synchronous power transistor, the control circuit being configured to switch an operation mode of the switch-type converter according to a change of an input voltage to control a state of an inductor current so as to avoid an excessively high input voltage.
Preferably, the control circuit is configured to control the switching type converter to switch between a forced continuous conduction mode and an interrupted conduction mode.
Preferably, the control circuit includes:
an indication signal generating circuit configured to generate an indication signal representing the change of the input voltage to control the switch-type converter to switch an operation mode; and
and the driving control circuit is configured to control the switch-type converter to switch the working mode according to the indication signal and generate a corresponding driving signal to control the switching state of a power tube in the switch-type converter.
Preferably, after the input voltage is greater than a first threshold value, the synchronous power tube is controlled to be turned off when the inductive current crosses zero according to the indication signal, so that the switch-type converter enters an intermittent conduction mode.
Preferably, after the input voltage is smaller than a second threshold, the synchronous power tube is controlled according to the indication signal to make the inductor current continuous, so that the switch-type converter enters a forced continuous conduction mode, wherein the first threshold is larger than the second threshold.
Preferably, the drive control circuit includes:
a zero-crossing control circuit configured to generate a zero-crossing turn-off signal according to the indication signal to decide whether to turn off the synchronous power tube when the inductive current crosses zero; and
and the drive generation circuit is configured to receive the zero-crossing turn-off signal and generate drive signals of the main power tube and the synchronous power tube.
Preferably, the zero-cross control circuit includes:
a threshold generation circuit configured to be controlled by the indication signal to generate different zero-crossing comparison thresholds;
a zero-crossing comparison circuit configured to compare a voltage across the synchronous power tube to the zero-crossing comparison threshold to generate the zero-crossing shutdown signal.
Preferably, the threshold generation circuit is configured to control the zero-crossing comparison threshold to be equal to zero after the input voltage is greater than a first threshold; and when the input voltage is smaller than a second threshold value, controlling the zero-crossing comparison threshold value to be larger than the maximum conduction voltage drop of the synchronous power tube when the inductive current is smaller than zero.
Preferably, the drive generation circuit includes:
a first drive generation circuit configured to generate a drive signal of the main power transistor according to an output signal of the switching type converter and a rated reference value; and
and the second drive generation circuit is configured to generate a drive signal of the synchronous power tube according to the zero-crossing turn-off signal and the drive signal of the main power tube.
Preferably, the second drive generation circuit is configured to control the drive signal of the synchronous power tube to be active when the drive signal of the main power tube is inactive, and to control the synchronous power tube to be turned off when the inductor current crosses zero when the zero-cross turn-off signal is active; when the zero-crossing turn-off signal is invalid, the second drive generation circuit controls the synchronous power tube to be in complementary conduction with the main power tube.
Preferably, the second drive generation circuit is further configured to control the synchronous power tube to be turned off according to a signal which is preferentially valid in both a clock signal and the zero-crossing turn-off signal, wherein a time when the clock signal is invalid corresponds to a turn-on time of the main power tube.
Preferably, the threshold generation circuit includes:
a first RS trigger configured to output an active overvoltage control signal after the input voltage is greater than a first threshold value and output an inactive overvoltage control signal after the input voltage is less than a second threshold value; and
the charging circuit comprises a capacitor and a control circuit, wherein the capacitor is configured to control the capacitor to release energy when the overvoltage control signal is effective, so that the voltage on the capacitor is zero and serves as the zero-crossing comparison threshold; and when the overvoltage control signal is invalid, controlling the capacitor to charge so that the voltage on the capacitor rises to a third threshold value as the zero-crossing comparison threshold value, wherein the third threshold value is larger than the maximum conduction voltage drop of the synchronous power tube when the inductive current is smaller than zero.
Preferably, the second drive generation circuit includes:
a second RS flip-flop configured to output a driving signal of the synchronous power transistor;
the first logic circuit is configured to generate a set signal to the second RS trigger when the driving signal of the main power tube is invalid; and
and the second logic circuit comprises an OR gate, and the OR gate receives the clock signal and the zero-crossing shutdown signal and outputs a reset signal to the second RS trigger.
According to a second aspect of the present invention, there is provided a switching converter comprising:
a main power circuit, comprising: the synchronous power circuit comprises a main power tube, a synchronous power tube and an inductor; and
a control circuit as described above.
According to a third aspect of the present invention, there is provided a control method for a switching converter, comprising:
detecting an input voltage of the switching converter; and
and controlling the switch type converter to switch between a forced continuous conduction mode and an interrupted conduction mode according to the change of the input voltage so as to control the state of the inductive current, thereby avoiding overvoltage of the input voltage.
Preferably, the control method further includes:
comparing an input voltage of the switching converter with a first threshold value and a second threshold value, respectively;
when the input voltage is larger than the first threshold value, controlling synchronous power tubes in the switch-type converter to be turned off when the inductive current crosses zero, so that the switch-type converter enters the discontinuous conduction mode; and
when the input voltage is smaller than the second threshold value, the synchronous power tube is controlled to enable the inductor current to be continuous, so that the switch type converter enters the forced continuous conduction mode.
Preferably, the control method further includes:
generating different zero-crossing comparison thresholds according to the change of the input voltage;
detecting the voltage at two ends of the synchronous tube during the conduction period of the synchronous tube; and
and comparing the voltage at two ends of the synchronous power tube with the zero-crossing comparison threshold value to generate a zero-crossing turn-off signal.
Preferably, generating different zero-crossing comparison thresholds according to the variation of the input voltage comprises:
controlling the zero-crossing comparison threshold to be equal to zero when the input voltage is greater than the first threshold; and when the input voltage is smaller than the second threshold, controlling the zero-crossing comparison threshold to rise to a third threshold, wherein the third threshold is larger than the maximum conduction voltage drop of the synchronous power tube when the inductive current is smaller than zero.
Preferably, the control method further includes:
and controlling the synchronous power tube to be turned off according to a signal which is preferentially effective in the zero-crossing turn-off signal and the clock signal, wherein the invalid time of the clock signal corresponds to the turn-on time of the main power tube.
Preferably, the control method further includes:
when the zero-crossing comparison threshold value is equal to zero, the zero-crossing turn-off signal is effective when the inductor current passes through zero so as to control the synchronous power tube to be turned off; and
when the zero-crossing comparison threshold value is equal to the third threshold value, the zero-crossing shutdown signal is invalid, and the synchronous power tube is controlled by the clock signal to be shut down.
In summary, in the embodiment of the present invention, the control circuit controls the operating mode of the switch-type converter under light load according to the magnitude of the input voltage of the switch-type converter, so as to switch between the forced continuous conduction mode and the discontinuous conduction mode, thereby preventing the input voltage from rising and damaging the device due to energy on the output capacitor flowing back into the input voltage when the switch-type converter operates in the forced continuous conduction mode for a long time.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of the embodiments of the present invention with reference to the accompanying drawings, in which:
FIG. 1 is a circuit diagram of a switch mode converter according to an embodiment of the present invention;
fig. 2 is a block diagram of a control circuit of a switching type converter according to an embodiment of the present invention;
fig. 3 is a specific circuit diagram of a zero-crossing control circuit in the control circuit of the switching type converter according to the embodiment of the present invention;
fig. 4 is a specific circuit diagram of a drive generation circuit in the control circuit of the switching type converter according to the embodiment of the present invention;
FIG. 5 is a waveform diagram illustrating the operation of a switch-mode converter according to an embodiment of the present invention; and
fig. 6 is a flowchart of a control method of a switching converter according to an embodiment of the present invention.
Detailed Description
The present invention will be described below based on examples, but the present invention is not limited to only these examples. In the following detailed description of the present invention, certain specific details are set forth. It will be apparent to one skilled in the art that the present invention may be practiced without these specific details. Well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the present invention.
Further, those of ordinary skill in the art will appreciate that the drawings provided herein are for illustrative purposes and are not necessarily drawn to scale.
Meanwhile, it should be understood that, in the following description, a "circuit" refers to a conductive loop constituted by at least one element or sub-circuit through electrical or electromagnetic connection. When an element or circuit is referred to as being "connected to" another element or element/circuit is referred to as being "connected between" two nodes, it may be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled" or "directly connected" to another element, it is intended that there are no intervening elements present.
Unless the context clearly requires otherwise, throughout the description and the claims, the words "comprise", "comprising", and the like are to be construed in an inclusive sense as opposed to an exclusive or exhaustive sense; that is, what is meant is "including, but not limited to".
In the description of the present invention, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In addition, in the description of the present invention, "a plurality" means two or more unless otherwise specified.
Fig. 1 is a circuit diagram of a switching type converter according to an embodiment of the present invention. As shown in fig. 1, the buck converter will be described as an example. It should be understood that other topologies, such as boost or buck-boost, may be suitable for use in the present invention. The buck converter comprises a main power tube Q1, a synchronous power tube Q2 and an inductor L, wherein the main power tube Q1 and the synchronous power tube Q2 both adopt MOSFETs and are respectively provided with parasitic body diodes D1 and D2. Under light load, the buck converter has two working modes: forced Continuous Conduction Mode (FCCM) and Discontinuous Conduction Mode (DCM). In DCM, synchronous power transistor Q2 turns off when inductor current iL freewheels through body diode D2 to zero. In FCCM mode, when inductor current iL freewheels to zero, synchronous power transistor Q2 is not controlled to turn off, but instead is turned on complementary to main power transistor Q1, thereby allowing inductor current to continue. Of course, a dead time needs to be set between the driving signals of the main power transistor Q1 and the synchronous power transistor Q2 to prevent shoot-through. Therefore, after the inductor current iL decreases to zero, it flows in the reverse direction through the synchronous power transistor Q2, and the output capacitor Co discharges energy. When the synchronous power transistor Q2 is turned off, the inductor current iL flows through the main power transistor Q1, so that the energy of the output capacitor Co flows back to the input terminal, and the input voltage Vin is increased. Therefore, the control circuit controls the working mode of the buck converter according to the change of the input voltage Vin, so that the buck converter is switched between the FCCM mode and the DCM mode, and the problem of overvoltage of the input voltage is solved under the condition that the buck converter is not required to be shut down and restarted.
Specifically, the control circuit includes an instruction signal generation circuit 1 and a drive control circuit 2. The indication signal generating circuit 1 is used for generating indication signals m1 and m2 representing the change of the input voltage Vin, thereby controlling the switch-type converter to switch the working mode. The drive control circuit 2 is configured to switch the operation mode of the switch-type converter according to the indication signals m1 and m2, and generate corresponding drive signals Vgs1 and Vgs2 to control the switching state of the power tubes in the switch-type converter.
Specifically, the drive control circuit 2 includes a zero-cross control circuit 21 and a drive generation circuit 22. The zero-crossing control circuit 21 is configured to generate a zero-crossing turn-off signal Vz according to states of the indication signals m1 and m2 to determine whether the synchronous power tube Q2 turns off when the inductor current iL crosses zero. When the indication signal m1 is valid, the zero-crossing turn-off signal Vz output by the zero-crossing control circuit 21 is used for controlling the synchronous power tube Q2 to turn off when the inductive current crosses zero, so that the converter is switched to the DCM mode to operate; when the indication signal m2 is valid, the zero-crossing turn-off signal Vz output by the zero-crossing control circuit 2 is invalid to control the synchronous power tube Q2 and the main power tube Q1 to be in complementary conduction, that is, the synchronous power tube Q2 keeps a conduction state until the main power tube Q1 is turned off before being conducted again, so that the inductor current is continuous, and the converter is switched to the FCCM mode to operate. In the present embodiment, the zero-cross control circuit 21 detects the voltage Vlx (i.e., the voltage at the midpoint LX) across the sync power transistor Q2 during the on period of the sync power transistor Q2 to determine the zero-cross time of the inductor current iL, thereby implementing the control of the zero-cross turn-off. It should be understood that the zero-crossing control circuit may also adopt other manners to realize the control of turning off the synchronous power tube when the inductive current crosses zero.
Further, the drive generation circuit 22 is configured to generate a drive signal Vgs1 that controls the main power transistor Q1 and to generate a drive signal Vgs2 that controls the synchronous power transistor Q2 in accordance with the zero-cross off signal Vz.
Fig. 2 shows a circuit diagram of a control circuit according to an embodiment of the invention. As shown, the indication signal generating circuit 1 includes a comparator COM1 and a COM2, wherein the comparator COM1 is used for comparing the input voltage Vin with a first threshold value Vref1, when the input voltage Vin exceeds the first threshold value Vref1, the input voltage of the buck converter is over-voltage at this time, and therefore the output indication signal m1 is valid to control the buck converter to switch to the DCM mode. The comparator COM2 is used for comparing the input voltage Vin with the second threshold Vref2, and since the energy cannot flow backward in the DCM mode, the input voltage Vin will gradually decrease, and when the input voltage Vin decreases to be less than the second threshold Vref2, the indication signal m2 output by the comparator COM2 is valid, so as to control the buck converter to switch back to the FCCM mode.
The zero-cross control circuit 21 includes a threshold value generation circuit 211 and a zero-cross comparison circuit 212. Specifically, the threshold generation circuit 211 is configured to receive the indication signal m1 and the indication signal m2 to generate different zero-cross comparison threshold Vth to the zero-cross comparison circuit 22 according to the variation of the input voltage Vin, thereby switching the operation mode of the converter. In the present embodiment, after the input voltage Vin is greater than the first threshold Vref1, in order to operate the converter in the DCM mode, the zero-cross comparison threshold Vth is controlled to be equal to zero; when the input voltage Vin is smaller than the second threshold Vref2, in order to make the converter enter the FCCM mode, the zero-crossing comparison threshold Vth is controlled to be a third threshold, where the third threshold is larger than the maximum conduction voltage drop of the synchronous power tube Q2 when the inductor current is smaller than zero, that is, when the zero-crossing of the inductor current iL is reversed, the maximum value of the absolute value iLmax is multiplied by the on-state resistance Rds _ on of the synchronous power tube Q2 (| iLmax | Rds _ on). Meanwhile, the zero-cross comparison circuit 212 generates a zero-cross shutdown signal Vz by comparing the voltage Vlx across the synchronous power tube Q2 with a zero-cross comparison threshold Vth.
The drive generation circuit 22 includes a first drive generation circuit 221 to generate a drive signal Vgs1 of the main power transistor Q1, and a second drive generation circuit 222 to generate a drive signal Vgs2 of the synchronous power transistor Q2. It should be appreciated that the driving signal Vgs1 of the main power transistor Q1 can be generated by any known control method and will not be described in detail herein. The second drive generation circuit 222 is configured to generate the drive signal Vgs2 of the synchronous power transistor Q2 from the zero-cross shutdown signal Vz and the drive signal Vgs1 of the main power transistor Q1. Specifically, the second drive generation circuit 222 controls the drive signal Vgs2 to be active when the drive signal Vgs1 is inactive to turn on the synchronous power transistor Q2; meanwhile, the turn-off time of the synchronous power tube Q2 is controlled according to the zero-crossing control signal Vz. When the zero-crossing turn-off signal Vz is valid, the second drive generation circuit 222 controls the synchronous power tube Q2 to turn off when the inductor current crosses zero; when the zero-cross turn-off signal Vz is inactive, the second drive generation circuit 32 controls the synchronous power tube Q2 to conduct complementarily with the main power tube Q1, so that the inductor current is continuous.
Fig. 3 is a specific circuit diagram of a zero-crossing control circuit in the control circuit according to the embodiment of the present invention. As shown, the threshold generating circuit 31 in the zero-crossing control circuit includes a first RS flip-flop U1 and a charging circuit. In this embodiment, the set terminal S of the first RS flip-flop U1 receives the indication signal m1, the reset terminal R receives the indication signal m2, and the output terminal Q outputs the over-voltage control signal VIN _ OVP. In the embodiment, after the input voltage Vin exceeds the first threshold Vref1, the over-voltage control signal Vin _ OVP is asserted; when the input voltage Vin is less than the second threshold Vref2, the over-voltage control signal Vin _ OVP is disabled.
The charging circuit comprises a capacitor Cz, so that when the overvoltage control signal VIN _ OVP is active, the capacitor Cz discharges to make the voltage on the capacitor Cz zero; when the over-voltage control signal VIN _ OVP is inactive, the voltage on the capacitor Cz is caused to rise to the third threshold value, thereby ensuring that the voltage Vlx is less than the third threshold value. It should be understood that the voltage on the capacitor Cz is the zero-crossing comparison threshold Vth. In this embodiment, the charging circuit further includes a current source Iz and a switching tube S. The capacitor Cz is connected in parallel with the switching tube S, and the switching state of the switching tube S is controlled by the overvoltage control signal VIN _ OVP. Further, the zero-crossing comparison circuit 32 in the zero-crossing control circuit 3 includes a comparator COM3, a first input terminal (i.e., non-inverting input terminal) of which receives the voltage Vlx, a second input terminal (i.e., inverting input terminal) of which receives the zero-crossing comparison threshold Vth, and an output terminal of which outputs the zero-crossing control signal Vz.
During the FCCM mode, when the input voltage Vin is greater than the first threshold Vref1, the indication signal m1 is asserted, i.e., the set terminal of the RS flip-flop is asserted, and thus the over-voltage control signal Vin _ OVP is asserted. After that, the switching tube S is controlled to be conducted, and the capacitor Cz is discharged to zero through the switching tube S, so that the zero-crossing comparison threshold Vth is zero. Thereafter, when the inductor current iL flows through the synchronous power tube Q2 in the reverse direction, the voltage Vlx is greater than zero, so that the zero-crossing shutdown signal Vz output by the comparator COM3 is asserted to turn off the synchronous power tube Q2. Therefore, the circuit is switched to the DCM mode operation, and the synchronous power tube Q2 is controlled to turn off when the inductor current iL crosses zero.
When the input voltage Vin drops to be less than the second threshold Vref2, the indication signal m2 is asserted, i.e., the reset terminal of the RS flip-flop is asserted, so the over-voltage control signal Vin _ OVP is de-asserted to turn off the switch tube S. Thereafter the current source Iz charges the capacitance Cz such that the zero crossing comparison threshold Vth gradually increases. When the zero-cross comparison threshold Vth rises to the third threshold, the voltage Vlx is smaller than the zero-cross comparison threshold Vth during the conduction period of the synchronous power tube Q2, so the zero-cross shutdown signal Vz is always inactive.
It should be understood that the circuit structure of the threshold generation circuit is not limited thereto, and any circuit having a function of generating different zero-crossing comparison thresholds in the DCM and FCCM modes, respectively, is within the scope of the present invention.
Fig. 4 is a circuit diagram of a driving generation circuit according to an embodiment of the invention. As described above, the first drive generation circuit 41 may generate the drive signal Vgs1 using any of the known drive circuits. In the present embodiment, the driving signal Vgs1 of the main power transistor Q1 is generated by PWM control and controlled at a constant switching frequency according to the feedback signal of the output voltage Vout and the error of the rated reference value. The second drive generation circuit 42 generates the drive signal Vgs2 from the clock signal CLK, the drive signal Vgs1, and the zero-cross off signal Vz. Further, the second drive generation circuit 42 is configured to control the synchronous power transistor Q2 to be turned on when the drive signal Vgs1 of the main power transistor Q1 is inactive, and to control the synchronous power transistor Q2 to be turned off according to a signal which is preferentially active of both the clock signal CLK and the zero-cross off signal Vz. Here, the frequency of the clock signal CLK is the same as the switching frequency of the main power transistor Q1, and the invalid time of the clock signal CLK corresponds to the on time of the main power transistor, so that the complementary conduction between the synchronous power transistor and the main power transistor is realized. Further, the driving signal Vgs1 of the main power transistor Q1 is active on the falling edge of the clock signal CLK (without regard to dead time).
Specifically, the second drive generation circuit 42 includes a first logic circuit 421, a second logic circuit 422, and a second RS flip-flop U2. The first logic circuit 421 is configured to generate the set signal set when the driving signal Vgs1 is inactive, so as to control the synchronous power transistor Q2 to be turned on. The second logic circuit 322 generates the reset signal rst according to the priority valid signal of the clock signal CLK and the zero-crossing off signal Vz to control the synchronous power transistor Q2 to turn off. Specifically, the first logic circuit 321 includes an inverter and a one-pulse flip-flop Oneshot1, the inverter inverts the driving signal Vgs1 and inputs the inverted driving signal to the one-pulse flip-flop Oneshot1, so that when the driving signal Vgs1 is inactive, an active set signal set is output to trigger the second RS flip-flop U2 to set, and thus the generated driving signal Vgs2 is active. The second logic circuit 322 includes an or gate and a one-pulse flip-flop Oneshot2, wherein an input end of the or gate receives a zero-crossing turn-off signal Vz and a clock signal CLK, and in a switching period, if the zero-crossing turn-off signal Vz is firstly valid, a valid reset signal rst is generated to trigger the second RS flip-flop U2 to reset after passing through the one-pulse flip-flop Oneshot2, so that the generated driving signal Vgs2 is invalid; then when the clock signal CLK comes, no influence is generated on the synchronous power tube Q2. If the zero-crossing shutdown signal Vz is invalid, the second RS flip-flop U2 is reset at each clock signal CLK arrival, thereby implementing the shutdown control of the synchronous power tube Q2.
It should be understood that the manner of controlling the synchronous power transistor to conduct complementarily with the main power transistor to enter the FCCM mode so as to make the inductor current continuous is not limited thereto, and when the driving signal of the main power transistor Q1 adopts other control manners, the control signal thereof will also be changed accordingly, as long as the driving generating circuit having the same function as the present embodiment can be realized and is within the protection scope of the present invention.
Fig. 5 is a waveform diagram illustrating the operation of the switch-mode converter according to the embodiment of the present invention. As shown, before t0, when the converter is operating in FCCM mode, the drive signal Vgs1 of the main power transistor Q1 and the drive signal Vgs2 of the synchronous power transistor Q2 are complementarily turned on. The input voltage Vin gradually rises due to the energy of the output capacitor flowing backward, and rises to the first threshold Vref1 at time t 0. Thereafter the control circuit controls the converter to switch to DCM mode of operation with the zero crossing comparison threshold Vth controlled to zero, so that at time t1 when the inductor current iL falls to zero the drive signal Vgs2 is de-asserted to turn off the synchronous power transistor Q2. Thereafter, the input voltage Vin gradually decreases to a second threshold Vref2 at time t 2. Thereafter, the zero-cross comparison threshold Vth is controlled to start gradually rising. It should be understood that a period of time (i.e., t2-t3) is required for the capacitor charge to rise to the third threshold Vref3, and therefore, when the zero-crossing comparison threshold Vth is small during the rising process and the inductor current iL flows through the synchronous power tube Q2 in the reverse direction, the voltage Vlx across the synchronous power tube Q2 is greater than the zero-crossing comparison threshold Vth, so that the zero-crossing comparison signal Vz is active before the clock signal CLK, and therefore the driving signal Vgs2 is inactive at time t3 to turn off the synchronous power tube Q2. After the zero-cross comparison threshold Vth reaches the third threshold Vref3 at time t4, the voltage Vlx across the synchronous power tube Q2 is always smaller than the zero-cross comparison threshold Vth, so that the zero-cross turn-off signal Vz is always invalid, and the driving signal Vgs2 is invalid when the clock signal CLK arrives, that is, the synchronous power tube Q2 is always turned on until the main power tube Q1 is turned on, so that the inductor current iL is continuous, and the converter is switched to the FCCM mode. It should be appreciated that if the zero-crossing comparison threshold Vth rises quickly, such as reaching the third threshold Vref3 within a switching cycle, the voltage Vlx will not be greater than the zero-crossing comparison threshold Vth during the rising process, and the FCCM mode will be entered directly.
Fig. 6 is a flowchart of a control method of a switching converter according to an embodiment of the present invention. The control method comprises the following steps:
step S1: detecting an input voltage of a switching type converter;
step S2: the input voltage of the switching converter is compared with a first threshold value and a second threshold value, respectively.
Specifically, after the input voltage is greater than a first threshold value, the synchronous power tube is controlled to be turned off when the inductive current crosses zero, so that the switch type converter enters an intermittent conduction mode; and when the input voltage is smaller than a second threshold value, controlling the synchronous power tube to enable the inductor current to be continuous, so that the switch type converter enters the forced continuous conduction mode.
Step S3: different zero-crossing comparison thresholds are generated according to the change of the input voltage. When the input voltage is greater than a first threshold value, controlling a zero-crossing comparison threshold value to be equal to zero; and when the input voltage is smaller than a second threshold value, controlling the zero-crossing comparison threshold value to rise to a third threshold value, wherein the third threshold value is larger than the maximum conduction voltage drop of the synchronous power tube when the inductive current is negative.
Step S4: and detecting the voltage at two ends of the synchronous power tube during the conduction period of the synchronous power tube.
Step S5: and comparing the voltage at two ends of the synchronous power tube with a zero-crossing comparison threshold value to generate a zero-crossing turn-off signal.
Step S6: and controlling the synchronous power tube to be turned off according to the preferentially effective signal in the zero-crossing turn-off signal and the clock signal. The time when the clock signal is invalid corresponds to the switching-on time of the main power tube.
Specifically, when the zero-crossing comparison threshold is equal to zero, the zero-crossing turn-off signal is effective when the inductive current crosses zero, so as to control the synchronous power tube to be turned off; when the zero-crossing comparison threshold value is equal to the third threshold value, the zero-crossing turn-off signal is invalid, and the synchronous power tube is controlled by the clock signal to be turned off.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (19)
1. A control circuit for a switched mode converter comprising a main power transistor and a synchronous power transistor, wherein the control circuit is configured to switch the operating mode of the switched mode converter in response to a change in an input voltage to control the state of an inductor current to avoid excessive input voltage,
wherein the control circuit is configured to control the switching converter to switch between a forced continuous conduction mode and an interrupted conduction mode.
2. The control circuit of claim 1, wherein the control circuit comprises:
an indication signal generating circuit configured to generate an indication signal representing the change of the input voltage to control the switch-type converter to switch an operation mode; and
and the driving control circuit is configured to control the switch-type converter to switch the working mode according to the indication signal and generate a corresponding driving signal to control the switching state of a power tube in the switch-type converter.
3. The control circuit of claim 2, wherein after the input voltage is greater than a first threshold value, the synchronous power tube is controlled to turn off at the time when the inductor current crosses zero according to the indication signal, so that the switching type converter enters an intermittent conduction mode.
4. The control circuit of claim 3, wherein after the input voltage is less than a second threshold, the synchronous power transistor is controlled according to the indication signal to make the inductor current continuous, so that the switch-type converter enters a forced continuous conduction mode, wherein the first threshold is greater than the second threshold.
5. The control circuit of claim 2, wherein the drive control circuit comprises:
a zero-crossing control circuit configured to generate a zero-crossing turn-off signal according to the indication signal to decide whether to turn off the synchronous power tube when the inductive current crosses zero; and
and the drive generation circuit is configured to receive the zero-crossing turn-off signal and generate drive signals of the main power tube and the synchronous power tube.
6. The control circuit of claim 5, wherein the zero-crossing control circuit comprises:
a threshold generation circuit configured to be controlled by the indication signal to generate different zero-crossing comparison thresholds;
a zero-crossing comparison circuit configured to compare a voltage across the synchronous power tube to the zero-crossing comparison threshold to generate the zero-crossing shutdown signal.
7. The control circuit of claim 6, wherein the threshold generation circuit is configured to control the zero-crossing comparison threshold to be equal to zero after the input voltage is greater than a first threshold; and when the input voltage is smaller than a second threshold value, controlling the zero-crossing comparison threshold value to be larger than the maximum conduction voltage drop of the synchronous power tube when the inductive current is smaller than zero.
8. The control circuit of claim 5, wherein the drive generation circuit comprises:
a first drive generation circuit configured to generate a drive signal of the main power transistor according to an output signal of the switching type converter and a rated reference value; and
and the second drive generation circuit is configured to generate a drive signal of the synchronous power tube according to the zero-crossing turn-off signal and the drive signal of the main power tube.
9. The control circuit of claim 8, wherein the second drive generation circuit is configured to control the drive signal of the synchronous power tube to be active when the drive signal of the main power tube is inactive, and to control the synchronous power tube to be turned off when the inductor current crosses zero when the zero-crossing turn-off signal is active; when the zero-crossing turn-off signal is invalid, the second drive generation circuit controls the synchronous power tube to be in complementary conduction with the main power tube.
10. The control circuit of claim 8, wherein the second drive generation circuit is further configured to control the synchronous power transistor to be turned off according to a signal that is preferentially active in both a clock signal and the zero-crossing turn-off signal, wherein a time at which the clock signal is inactive corresponds to a turn-on time of the main power transistor.
11. The control circuit of claim 6, wherein the threshold generation circuit comprises:
a first RS trigger configured to output an active overvoltage control signal after the input voltage is greater than a first threshold value and output an inactive overvoltage control signal after the input voltage is less than a second threshold value; and
the charging circuit comprises a capacitor and a control circuit, wherein the capacitor is configured to control the capacitor to release energy when the overvoltage control signal is effective, so that the voltage on the capacitor is zero and serves as the zero-crossing comparison threshold; and when the overvoltage control signal is invalid, controlling the capacitor to charge so that the voltage on the capacitor rises to a third threshold value as the zero-crossing comparison threshold value, wherein the third threshold value is larger than the maximum conduction voltage drop of the synchronous power tube when the inductive current is smaller than zero.
12. The control circuit of claim 10, wherein the second drive generation circuit comprises:
a second RS flip-flop configured to output a driving signal of the synchronous power transistor;
the first logic circuit is configured to generate a set signal to the second RS trigger when the driving signal of the main power tube is invalid; and
and the second logic circuit comprises an OR gate, and the OR gate receives the clock signal and the zero-crossing shutdown signal and outputs a reset signal to the second RS trigger.
13. A switched mode converter, comprising:
a main power circuit, comprising: the synchronous power circuit comprises a main power tube, a synchronous power tube and an inductor; and
a control circuit as claimed in any one of claims 1 to 12.
14. A control method for a switching converter, comprising:
detecting an input voltage of the switching converter; and
and controlling the switch type converter to switch between a forced continuous conduction mode and an interrupted conduction mode according to the change of the input voltage so as to control the state of the inductive current, thereby avoiding overvoltage of the input voltage.
15. The control method according to claim 14, characterized by further comprising:
comparing an input voltage of the switching converter with a first threshold value and a second threshold value, respectively;
when the input voltage is larger than the first threshold value, controlling synchronous power tubes in the switch-type converter to be turned off when the inductive current crosses zero, so that the switch-type converter enters the discontinuous conduction mode; and
when the input voltage is smaller than the second threshold value, the synchronous power tube is controlled to enable the inductor current to be continuous, so that the switch type converter enters the forced continuous conduction mode.
16. The control method according to claim 15, characterized by further comprising:
generating different zero-crossing comparison thresholds according to the change of the input voltage;
detecting the voltage at two ends of the synchronous power tube during the conduction period of the synchronous power tube; and
and comparing the voltage at two ends of the synchronous power tube with the zero-crossing comparison threshold value to generate a zero-crossing turn-off signal.
17. The control method of claim 16, wherein generating different zero-crossing comparison thresholds based on the change in the input voltage comprises:
controlling the zero-crossing comparison threshold to be equal to zero when the input voltage is greater than the first threshold; and when the input voltage is smaller than the second threshold, controlling the zero-crossing comparison threshold to rise to a third threshold, wherein the third threshold is larger than the maximum conduction voltage drop of the synchronous power tube when the inductive current is smaller than zero.
18. The control method according to claim 17, characterized by further comprising:
and controlling the synchronous power tube to be turned off according to a signal which is preferentially effective in the zero-crossing turn-off signal and the clock signal, wherein the invalid time of the clock signal corresponds to the turn-on time of the main power tube.
19. The control method according to claim 18, characterized by further comprising:
when the zero-crossing comparison threshold value is equal to zero, the zero-crossing turn-off signal is effective when the inductor current passes through zero so as to control the synchronous power tube to be turned off; and
when the zero-crossing comparison threshold value is equal to the third threshold value, the zero-crossing shutdown signal is invalid, and the synchronous power tube is controlled by the clock signal to be shut down.
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