CN111949200A - Memory and control method and control device thereof - Google Patents
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- CN111949200A CN111949200A CN201910412955.0A CN201910412955A CN111949200A CN 111949200 A CN111949200 A CN 111949200A CN 201910412955 A CN201910412955 A CN 201910412955A CN 111949200 A CN111949200 A CN 111949200A
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
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- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
- G06F12/0253—Garbage collection, i.e. reclamation of unreferenced memory
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
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Abstract
The embodiment of the invention discloses a memory and a control method and a control device thereof, wherein the memory comprises a memory module, the memory module comprises a plurality of physical blocks, and the control method comprises the following steps: if the data volume of at least one first physical block is detected to exceed a first data threshold value, switching to a data moving mode, wherein data in the first physical block is written in a single-layer storage mode; and moving the valid data of at least one first physical block to a blank physical block in a single-layer storage mode. In the embodiment of the invention, the valid data of the SLC blocks with the data volume exceeding the first data threshold are moved to the blank physical blocks according to the SLC mode, and then the moved SLC blocks are released, so that part of garbage recovery operation is completed among the SLC blocks, the data volume of the TLC blocks for garbage recovery is reduced, the read-write performance of a user is improved, and the SLC blocks with invalid data are released to a system space, so that the system can conveniently redistribute the blank SLC blocks.
Description
Technical Field
The present invention relates to a memory technology, and in particular, to a memory, a control method thereof, and a control device thereof.
Background
An eMMC (Embedded multimedia Media Card) chip is an Embedded memory mainly for products such as a mobile phone or a tablet computer. The eMMC chip integrates a controller which can provide a standard interface and manage the flash memory, so that mobile phone manufacturers using the eMMC chip can concentrate on other parts of product development and shorten the time for releasing products to the market.
The eMMC chip mainly comprises a controller and a flash memory grain, data are stored in the flash memory grain through write operation, and the data are read from the flash memory grain through read operation. The current mainstream flash memory in the market is NAND flash, has the advantages of small size, large capacity, high rewriting speed and the like, is suitable for storing a large amount of data, and is also increasingly widely applied in the industry. The NAND flash includes a single-layer memory physical block SLC and a multi-layer memory physical block TLC.
Under heavy use by the user, the SLC blocks will be heavily occupied. When most of the SLC blocks are full, the data are transferred to the TLC blocks, and the TLC blocks may contain more invalid data, so that multiple garbage collection operations are performed among the TLC blocks, the data volume of the TLC blocks for garbage collection is increased, and the read-write performance of the flash memory is reduced.
Disclosure of Invention
The embodiment of the invention provides a memory, a control method and a control device thereof, which are used for improving the read-write performance of a flash memory.
The embodiment of the invention provides a control method of a memory, wherein the memory comprises a memory module, the memory module comprises a plurality of physical blocks, and the control method comprises the following steps:
if the data volume of at least one first physical block is detected to exceed a first data threshold value, switching to a data moving mode, wherein data in the first physical block is written in a single-layer storage mode;
and moving the valid data of at least one first physical block to a blank physical block in a single-layer storage mode.
Further, the specific implementation process of moving the valid data of at least one of the first physical blocks to the blank physical block in the single-layer storage mode is as follows:
and searching at least one first physical block with the effective data amount lower than a second data threshold in the block, and moving the effective data of the at least one first physical block to at least one blank physical block in a single-layer storage mode.
Further, the memory further includes a flash translation layer, where an address mapping table and a physical address storage table are stored in the flash translation layer, and the control method further includes: and erasing the first physical block with the valid data in the block being moved out, and updating the address mapping table and the physical address storage table.
Further, still include:
and if the number of the blocks of the first physical block which is written with data is detected to exceed a first block threshold value, switching to a data moving mode, and moving at least one valid data of the first physical block to a blank physical block in a multi-layer storage mode.
Based on the same inventive concept, an embodiment of the present invention further provides a control apparatus for a memory, where the memory includes a storage module, the storage module includes a plurality of physical blocks, and the control apparatus includes:
the mode switching module is used for switching to a data moving mode if the data volume of at least one first physical block is detected to exceed a first data threshold, wherein the data in the first physical block is written in a single-layer storage mode;
and the data moving module is used for moving the effective data of at least one first physical block to a blank physical block in a single-layer storage mode.
Further, the data moving module is specifically configured to find out at least one first physical block in which an effective data amount is lower than a second data threshold, and move the effective data of the at least one first physical block to at least one blank physical block in a single-layer storage mode.
Further, the memory further includes a flash translation layer, where an address mapping table and a physical address storage table are stored in the flash translation layer, and the control device further includes: and the table updating module is used for erasing the first physical block with the effective data in the block being moved out and updating the address mapping table and the physical address storage table.
Further, still include: and the triggering recovery module is used for switching to a data moving mode and moving the effective data of at least one first physical block to a blank physical block in a multilayer storage mode if the number of the blocks of the first physical block with the written data is detected to exceed a first block threshold value.
Based on the same inventive concept, the embodiment of the invention also provides a memory, which comprises a memory module and the control device, wherein the control device is electrically connected with the memory module.
Further, the storage module is a NAND Flash memory NAND Flash, and the memory is an embedded multimedia eMMC chip.
In the embodiment of the invention, if the data volume of at least one first physical block is detected to exceed a first data threshold, a data moving mode is triggered; in the data moving mode, the valid data of at least one first physical block is moved to a blank physical block in a single-layer storage mode, so that the first physical block with excessive invalid data can be released. In the embodiment of the invention, the valid data of the SLC blocks with the data volume exceeding the first data threshold are moved to the blank physical blocks according to the SLC mode, and then the moved SLC blocks are released, so that part of garbage recovery operation is completed among the SLC blocks, the data volume of the TLC blocks for garbage recovery is reduced, the read-write performance of a user is improved, and the SLC blocks with invalid data are released to a system space, so that the system can conveniently redistribute the blank SLC blocks.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, a brief description will be given below of the drawings required for the embodiments or the technical solutions in the prior art, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a flow chart of a method for controlling a memory according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a control apparatus of a memory according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions of the present invention will be clearly and completely described through embodiments with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
As shown in fig. 1, a flowchart of a method for controlling a memory according to an embodiment of the present invention is provided, where the memory may be any chip or device integrated with a memory module, for example, an eMMC chip integrated with a flash memory granule, and in other embodiments, the memory may also be other devices integrated with a memory module. Here, the memory includes a memory module, the memory module includes a plurality of physical blocks, and the memory module writes data in units of the physical blocks. The optional storage module is a flash memory, optionally a NAND flash memory.
The method for controlling the memory provided by the embodiment comprises the following steps:
The memory includes a normal mode and a data migration mode, i.e., a garbage collection mode. In the data transfer mode, the memory can carry out transfer operation on data in the physical blocks storing the data, transfer effective data of a plurality of physical blocks with less effective data to a blank physical block, and release the physical blocks with less effective data. In the normal mode, the memory can perform read/write operations.
In this embodiment, the physical blocks storing data in the single-layer storage mode are named as first physical blocks (SLC blocks), the control device of the memory detects whether the data amount of each first physical block exceeds a first data threshold, and if the data amount of at least one first physical block exceeds the first data threshold, the control device triggers the data transfer mode to switch to the data transfer mode. Here, the first data threshold is 1/2, which is the capacity of the first physical block, that is, when the data amount of the first physical block exceeds the first data threshold, it means that the data amount of the first physical block accounts for a large amount, and data transfer is possible.
And step 120, moving the valid data of at least one first physical block to a blank physical block in a single-layer storage mode.
In this embodiment, after the memory is switched to the data transfer mode, the control device of the memory may perform the data transfer operation on the physical block. Specifically, the control device may find out all first physical blocks whose data amount exceeds the first data threshold, and use these first physical blocks as source blocks and blank physical blocks as target blocks. And in the data transfer stage, the effective data of at least one first physical block is transferred to a blank physical block in a single-layer storage mode, and the stability of the stored data can be improved by writing the data into the physical block in a single-layer storage mode, namely an SLC mode, so that the storage stability of the effective data is improved. Then, only invalid data remains in the moved first physical block, so that the moved first physical block can be erased to release a blank physical block, and the blank physical block can participate in being allocated to rewrite data in subsequent operations.
Specifically, for example, if SLC1 stores 1/4 capacity valid data, SLC2 stores 1/4 capacity valid data, and SLC3 stores 1/2 capacity valid data, the valid data in SLC1 to SLC3 may occupy the capacity of one blank SLC block, so SLC1 to SLC3 may serve as a source block and one blank SLC block as a target block, the valid data of SLC1 to SLC3 is moved to the target SLC block through garbage collection, and SLC1 to SLC3 are erased and released, which not only improves the effective data amount ratio of SLC blocks, but also releases a plurality of blank SLC blocks.
In the prior art, under the condition of heavy use of a user, the SLC blocks are occupied in a large amount, and data is transferred to the TLC blocks after the data amount reaches a certain value, so that the TLC blocks may contain more invalid data, all garbage recovery operations are completed among the TLC blocks, the data amount of the TLC for garbage recovery is increased, and the read-write performance of the user is poor. In the embodiment of the invention, garbage collection is performed among the SLC blocks, a plurality of effective SLC blocks which are all effective data exist in the system space, in order to increase the system capacity, the data of every three SLC blocks which are all effective data can be moved to a TLC block through garbage collection, the TLC block is occupied by the effective data, and garbage collection is not required.
In the control method provided by this embodiment, if it is detected that the data amount of at least one first physical block exceeds the first data threshold, the data moving mode is triggered; in the data moving mode, the valid data of at least one first physical block is moved to a blank physical block in a single-layer storage mode, so that the first physical block with excessive invalid data can be released. In this embodiment, the valid data of the SLC blocks whose data size exceeds the first data threshold are moved to the blank physical blocks in the SLC mode, and then the moved SLC blocks are released, so that part of garbage collection operations are completed between the SLC blocks, the data size of the TLC blocks for garbage collection is reduced, the read-write performance of the user is improved, and the SLC blocks that are invalid data are released to the system space, so that the system can reallocate the blank SLC blocks.
For example, on the basis of the above technical solution, a specific implementation process of optionally moving valid data of at least one first physical block to a blank physical block in a single-layer storage mode is as follows: and finding out at least one first physical block with the effective data amount lower than a second data threshold value in the block, and moving the effective data of the at least one first physical block to at least one blank physical block in a single-layer storage mode.
In this embodiment, if it is detected that the data amount of the at least one first physical block exceeds the first data threshold, the data moving mode is triggered. And after switching to the data transfer mode, searching at least one first physical block with the effective data volume lower than a second data threshold in the block, and performing data transfer by taking the first physical block as a source block. In this embodiment, after the data transfer mode is triggered, in order to avoid that the number of the first physical blocks with invalid data volume exceeding the first data threshold is too small to implement data transfer, the physical blocks with valid data volume lower than the second data threshold are set as source blocks, physical blocks participating in data transfer are added, and data transfer between SLC blocks is effectively implemented. Those skilled in the art will appreciate that the first data threshold and the second data threshold may be reasonably set by the relevant practitioner. Specifically, at least one first physical block with the effective data volume lower than a second data threshold value in the block is found out, and the effective data of the at least one first physical block is moved to at least one blank physical block in a single-layer storage mode, so that the stability of the effective data is improved, the effective data occupancy rate of the SLC block is improved, the garbage recovery among the SLC blocks is realized, and the data volume of the TLC block for garbage recovery is reduced.
Illustratively, on the basis of the above technical solution, the optional memory further includes a flash translation layer, where an address mapping table and a physical address storage table are stored in the flash translation layer, and the control method further includes: and erasing the first physical block from which the effective data in the block is moved out, and updating the address mapping table and the physical address storage table.
Illustratively, on the basis of the above technical solution, the optional memory further includes a flash translation layer, where an address mapping table and a physical address storage table are stored in the flash translation layer, and the control method further includes: and erasing the first physical block from which the effective data in the block is moved out, and updating the address mapping table and the physical address storage table.
In this embodiment, the flash translation layer stores an address mapping table T2 and a physical address storage table T3, where the mapping between the logical address and the physical address of the valid data in each physical block in the memory is stored in T2, and the physical addresses corresponding to all the logical addresses in the memory are stored in T3. According to T2, the valid data in each physical block and the occupancy rate of the valid data in the block can be known, so that the invalid data amount and the valid data amount in the physical block can be obtained, the comparison between the valid data amount and the second data threshold value can be further realized, and the comparison between the invalid data amount and the first data threshold value can also be realized. In this embodiment, in the data transfer mode, valid data in a first physical block whose data size exceeds a first data threshold is transferred, and then the first physical block can be erased to be released as a blank physical block. T2 and T3 are updated accordingly to facilitate subsequent read and write operations and allocation of empty physical blocks.
Illustratively, on the basis of the above technical solution, the control method may further include: and if the number of the blocks of the first physical block with the written data is detected to exceed the first block threshold value, switching to a data moving mode, and moving the valid data of at least one first physical block to a blank physical block in a multi-layer storage mode.
In this embodiment, the control device further monitors the number of blocks of the first physical block in which data has been written in real time, switches to the data transfer mode if it is detected that the number of blocks of the first physical block in which data has been written exceeds the first block threshold, and transfers valid data of at least one first physical block to a blank physical block in the multi-layer storage mode. If the number of SLC blocks in the system space is too large, the capacity of the system space is small. In order to increase the system capacity, the valid data in the SLC block can be moved to the TLC block by garbage collection, thereby effectively increasing the system capacity. In this embodiment, the triggering mechanism is used to trigger the data transfer mode, specifically triggering the data transfer from the SLC block to the TLC block, when the number of blocks of the first physical block in which data has been written exceeds the first block threshold. This may increase system capacity.
Based on the same inventive concept, an embodiment of the present invention further provides a control device for a memory, where the control device can implement the control method described in any of the above embodiments, and the control device can be implemented in a software and/or hardware manner and configured in the memory for application. The memory includes a memory module including a plurality of physical blocks.
As shown in fig. 2, the control device of the memory provided in the present embodiment includes: the mode switching module 210 is configured to switch to a data moving mode if it is detected that the data amount of at least one first physical block exceeds a first data threshold, where data in the first physical block is written in a single-layer storage mode; the data moving module 220 is configured to move valid data of at least one first physical block to a blank physical block in a single-layer storage mode.
Optionally, the data moving module is specifically configured to find out at least one first physical block in which the effective data amount is lower than a second data threshold, and move the effective data of the at least one first physical block to at least one blank physical block in a single-layer storage mode.
Optionally, the memory further includes a flash translation layer, where an address mapping table and a physical address storage table are stored in the flash translation layer, and the control device further includes: and the table updating module is used for erasing the first physical block from which the effective data in the block is moved out, and updating the address mapping table and the physical address storage table.
Optionally, the control device further includes: and the triggering recovery module is used for switching to a data moving mode and moving the effective data of at least one first physical block to a blank physical block in a multilayer storage mode if the number of the blocks of the first physical block in which the data is written is detected to exceed a first block threshold value.
In this embodiment, the data in the memory is written in SLC mode, with a capacity of 1/3 of the total system capacity. When most of the SLC blocks are filled by the user, there may be more invalid data, in this embodiment, when the amount of data written into the SLC blocks is greater than the first data threshold, the garbage collection mechanism is triggered, valid data in the SLC blocks is written into newly allocated SLC blocks, and invalid SLC blocks are erased and released to the system space. Garbage collection between SLC blocks in memory is achieved. Specifically, before user data is transferred from an SLC block to a TLC block, garbage collection is implemented inside the SLC block, and valid data of the SLC block is transferred to a blank SLC block. The flash translation layer searches a plurality of SLC blocks with less effective data, reads the effective data in at least two SLC blocks and writes the effective data into a blank SLC block, simultaneously updates the mapping relation, erases the SLC blocks with the rest invalid data, and releases the SLC blocks to the system space. If the valid data in the SLC block does not meet the requirement of SLC garbage collection, waiting for the data to be sent by the user or continuing to do the garbage collection.
On the other hand, after the SLC blocks are subjected to garbage collection, part of the SLC blocks are all valid data, and then the number of the SLC blocks storing the data reaches the first block threshold value, garbage collection between the SLC blocks and the TLC blocks can be triggered, and the data of the SLC blocks which are all valid data are moved to the TLC blocks, and then at least one TLC block is all valid data, and the TLC blocks almost do not contain invalid data, so that garbage collection is not required, the data volume of the TLC blocks for garbage collection is effectively reduced, and the phenomenon that all garbage collection operations are concentrated between the TLC blocks is avoided, so that the read-write system performance and the write amplification performance of the data in the TLC blocks can be improved.
In the embodiment, the pressure of garbage recovery between TLC blocks at the later stage is reduced, the occupancy of effective data in the TLC blocks at the equipment end is improved, the writing amplification is reduced, and the reading and writing performance of a user is improved.
Based on the same inventive concept, an embodiment of the present invention further provides a memory, where the memory includes a memory module and the control device described in any of the above embodiments, and the control device is electrically connected to the memory module. The optional storage module is a NAND Flash memory NAND Flash, and the storage is an embedded multimedia eMMC chip.
In this embodiment, the valid data of the SLC block can be collected into the SLC block in a centralized manner through the garbage collection mechanism, and the invalid SLC block is released into the system space, so that the occupancy rate of the valid data in the SLC block is increased, the garbage collection pressure between the TLC blocks in the later stage is reduced, the occupancy rate of the valid data in the TLC block at the device side is increased, the write amplification is reduced, and the read-write performance of a user is improved.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A method for controlling a memory, the memory including a memory module, the memory module including a plurality of physical blocks, the method comprising:
if the data volume of at least one first physical block is detected to exceed a first data threshold value, switching to a data moving mode, wherein data in the first physical block is written in a single-layer storage mode;
and moving the valid data of at least one first physical block to a blank physical block in a single-layer storage mode.
2. The method according to claim 1, wherein the specific process of moving the valid data of at least one of the first physical blocks to a blank physical block in a single-layer storage mode is as follows:
and searching at least one first physical block with the effective data amount lower than a second data threshold in the block, and moving the effective data of the at least one first physical block to at least one blank physical block in a single-layer storage mode.
3. The control method of claim 1, wherein the memory further comprises a flash translation layer, the flash translation layer having an address mapping table and a physical address storage table stored therein, the control method further comprising: and erasing the first physical block with the valid data in the block being moved out, and updating the address mapping table and the physical address storage table.
4. The control method according to claim 1, characterized by further comprising:
and if the number of the blocks of the first physical block which is written with data is detected to exceed a first block threshold value, switching to a data moving mode, and moving at least one valid data of the first physical block to a blank physical block in a multi-layer storage mode.
5. A control apparatus of a memory, the memory including a memory module including a plurality of physical blocks, the control apparatus comprising:
the mode switching module is used for switching to a data moving mode if the data volume of at least one first physical block is detected to exceed a first data threshold, wherein the data in the first physical block is written in a single-layer storage mode;
and the data moving module is used for moving the effective data of at least one first physical block to a blank physical block in a single-layer storage mode.
6. The control device according to claim 5, wherein the data moving module is specifically configured to find out at least one of the first physical blocks in which an amount of valid data in the block is lower than a second data threshold, and move the valid data of the at least one of the first physical blocks to at least one of the blank physical blocks in a single-layer storage mode.
7. The control device of claim 5, wherein the memory further comprises a flash translation layer having an address mapping table and a physical address storage table stored therein, the control device further comprising: and the table updating module is used for erasing the first physical block with the effective data in the block being moved out and updating the address mapping table and the physical address storage table.
8. The control device according to claim 5, characterized by further comprising: and the triggering recovery module is used for switching to a data moving mode and moving the effective data of at least one first physical block to a blank physical block in a multilayer storage mode if the number of the blocks of the first physical block with the written data is detected to exceed a first block threshold value.
9. Memory, characterized in that it comprises a memory module and a control device according to any of claims 5-8, said control device being electrically connected to said memory module.
10. The memory of claim 9, wherein the memory module is a NAND Flash and the memory is an embedded multimedia eMMC chip.
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| CN112597073A (en) * | 2020-12-28 | 2021-04-02 | 深圳忆联信息系统有限公司 | SLC block moving implementation method and device, computer equipment and storage medium |
| CN112988068A (en) * | 2021-03-10 | 2021-06-18 | 深圳宏芯宇电子股份有限公司 | Memory control method, memory storage device and memory controller |
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