CN111933088B - Power generation circuit and display device thereof - Google Patents
Power generation circuit and display device thereof Download PDFInfo
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- CN111933088B CN111933088B CN202010837447.XA CN202010837447A CN111933088B CN 111933088 B CN111933088 B CN 111933088B CN 202010837447 A CN202010837447 A CN 202010837447A CN 111933088 B CN111933088 B CN 111933088B
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- 238000010248 power generation Methods 0.000 title claims abstract description 23
- 238000006243 chemical reaction Methods 0.000 claims abstract description 28
- 230000001808 coupling effect Effects 0.000 abstract description 11
- 230000000694 effects Effects 0.000 abstract description 7
- 239000004973 liquid crystal related substance Substances 0.000 description 12
- 238000010586 diagram Methods 0.000 description 10
- 239000010409 thin film Substances 0.000 description 9
- 239000003990 capacitor Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 230000003071 parasitic effect Effects 0.000 description 3
- 230000005669 field effect Effects 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 230000006835 compression Effects 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3648—Control of matrices with row and column drivers using an active matrix
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Power Engineering (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The application discloses a power generation circuit and a display device thereof. The power supply generation circuit outputs a first voltage and transmits the first voltage to a plurality of pixels of the display panel, the first voltage has a preset high voltage level, the power supply generation circuit comprises a voltage output circuit and a voltage conversion circuit, the voltage output circuit outputs a second voltage, and the voltage conversion circuit is electrically connected with the voltage output circuit and outputs the first voltage according to the second voltage and a control signal; in one period of the first voltage, the control signal enables the first voltage output by the voltage conversion circuit to rise to a preset high voltage level, and the highest voltage level of the last falling edge of the first voltage is smaller than the preset high voltage level. The display device can effectively improve the capacitive coupling effect and enables the display effect to be better.
Description
Technical Field
The present disclosure relates to a power generating circuit, and more particularly, to a power generating circuit and a display device thereof capable of effectively improving capacitive coupling effect.
Background
With the development of liquid crystal display technology, liquid crystal displays have become popular. The liquid crystal display mainly uses the electric field to control the rotation of the liquid crystal molecules of the pixels, so that the light can pass through the liquid crystal molecules to display the image.
A Thin Film Transistor (TFT) is a key component of a pixel driving in a liquid crystal display device. In the prior art, the electron channel of the TFT is formed at the interface below the semiconductor layer, and the source/drain is at the interface above the semiconductor layer, so that the electron channel of the TFT must be connected to the source/drain through the thickness of the semiconductor layer, the resistance caused by the thickness of the semiconductor layer greatly reduces the charging capability of the TFT, and therefore, an intentional overlap between the gate and the source, and between the gate and the drain must be formed to enhance the conductivity of the electron channel. However, this overlap can create parasitic capacitances between the gate and source, and between the gate and drain. In addition, parasitic capacitance is also generated between the pixel electrode of the pixel and the gate line and the data line.
Under the condition of charge conservation, if the voltage source connected to one of the capacitors changes, due to the effect of capacitive coupling effect, the voltage of the electrode connected to the capacitor also changes correspondingly, which affects the display quality of the display. Therefore, the voltage variation of the voltage source is one of the keys to improve the panel capacitive coupling effect.
Disclosure of Invention
The present disclosure provides a power supply circuit and a display device having the same, which can effectively improve a capacitive coupling effect of the display device, so as to achieve a better image display effect.
The application provides a power generation circuit of a display device. The display device also comprises a display panel and a driving circuit, wherein the display panel is electrically connected with the driving circuit, the driving circuit drives a plurality of pixels of the display panel to enable the display panel to display images, the power generation circuit outputs a first voltage and transmits the first voltage to the plurality of pixels of the display panel, the first voltage has a preset high voltage level, and the power generation circuit comprises a voltage output circuit and a voltage conversion circuit. The voltage output circuit outputs a second voltage. The voltage conversion circuit is electrically connected with the voltage output circuit and outputs a first voltage according to a second voltage and a control signal; in one period of the first voltage, the control signal enables the first voltage output by the voltage conversion circuit to rise to a preset high voltage level, and the highest voltage level of the last falling edge of the first voltage is smaller than the preset high voltage level.
The present application further provides a display device, which includes a display panel, a driving circuit and a power generating circuit. The display panel has a plurality of pixels. The driving circuit is electrically connected with the display panel and drives a plurality of pixels of the display panel to enable the display panel to display images. The power generation circuit outputs a first voltage to a plurality of pixels of the display panel, wherein the first voltage has a preset high voltage level, and the power generation circuit comprises a voltage output circuit and a voltage conversion circuit. The voltage output circuit outputs a second voltage. The voltage conversion circuit is electrically connected with the voltage output circuit and outputs a first voltage according to a second voltage and a control signal; in one period of the first voltage, the control signal enables the first voltage output by the voltage conversion circuit to rise to a preset high voltage level, and the highest voltage level of the last falling edge of the first voltage is smaller than the preset high voltage level.
In one embodiment, the voltage converting circuit includes a first switch and a second switch, the first terminals of the first switch and the second switch are connected to each other and receive the control signal, the second terminals of the first switch and the second switch are connected to each other and electrically connected to the voltage output circuit to receive the second voltage, the third terminal of the first switch outputs the first voltage, and the third terminal of the second switch is connected to a ground terminal.
In one embodiment, the first switch is a P-type FET and the second switch is an N-type FET.
In one embodiment, the second voltage is a clock signal.
In one embodiment, the waveform of one period of the first voltage includes a square wave with a predetermined high voltage level and a plurality of sawtooth waves with a maximum voltage level lower than the predetermined high voltage level.
In one embodiment, after the control signal raises the first voltage output by the voltage conversion circuit to a predetermined high voltage level, the control signal switches rapidly, so that the highest voltage level of the first voltage obtained after each switching becomes lower and lower, and the duty ratio of the control signal determines the highest voltage level of the first voltage within a period of time.
The present application further provides a power generating circuit of a display device, the display device further includes a display panel and a driving circuit, the display panel is electrically connected to the driving circuit, the driving circuit drives a plurality of pixels of the display panel to display an image on the display panel, the power generating circuit outputs a first voltage and transmits the first voltage to the plurality of pixels of the display panel, the first voltage has a predetermined high voltage level, and the power generating circuit includes a voltage output circuit and a voltage converting circuit. The voltage output circuit outputs a second voltage. The voltage conversion circuit is electrically connected with the voltage output circuit, outputs a first voltage according to a second voltage and a control signal, comprises a first switch and a second switch, the first ends of the first switch and the second switch are connected with each other, the first ends receive the control signal, the second ends of the first switch and the second switch are connected with each other and are electrically connected with the voltage output circuit to receive the second voltage, the third end of the first switch outputs the first voltage, and the third end of the second switch is connected with a grounding end; in a period of the first voltage, the control signal enables the first voltage output by the voltage conversion circuit to rise to a preset high voltage level, and the highest voltage level of the last falling edge of the first voltage is smaller than the preset high voltage level; after the control signal makes the first voltage output by the voltage conversion circuit rise to a preset high voltage level, the control signal is switched rapidly, so that the highest voltage level of the first voltage obtained after each switching becomes lower and lower, and the duty ratio of the control signal determines the highest voltage level of the first voltage in a period of time.
In summary, in the power generating circuit and the display device thereof of the present application, the power generating circuit outputs the first voltage and transmits the first voltage to the plurality of pixels of the display panel, and the control signal increases the first voltage output by the voltage converting circuit to the predetermined high voltage level within a period of the first voltage output by the power generating circuit, and the maximum voltage level of the last falling edge of the first voltage is smaller than the predetermined high voltage level.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the application, are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is obvious that the drawings in the following description are only some embodiments of the application, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:
fig. 1A is a functional block diagram of a display device according to an embodiment of the present application.
Fig. 1B is a schematic diagram of a pixel of a display device according to an embodiment of the present application.
Fig. 2 is a circuit diagram of a power generation circuit according to an embodiment of the present application.
Fig. 3 is a waveform diagram of a voltage (a first voltage) output by a power generation circuit according to an embodiment of the present application.
Fig. 4 is an equivalent circuit diagram of a pixel of a display device according to an embodiment of the present application.
Detailed Description
Specific structural and functional details disclosed herein are merely representative and are provided for purposes of describing example embodiments of the present application. This application may, however, be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
In the description of the present application, it is to be understood that the terms "center," "lateral," "upper," "lower," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," and the like are used in the orientation or positional relationship indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced device or assembly must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and therefore should not be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present application, "a plurality" means two or more unless otherwise specified. Furthermore, the term "comprises" and any variations thereof is intended to cover non-exclusive inclusions.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the two components can be directly connected or indirectly connected through an intermediate medium, and the two components can be communicated with each other. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of example embodiments. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
The power generating circuit and the display device according to the embodiments of the present application will be described with reference to the related drawings, wherein like elements will be described with like reference numerals.
First, a display device, such as a liquid crystal display device, mainly adopts a driving principle: the system control main board connects the R/G/B compression signal, control signal and power signal needed by the pixel with the connector (connector) on the drive circuit board through the connecting wire, so that the data signal can be processed by the Timing Controller and then transmitted to the pixel of the display area of the display panel through the grid driver and the source driver, thereby the display panel can obtain the signal and power needed by the display. Wherein, when the voltage variation of the power supply provided to the display panel is smaller, the capacitive coupling effect of the pixel can be reduced, and the image display effect is more excellent.
Fig. 1A is a functional block diagram of a display device according to an embodiment of the present application, and fig. 1B is a diagram of a pixel of the display device according to an embodiment of the present application.
As shown in fig. 1A, the display device 1 of the present embodiment is a liquid crystal display device, and may include a display panel 11, a driving circuit 12, and a power generating circuit 13. The display panel 11 is electrically connected to the driving circuit 12, and the power generating circuit 13 is electrically connected to the display panel 11 and the driving circuit 12, respectively. The power generating circuit 13 can generate a power and provide the power to the display panel 11 and the driving circuit 12.
The display panel 11 may include a plurality of pixels P (only one is shown in fig. 1A), and the driving circuit 12 may transmit a data voltage to drive the plurality of pixels P of the display panel 11 respectively. As shown in fig. 1B, each pixel P may have a pixel electrode P1, a common electrode P2, and a plurality of liquid crystal molecules P3 sandwiched between the pixel electrode P1 and the common electrode P2. When the driving circuit 12 outputs the data voltage and correspondingly transmits the data voltage to the pixel electrode P1 of the pixels P, and outputs a common electrode voltage and transmits the common electrode voltage to the common electrode P2 of the pixels P, a voltage difference (i.e., a pixel voltage) is formed between the pixel electrode P1 and the common electrode P2, so that the liquid crystal molecules P3 can rotate to a corresponding angle to display a picture.
Referring to fig. 1A again, the driving circuit 12 of the present embodiment may include a timing controller 121, a source driver 122 and a gate driver 123, wherein the timing controller 121 is electrically connected to the source driver 122 and the gate driver 123, respectively. The gate driver 123 may be electrically connected to a plurality of Thin Film Transistors (TFTs) of a plurality of pixels P of the display panel 11 through a plurality of gate lines, and the source driver 122 may be electrically connected to a plurality of TFTs of a plurality of pixels P of the display panel 11 through a plurality of data lines. The timing controller 121 may transmit a vertical synchronization start signal and a horizontal synchronization signal to the gate driver 123, convert a video signal received from an external interface into a data voltage required by the source driver 122, and transmit a data signal and a horizontal synchronization signal to the source driver 122. The source driver 122 may output data voltages corresponding to the data lines to the pixel electrodes P1 of the pixels P and transmit a common electrode voltage to the common electrode P2. In addition, the gate driver 123 may sequentially turn on the plurality of gate lines according to a vertical synchronization start signal when a frame time (frame time) starts, and when the gate driver 123 turns on the plurality of gate lines sequentially, the thin film transistor corresponding to each row of the pixels P may be turned on, and the source driver 122 may correspondingly transmit the data voltage to the pixel electrode of each pixel P through the corresponding plurality of data lines and the thin film transistor, so that the display panel 11 displays an image.
When the gate driver 123 turns on the corresponding thin film transistor in each row of pixels P, the specific implementation manner may be: the gate driver 123 receives a row signal, generates a digital signal by a rising edge of a clock (clock), each digital signal may correspond to an output of a gate line, and converts a high/low level into a required high/low voltage after digital-to-analog (D/a) conversion to control a thin film transistor of a corresponding pixel P to be turned on, so that the pixel P may be turned on row by row, and the source driver 122 transmits a corresponding data voltage through a data line to charge a pixel electrode, thereby implementing display of a picture.
In order to improve the capacitive coupling effect in the background art, the power generating circuit 13 of the present application generates a power different from a clock signal and transmits the power to the thin film transistor of the pixel P. The power generation circuit 13 of the present application can generate a power source capable of reducing the voltage variation to control the on/off of the thin film transistor of the pixel P, because if the voltage variation is reduced, the capacitive coupling effect of the pixel P can be reduced, so that the image display effect of the display panel 11 is better.
Fig. 2 is a schematic circuit diagram of the power generation circuit 13 according to an embodiment of the present application, and fig. 3 is a schematic waveform diagram of a voltage (the first voltage V1) output by the power generation circuit 13 according to an embodiment of the present application.
As shown in fig. 2, the power generating circuit 13 can generate a power (referred to as a first voltage V1 herein) and transmit the power to the pixels P of the display panel 11, and the driving circuit 12 can drive the pixels P of the display panel 11 according to the first voltage V1, so that the display panel 11 displays an image. Herein, the first voltage V1 may have a predetermined high voltage level Vgh, which may be a high (high,1) voltage level of the voltage source provided by the system control board to the display panel 11 and the driving circuit 12, and a low (low,0) voltage level of the voltage source provided by the system control board to the display panel 11 and the driving circuit 12 is Vgl. In some embodiments, the predetermined high voltage level Vgh can be, for example and without limitation, +33 volts (V), and the voltage level of Vgl can be, for example and without limitation, -6V.
The power generating circuit 13 of the present embodiment may include a voltage output circuit 131 and a voltage converting circuit 132, wherein the voltage output circuit 131 is electrically connected to the voltage converting circuit 132. The voltage output circuit 131 may include, for example, a power IC (power IC) that can output the second voltage V2 and transmit the second voltage V2 to the voltage conversion circuit 132, the voltage conversion circuit 132 may output the first voltage V1 according to the control of the second voltage V2 and a control signal C, and the first voltage V1 may be transmitted to the pixel P of the display panel 11, so as to control the on/off of the thin film transistor of the pixel P. In other words, the voltage converting circuit 132 is controlled by the control signal C to change the second voltage V2 and output the first voltage V1, and the first voltage V1 is transmitted to the tft of the pixel P of the display panel 11 to control the tft to turn on or off. The control signal C may be generated by the system control motherboard (e.g., by an IC) or another voltage control circuit, without limitation. In addition, the second voltage V2 output by the voltage output circuit 131 may be a clock signal with a maximum voltage level equal to the predetermined high voltage level Vgh.
The voltage converting circuit 132 of the present embodiment may include a first switch T1 and a second switch T2, wherein the first switch T1 is a P-type field effect transistor (PMOS) and the second switch T2 is an N-type field effect transistor (NMOS). In fig. 2, the first terminals (control terminals, gate terminals) of the first switch T1 and the second switch T2 are connected to each other, the first terminals of the first switch T1 and the second switch T2 can receive the control signal C, the second terminal of the first switch T1 and the second terminal of the second switch T2 are connected to each other and electrically connected to the voltage output circuit 131 to receive the second voltage V2, the third terminal of the first switch T1 can output the first voltage V1, and the third terminal of the second switch T2 is connected to a ground terminal.
Therefore, the first switch T1 and the second switch T2 can be controlled to be turned on (on) and turned off (off) by the control signal C. Specifically, when the voltage level of the second voltage V2 is Vgh and the control signal C is high (1), the first switch T1 is turned on but the second switch T2 is turned off, and the first voltage V2 may be Vgh and transmitted to the pixel P of the display panel 11; when the control signal C is low (0), the first switch T1 is turned off but the second switch T2 is turned on, so that the first voltage V2 is 0V (ground voltage); thereafter, if the control signal C is high (1) again, the first voltage V2 can be Vgh and transmitted to the pixel P of the display panel 11, and so on.
As the control signal C is continuously and rapidly switched between high and low, the first voltage V1 will also rise and fall, thereby forming a waveform like the first voltage V1 of fig. 3. Here, the duty ratio of the control signal C determines the highest voltage level of the first voltage V1 within one period T. For example, if the duty ratio of the control signal C is 100%, then it is always high in one period time, and the first voltage V1 will be always Vgh; if the duty ratio of the control signal C is 0%, the duty ratio is always low within one period time, and the first voltage V1 is 0V; if the duty cycle of the control signal C is 50%, then the first voltage V1 will be 1/2 × Vgh if high and low each account for half of the period time.
In the power generating circuit 13 of the present embodiment, the control signal C can make the first voltage V1 output by the voltage converting circuit 132 rise to the predetermined high voltage level Vgh within the period T of the first voltage V1, and make the highest voltage level Vgh' of the last falling edge of the first voltage V1 be less than the predetermined high voltage level Vgh. Here, the last falling edge of the first voltage V1 refers to the falling edge of the last rising voltage waveform.
Specifically, after the start of one cycle, the power generation circuit 13 sets the control signal C to high to make the maximum voltage level of the first voltage V1 reach the predetermined high voltage level Vgh, and then the control signal C performs fast switching (on-off switching, the number of times of switching is not limited, and fig. 3 shows 6 times of on-off switching in one cycle) a plurality of times, so that the duty ratio of the following control signal C is smaller than that of the preceding control signal C, and the maximum voltage level of the first voltage V1 obtained after each switching becomes lower (the duty ratio of the last time may be, for example, 70%, 50%, or 30%, without limitation). In various embodiments, the duty cycle of the following control signal C may be greater than the preceding duty cycle, but the highest voltage level Vgh' of the last falling edge of the first voltage V1 is smaller than the predetermined high voltage level Vgh. In some embodiments, the smaller the highest voltage level Vgh' of the last falling edge of the first voltage V1 (which may not be equal to the lowest point voltage), the better the improvement of the capacitive coupling effect.
Therefore, in the embodiment shown in fig. 3, the waveform of the first voltage V1 in one period includes a square wave with a voltage of the predetermined high voltage level Vgh and a plurality of sawtooth waveforms with a highest voltage level lower than the predetermined high voltage level Vgh, and the highest voltage level Vgh' of the falling edge of the last sawtooth waveform is lower than the predetermined high voltage level Vgh. Here, the output of the first voltage V1 of this waveform may be repeated and provided to the pixel P of the display panel 11. In addition, the 5 sawtooth waves in fig. 3 are only schematic, and the number of the sawtooth waves may be greater than or less than 5, which does not limit the present application.
Referring to fig. 3 in conjunction with fig. 4, fig. 4 is a schematic equivalent circuit diagram of a pixel P of a display device according to an embodiment of the present application. In fig. 4, V1 is the first voltage, which can be transmitted to the gate of the tft of the pixel P to control the on state of the tft, Vp is the pixel voltage of the pixel P of the display panel 11, Vcom is the common voltage, Cgs is the parasitic circuit between the gate and the source of the tft corresponding to the pixel P, Cst is the liquid crystal storage capacitor of the pixel P, and Clc is the liquid crystal capacitor.
As can be seen from fig. 4, if the highest voltage level Vgh' of the last falling edge of the first voltage V1 is smaller than the predetermined high voltage level Vgh within the period T, when the voltage of the last sawtooth wave of the first voltage V1 falls downward, the voltage variation of the first voltage V1 is relatively small, so that the capacitive coupling effect can be relatively small, and the variation of the pixel voltage Vp is relatively small, thereby improving the flicker phenomenon of the display screen and making the screen display effect of the display panel 11 more excellent, because the voltage of the last sawtooth wave of the highest point does not fall to the lowest point, but falls to the lowest point.
In summary, in the power generating circuit and the display device thereof of the present application, the power generating circuit outputs the first voltage to the plurality of pixels of the display panel, and the control signal increases the first voltage output by the voltage converting circuit to the predetermined high voltage level within a period of the first voltage output by the power generating circuit, and the maximum voltage level of the last falling edge of the first voltage is smaller than the predetermined high voltage level, so that the display device of the present application can reduce the voltage variation of the power supply, thereby improving the capacitive coupling effect of the panel, and making the image display effect more excellent.
The foregoing is by way of example only, and not limiting. Any equivalent modifications or variations without departing from the spirit and scope of the present application should be included in the scope of the claims.
Claims (6)
1. A power generation circuit of a display device, the display device further comprising a display panel and a driving circuit, the display panel being electrically connected to the driving circuit, the driving circuit driving a plurality of pixels of the display panel to display an image on the display panel, the power generation circuit outputting a first voltage and transmitting the first voltage to the plurality of pixels of the display panel, the first voltage having a predetermined high voltage level, the power generation circuit comprising:
a voltage output circuit for outputting a second voltage; and
the voltage conversion circuit is electrically connected with the voltage output circuit and outputs the first voltage according to the second voltage and a control signal;
wherein, in a period of the first voltage, the control signal makes the first voltage output by the voltage conversion circuit rise to the predetermined high voltage level, and makes the highest voltage level of the last falling edge of the first voltage less than the predetermined high voltage level;
the voltage conversion circuit comprises a first switch and a second switch, wherein the first ends of the first switch and the second switch are connected with each other, the first ends receive the control signals, the second ends of the first switch and the second switch are connected with each other and are electrically connected with the voltage output circuit to receive the second voltage, the third end of the first switch outputs the first voltage, and the third end of the second switch is connected with a ground terminal;
after the control signal enables the first voltage output by the voltage conversion circuit to rise to the preset high voltage level, the control signal is switched rapidly, and the voltage level of the first voltage rises and falls according to the rapid switching of the control signal, so that the highest voltage level of the first voltage obtained after each switching is lower and lower;
the waveform of one period of the first voltage comprises a square wave with the preset high voltage level and a plurality of sawtooth waves with the highest voltage level lower than the preset high voltage level.
2. The power generation circuit of claim 1, wherein the first switch is a P-type fet and the second switch is an N-type fet.
3. The power generation circuit of claim 1, wherein the second voltage is a clock signal.
4. The power generation circuit of claim 1, wherein a duty cycle of the control signal determines a maximum voltage level of the first voltage within a period of time.
5. A display device, comprising:
a display panel having a plurality of pixels;
the driving circuit is electrically connected with the display panel and drives the plurality of pixels of the display panel to enable the display panel to display images; and
a power generating circuit outputting a first voltage to the plurality of pixels of the display panel, the first voltage having a predetermined high voltage level, the power generating circuit comprising:
a voltage output circuit for outputting a second voltage; and
the voltage conversion circuit is electrically connected with the voltage output circuit and outputs the first voltage according to the second voltage and a control signal;
wherein, in a period of the first voltage, the control signal makes the first voltage output by the voltage conversion circuit rise to the predetermined high voltage level, and makes the highest voltage level of the last falling edge of the first voltage less than the predetermined high voltage level;
the voltage conversion circuit comprises a first switch and a second switch, wherein the first ends of the first switch and the second switch are connected with each other, the first ends receive the control signals, the second ends of the first switch and the second switch are connected with each other and are electrically connected with the voltage output circuit to receive the second voltage, the third end of the first switch outputs the first voltage, and the third end of the second switch is connected with a ground terminal;
after the control signal enables the first voltage output by the voltage conversion circuit to rise to the preset high voltage level, the control signal is switched rapidly, and the voltage level of the first voltage rises and falls according to the rapid switching of the control signal, so that the highest voltage level of the first voltage obtained after each switching is lower and lower;
the waveform of one period of the first voltage comprises a square wave with the preset high voltage level and a plurality of sawtooth waves with the highest voltage level lower than the preset high voltage level.
6. A power generation circuit of a display device, the display device further comprising a display panel and a driving circuit, the display panel being electrically connected to the driving circuit, the driving circuit driving a plurality of pixels of the display panel to display an image on the display panel, the power generation circuit outputting a first voltage and transmitting the first voltage to the plurality of pixels of the display panel, the first voltage having a predetermined high voltage level, the power generation circuit comprising:
a voltage output circuit for outputting a second voltage; and
the voltage conversion circuit is electrically connected with the voltage output circuit and outputs the first voltage according to the second voltage and a control signal, the voltage conversion circuit comprises a first switch and a second switch, the first ends of the first switch and the second switch are connected with each other and receive the control signal, the second ends of the first switch and the second switch are connected with each other and are electrically connected with the voltage output circuit so as to receive the second voltage, the third end of the first switch outputs the first voltage, and the third end of the second switch is connected with a grounding end;
wherein, in a period of the first voltage, the control signal makes the first voltage output by the voltage conversion circuit rise to the predetermined high voltage level, and makes the highest voltage level of the last falling edge of the first voltage less than the predetermined high voltage level;
wherein, the waveform of one period of the first voltage comprises a square wave with the preset high voltage level and a plurality of sawtooth waves with the highest voltage level lower than the preset high voltage level;
after the control signal enables the first voltage output by the voltage conversion circuit to rise to the preset high voltage level, the control signal is switched rapidly, the voltage level of the first voltage rises and falls according to the rapid switching of the control signal, the highest voltage level of the first voltage obtained after each switching is enabled to be lower and lower, and the duty ratio of the control signal determines the highest voltage level of the first voltage in a period of time.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107437407A (en) * | 2017-08-11 | 2017-12-05 | 昆山龙腾光电有限公司 | Public voltage generating circuit and liquid crystal display device |
| CN209015702U (en) * | 2018-10-25 | 2019-06-21 | 惠科股份有限公司 | Power supply voltage compensation circuit of display panel and display device |
| CN110133926A (en) * | 2019-04-04 | 2019-08-16 | 惠科股份有限公司 | Display panel and display device |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8742691B2 (en) * | 2010-06-28 | 2014-06-03 | Rohm Co., Ltd. | Load driving circuit |
| KR20140042310A (en) * | 2012-09-28 | 2014-04-07 | 엘지디스플레이 주식회사 | Dc-dc converter control circuit and image display device using the samr and driving method thereof |
| CN105450025A (en) * | 2015-11-26 | 2016-03-30 | 青岛盛嘉信息科技有限公司 | Radio frequency power supply circuit |
| CN109088536B (en) * | 2017-06-13 | 2021-02-12 | 华润微集成电路(无锡)有限公司 | Active power factor correction circuit and method for improving harmonic waves and driving system |
| CN107665687A (en) * | 2017-10-26 | 2018-02-06 | 惠科股份有限公司 | Display device |
| CN107545872A (en) * | 2017-10-26 | 2018-01-05 | 惠科股份有限公司 | Display device |
| CN108320715A (en) * | 2018-01-03 | 2018-07-24 | 惠科股份有限公司 | Liquid crystal display device and driving method thereof |
| CN108831404B (en) * | 2018-09-11 | 2020-08-11 | 惠科股份有限公司 | Display panel, driving method thereof and display device |
-
2020
- 2020-08-19 CN CN202010837447.XA patent/CN111933088B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107437407A (en) * | 2017-08-11 | 2017-12-05 | 昆山龙腾光电有限公司 | Public voltage generating circuit and liquid crystal display device |
| CN209015702U (en) * | 2018-10-25 | 2019-06-21 | 惠科股份有限公司 | Power supply voltage compensation circuit of display panel and display device |
| CN110133926A (en) * | 2019-04-04 | 2019-08-16 | 惠科股份有限公司 | Display panel and display device |
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