CN111900981A

CN111900981A - OSC circuit and dynamic bandwidth adjusting method applied to OSC circuit

Info

Publication number: CN111900981A
Application number: CN202010548144.6A
Authority: CN
Inventors: 黄俊钦; 李瑞兴; 戴国梁
Original assignee: Hefei Pinetech Electronics Co ltd
Current assignee: Hefei Pinetech Electronics Co ltd
Priority date: 2020-06-16
Filing date: 2020-06-16
Publication date: 2020-11-06

Abstract

The OSC circuit comprises a bias current input end, a current trimming module, a capacitor module, a comparator, a logic driving module and an output end which are sequentially connected, and further comprises a controllable current bias point; the current bias point of the comparator is connected with the controllable current bias point; the controllable current bias point is positioned at the rear end of the current trimming module. In the OSC circuit provided by the invention, the bias current point VB of the comparator is connected with a controllable current bias point in the OSC circuit, so that the bias current of the comparator and the output frequency of the OSC circuit synchronously change, the bandwidth of the comparator also changes along with the output frequency of the OSC circuit, the circuit requirement under the corresponding frequency is met, and the dynamic adjustment of the bandwidth is realized. In this way, the need for the comparator of the OSC circuit to be designed to meet the requirements of all frequency ranges is avoided.

Description

OSC circuit and dynamic bandwidth adjusting method applied to OSC circuit

Technical Field

The present invention relates to the field of circuit technologies, and in particular, to an OSC circuit and a dynamic bandwidth adjusting method applied to the OSC circuit.

Background

With the functional requirements of ICs (integrated circuits) becoming more and more extensive, the integrated design of an SOC (system on chip) system integrated with an analog circuit and a digital circuit becomes a necessary development trend of IC design, and the OSC oscillator cannot be separated from the digital circuit when the digital circuit normally works, so the performance of the OSC oscillator directly affects the overall performance of the digital circuit, and further affects the performance of the whole system.

The OSC is usually designed by an analog circuit, and in order to reduce the sensitivity of the OSC frequency to temperature, a voltage range of a charge/discharge capacitor is generally adjusted and controlled by using a comparator structure, and the higher the frequency is, the larger the bandwidth of the comparator to be designed needs to be, so that the bandwidth design of the comparator in the OSC circuit plays a crucial role.

The comparator is a common integrated circuit, has very wide application, and can be used for an alarm circuit, an automatic control circuit, an A/D conversion circuit, a high-speed sampling circuit, a power supply voltage detection circuit, a zero-crossing detection circuit, an oscillator OSC, a voltage-controlled oscillator circuit and the like; the main technical indexes of the comparator are bias current, open-loop gain, input offset voltage, precision, response speed, propagation delay time, sensitivity and the like; different applications determine the bias of the various specifications of the comparator.

For the comparator circuit design applied to the Oscillator (OSC), the response speed is usually more concerned due to the higher frequency, and the response speed of the comparator has a direct correlation with the bandwidth; therefore, bandwidth design of the comparator in the OSC circuit is very important.

A bias current that is stable at different temperatures is usually designed in the circuit to provide bias for each module. A conventional OSC circuit generally consists of a bias current input terminal, a current trimming module, a capacitor module, a comparator, a logic driving module, and an output terminal, as shown in fig. 1. The output end is used for outputting the target frequency, the frequency value is a key performance index of the target frequency, and the precision of the frequency can directly influence the performance of the digital circuit. However, as the process fluctuates, the actual OSC frequency deviates from the target frequency by a certain amount, so that the OSC frequency needs to be adjusted to a desired target value by trimming, and a certain accuracy range is satisfied, thereby ensuring that the digital circuit can normally operate. The existing trimming method is to adjust the charging current of the OSC, that is, to adjust the output current of the current trimming module by adjusting the trim code (adjusting current signal), so as to adjust the frequency value output by the OSC and obtain the target frequency value required by the design. The existing OSC comparator is designed by connecting a Current source Bias VB to a Bias _ Current point, and using a fixed Bias Current to obtain a relatively fixed bandwidth.

However, since the frequency of the OSC varies with the process temperature, the bandwidth of the comparator is usually designed to be larger to meet the circuit requirements under different conditions. However, the bandwidth of the comparator is related to the magnitude of the bias current source, and if the bandwidth is large, the required bias current is also correspondingly large, which results in higher power consumption of the comparator.

Disclosure of Invention

Based on the technical problems in the background art, the invention provides an OSC circuit and a dynamic bandwidth adjusting method applied to the OSC circuit.

The OSC circuit comprises a bias current input end, a current trimming module, a capacitor module, a comparator, a logic driving module and an output end which are sequentially connected, and further comprises a controllable current bias point; the current bias point of the comparator is connected with the controllable current bias point; the controllable current bias point is positioned at the rear end of the current trimming module.

Preferably, the controllable current bias point is located at the front end of the comparator.

Preferably, the controllable current bias point is an equipotential point of the output end of the current trimming module.

A controllable current bias point is arranged on a circuit which is positioned at the rear end of a current trimming module in the OSC circuit, and the current bias point of a comparator is modified to be connected with the controllable current bias point.

Preferably, the controllable current bias point is located on a series circuit between the current trimming module and the comparator.

In the OSC circuit provided by the invention, the bias current point VB of the comparator is connected with a controllable current bias point in the OSC circuit, so that the bias current of the comparator and the output frequency of the OSC circuit synchronously change, the bandwidth of the comparator also changes along with the output frequency of the OSC circuit, the circuit requirement under the corresponding frequency is met, and the dynamic adjustment of the bandwidth is realized. In this way, the need for the comparator of the OSC circuit to be designed to meet the requirements of all frequency ranges is avoided.

The invention also provides a dynamic bandwidth adjusting method applied to the OSC circuit, which is characterized in that a current bias point VB of the comparator is modified to be connected with a controllable current bias point arranged in the OSC circuit, so that when the target frequency output by the OSC circuit changes, the bias current of the comparator can be adjusted simultaneously, the bandwidth of the comparator is adjusted, and the bandwidth of the comparator can be dynamically adjusted along with the OSC frequency.

By the invention, when the comparator of the OSC circuit is designed, the comparator does not need to be designed to meet the requirements of all frequency ranges, the over-design condition is avoided, and when the frequency is lower, the power consumption of the corresponding comparator is also lower, and the flexibility of the whole circuit design is higher.

Drawings

FIG. 1 is a block diagram of a conventional OSC circuit;

FIG. 2 is a block diagram of an OSC circuit according to the present invention;

fig. 3 is a flowchart of a dynamic bandwidth adjustment method applied to an OSC circuit according to another embodiment of the present invention.

Detailed Description

Referring to fig. 1, an OSC circuit according to the present invention includes a bias current input terminal, a current trimming module, a capacitor module, a comparator, a logic driving module, and an output terminal, which are sequentially connected. Specifically, the Bias Current input end is used for transmitting the Bias Current Bias _ Current to the Current Trimming module, the Current Trimming module is used for Trimming the Bias Current by combining an obtained Trimming Current signal (Trimming _ code) and then charging the capacitor module, the capacitor module is connected with the logic driving module through the comparator, and the logic driving module is used for controlling the output end to output the required target frequency OSC _ OUT.

The OSC circuit in this embodiment further includes a controllable current bias point VC; the current bias point VB of the comparator is connected to the controllable current bias point VC. The controllable current bias point VC is positioned at the rear end of the current trimming module, so that an electric signal of the controllable current bias point VC is a bias voltage point generated by the output current of the capacitance trimming module, and the current bias point VB of the comparator is connected with the controllable current bias point VC, so that the bias current obtained by the comparator and the current trimmed by the current trimming module synchronously change, the frequency width of the comparator, the output frequency of the OSC circuit and the bias current input by the bias current input end are in a direct proportion relation, the output frequency of the OSC circuit is improved, the frequency width of the comparator is also improved, the frequency width of the comparator under each output frequency can meet the requirements of the OSC circuit, the frequency width of the comparator is dynamically adjusted along with the output frequency of the OSC, and the flexibility and the reliability of the OSC circuit are improved.

In this embodiment, the controllable current bias point VC is located at the front end of the comparator, and may be specifically set to be an equipotential point at the output end of the current trimming module. Therefore, the bias current obtained by the comparator is further changed in proportion to the charging current of the capacitor module.

The invention also provides a dynamic bandwidth adjusting method applied to the OSC circuit, wherein a controllable current bias point VC is arranged on a circuit positioned at the rear end of the current trimming module in the OSC circuit, and the current bias point VB of the comparator is transformed to be connected with the controllable current bias point VC.

Therefore, on the basis of the existing OSC circuit, the input of the current bias point VB of the comparator is modified from a fixed current value to an electric signal of the controllable current bias point VC, so that the bias current obtained by the comparator and the target frequency output by the OSC circuit synchronously change and are in a direct proportion relation, the target frequency output by the OSC circuit is improved, and meanwhile, the bandwidth of the comparator is also improved, and the bandwidth of the comparator under each frequency can meet the circuit requirements.

In a specific implementation, the controllable current bias point VC is located on a series circuit between the current trimming module and the comparator, for example, the controllable current bias point VC is an equipotential point of the output end of the current trimming module. Therefore, the bias current of the comparator can be further ensured to be adjusted while the magnitude of the current value of the capacitor charged by the OSC is adjusted.

The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention are equivalent to or changed within the technical scope of the present invention.

Claims

1. An OSC circuit comprises a bias current input end, a current trimming module, a capacitor module, a comparator, a logic driving module and an output end which are connected in sequence, and is characterized by also comprising a controllable current bias point (VC); the current bias point (VB) of the comparator is connected with the controllable current bias point (VC); the controllable current bias point (VC) is positioned at the rear end of the current trimming module.

2. The OSC circuit of claim 1, wherein the controllable current bias point (VC) is located at the comparator front end.

3. The OSC circuit of claim 2, wherein the controllable current bias point (VC) is an equipotential point at the output of the current trimming module.

4. A dynamic bandwidth adjusting method applied to an OSC circuit is characterized in that a controllable current bias point (VC) is arranged on a circuit positioned at the rear end of a current trimming module in the OSC circuit, and a current bias point (VB) of a comparator is modified to be connected with the controllable current bias point (VC).

5. The method of claim 4 in which the controllable current bias point (VC) is located in a series circuit between the current trimming module and the comparator.

6. The method of claim 5, wherein the controllable current bias point (VC) is an equipotential point of the output of the current trimming module.