CN111895993B - Miniature star sensor circuit system - Google Patents
Miniature star sensor circuit system Download PDFInfo
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- CN111895993B CN111895993B CN202010773323.XA CN202010773323A CN111895993B CN 111895993 B CN111895993 B CN 111895993B CN 202010773323 A CN202010773323 A CN 202010773323A CN 111895993 B CN111895993 B CN 111895993B
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Abstract
The invention discloses a circuit system of a miniature star sensor, which comprises: the power supply conversion and monitoring protection circuit comprises a power supply conversion and monitoring protection circuit and an internal chip; the internal chip comprises a driving detector, an FPGA and a DSP; the power supply conversion and monitoring protection circuit is used for converting voltage, supplying power to the internal chip and monitoring and controlling current of the driving detector in real time; the driving detector is used for acquiring an original star map, forming star map data and sending the star map data to the FPGA; the FPGA is used for processing the received star map data to obtain star map information; the DSP is used for acquiring the star atlas information, performing star atlas identification and attitude calculation on the star atlas information according to a star atlas and an identification algorithm, packaging to obtain a telemetering data packet, and sending the telemetering data packet to the satellite attitude and orbit control subsystem through the FPGA. The invention designs the light and small high-precision star sensor, improves the reliability and prolongs the service life.
Description
Technical Field
The invention relates to the technical field of space satellite and astronomical measurement, in particular to a circuit system of a miniature star sensor.
Background
The star sensor is a key component of a GNC system of the spacecraft and is mainly used for three-axis attitude measurement of the spacecraft and navigation of the spacecraft. The star sensor generally comprises an optical mechanical structure system, a photoelectric detection and signal processing circuit and software, and is based on a computer vision measurement theory, stable optical signals of fixed stars are used as input, three-axis attitude information of a star sensor body relative to a geocentric inertial coordinate system is used as output, and therefore the three-axis attitude information of the spacecraft body relative to the geocentric inertial system is obtained.
The same as a large satellite, a commercial micro satellite needs a star sensor to provide an attitude measurement system for the large satellite, but the weight and the volume are generally small, so that a configured single machine is restricted by resources in the aspects of mass, volume, power consumption and the like, the traditional star sensor cannot meet the application requirements of the micro satellite, and the micro star sensor with small volume, light weight and low power consumption is designed and developed to have wide application market.
With the requirement of users represented by internet small satellites on the miniature star sensor, the requirement of users represented by the internet small satellites on the miniature star sensor at present provides the requirement of high reliability and long service life (5-10 years), the space adaptability of a circuit system of main factors of the miniature star sensor is limited in the past, the circuit design needs to be optimized to improve the reliability, meanwhile, devices of a novel process are selected to improve the performance of the circuit, the size is reduced, radiation-resistant and latch-resistant components are selected to increase the space on-orbit working time, and finally the high reliability and long service life of the miniature star sensor is achieved.
Disclosure of Invention
The technical problem to be solved by the invention is to provide a circuit system of a micro star sensor aiming at the defects of the prior art, so that the reliability and the service life are improved on the premise of light weight, small size and high precision.
In order to solve the above problems, the present invention is realized by the following technical scheme:
a miniature star sensor circuitry, comprising: the power supply conversion and monitoring protection circuit comprises a power supply conversion and monitoring protection circuit 1 and an internal chip connected with the power supply conversion and monitoring protection circuit 1; the internal chip comprises a driving detector 2, an FPGA3 and a DSP 4; the power supply conversion and monitoring protection circuit 1 is used for converting voltage, supplying power to the internal chip and monitoring and controlling current of the driving detector 2 in real time; the driving detector 2 and the DSP 4 are respectively connected with the FPGA 3; the driving detector 2 is used for acquiring an original star map, forming star map data and sending the star map data to the FPGA 3; the FPGA3 is used for processing the received star atlas data to obtain star atlas information; the DSP 4 is used for acquiring the star map information, performing star map identification and attitude calculation on the star map information according to a star catalogue and an identification algorithm, packaging to obtain a telemetering data packet, and sending the telemetering data packet to a satellite attitude and orbit control subsystem through the FPGA 3.
Preferably, the power conversion and monitoring protection circuit 1 includes: the device comprises a chip, a low-voltage protection circuit, a filter circuit of an input power supply, a slow start circuit, a chip detection circuit, an output and feedback circuit and a power supply monitoring protection circuit; the input end of the low-voltage protection circuit is connected with the input end of the filter circuit of the input power supply; the output end of the low-voltage protection circuit is connected with the chip; the output end of the filter circuit of the input power supply is connected with the chip; the low-voltage protection circuit is used for detecting an input voltage value and controlling the input circuit to be switched off; the filter circuit of the input power supply is used for controlling the fluctuation of the input voltage; the input end of the slow starting circuit is connected with the chip, and the output end of the slow starting circuit is connected with a ground wire; the slow starting circuit is used for controlling the starting time of the chip; the input end of the chip detection circuit is connected with the chip, and the output end of the chip detection circuit is connected with the internal chip; the chip detection circuit is used for detecting the state of the chip; the input end of the output and feedback circuit is connected with the chip, and the output end of the output and feedback circuit is connected with the internal chip; the output and feedback circuit is used for reducing output ripple voltage and realizing voltage conversion; the power supply monitoring protection circuit inputs a current signal and performs enable end level processing on the current signal to obtain a power supply turn-off signal; and the power supply monitoring protection circuit is used for controlling the turn-off of the chip according to the power supply turn-off signal and monitoring the power supply state of the driving detector 2.
Preferably, the internal chip further includes: a program solid-state memory 5, a program static random access memory 6, and an image static random access memory 7; the program solid-state memory 5 is respectively connected with the FPGA3 and the DSP 4 through an address bus and a data bus; the program static random access memory 6 is respectively connected with the FPGA3 and the DSP 4 through the address bus and the data bus; the image static random access memory 7 is connected with the FPGA 3; the program solid-state memory 5 is used for storing the star atlas information, application software required by the DSP 4 during operation and data information obtained after operation; the program static random access memory 6 is used for running the application software loaded after the program solid-state memory 5 is powered on and reset; the image static random access memory 7 is used as a window image memory of the FPGA3 and a window control word memory of the DSP 4 in a space operation stage; and under the star map mode, outputting and caching the star map data.
The internal chip further includes: a field programmable gate array restorer 8, a digital signal processing restorer and a watchdog 11; the field programmable gate array restorer 8 is connected with the FPGA 3; the digital signal processing restorer and the watchdog 11 are respectively connected with the FPGA3 and the DSP 4; the field programmable gate array restorer 8 is used for carrying out resetting operation on the FPGA3 which fails; the digital signal processing restorer and watchdog 11 is used for resetting the DSP 4 which fails; and detecting the voltage of the DSP 4 and the bus, and delaying the start of the DSP 4.
Preferably, the internal chip further includes: 422 interface 9 and low voltage differential signal interface 10; the 422 interface 9, the low voltage differential signal interface 10 and the FPGA3 are connected to each other; the 422 interface 9 and the low-voltage differential signal interface 10 are respectively connected with a satellite attitude and orbit control subsystem; the 422 interface 9 is used for connecting and communicating a satellite attitude and orbit control subsystem with the star sensor; the low voltage differential signal interface 10 is used for providing the original star map, the star map data and the program operation process data of the DSP 4 to the satellite attitude and orbit control subsystem in the space operation stage; in the ground test stage, a test star map formed by simulating the functions of the driving detector 2 by a test computer is provided for the FPGA 3.
Preferably, the drive detector 2 includes a pixel array power supply, a digital and port power supply, and an image output power supply.
Preferably, the output and feedback circuit comprises an LC filter circuit; the LC filter circuit consists of an inductor L1, a capacitor C7 and a capacitor C11; the LC filter circuit is used for reducing the output ripple voltage.
Preferably, the power monitoring and protecting circuit 1 comprises an overvoltage protection circuit; the overvoltage protection circuit is composed of a resistor R64, a fuse F1, a fuse F2 and a transient diode D5; the overvoltage protection circuit is used for enabling the star sensor to discharge current when the whole star power supply generates pulses.
The invention has at least one of the following advantages:
the circuit system of the miniature star sensor provided by the invention realizes the aims of lightness, miniaturization, high precision, high reliability, long service life and the like, and meets the requirement of 5-10 years of on-orbit work of a user. The power supply system is a switching power supply, the efficiency can reach 95 percent, the power consumption (power consumption is about 1.6W) of the whole machine is reduced, and protective circuits such as overvoltage, low voltage, overcurrent, overheat and slow start are designed to protect the micro star sensor from being damaged by the severe external power supply conditions and prevent the normal work of the upper-stage power supply system from being influenced when the micro star sensor fails. The current monitoring and control design is adopted for devices such as a driving detector and the like which are easy to generate latch-up effect by space single-particle radiation, so that the device is prevented from being burnt out or the work of a superior power supply system is prevented from being influenced due to large current. The hardware write protection of the application software memory can effectively prevent program misoperation and erasure and improve the reliability of a software program. The power supply and the running time of the DSP are monitored, the phenomenon that the normal function running is influenced due to unstable power supply or program runaway is avoided, and the reliability of the miniature star sensor is improved. A peripheral circuit of the driving detector is designed according to the characteristics of the fixed star, so that low background noise is realized, the accuracy of solving the mass center of the star point is high, and the accuracy of the whole machine reaches 3% in the X and Y directions and 20 "(3 sigma) in the Z direction. The components, except for the driving detector and the FPGA, realize localization, effectively reduce the forbidden risk and improve the reliability of the development and production of the miniature star sensor.
Drawings
FIG. 1 is a schematic diagram of a circuit system of a micro star sensor according to an embodiment of the present invention;
fig. 2 is a partial circuit diagram of a power conversion and monitoring protection circuit according to an embodiment of the invention;
fig. 3 is a circuit diagram of an overvoltage protection circuit of a power conversion and monitoring protection circuit according to an embodiment of the invention;
FIG. 4 is a circuit diagram of a program solid state memory according to an embodiment of the present invention;
fig. 5 is a circuit diagram of a digital signal processing reset and a watchdog according to an embodiment of the present invention.
Detailed Description
The micro star sensor circuit system according to the present invention will be described in detail with reference to fig. 1 to 5 and the following detailed description. The advantages and features of the present invention will become more apparent from the following description. It should be noted that the drawings are in a very simplified form and are all drawn to a non-precise scale for the purpose of convenience and clarity only to aid in the description of the embodiments of the invention. To make the objects, features and advantages of the present invention more comprehensible, reference is made to the accompanying drawings. It should be understood that the structures, ratios, sizes, and the like shown in the drawings and described in the specification are only used for matching with the disclosure of the specification, so as to be understood and read by those skilled in the art, and are not used to limit the implementation conditions of the present invention, so that the present invention has no technical significance, and any structural modification, ratio relationship change or size adjustment should still fall within the scope of the present invention without affecting the efficacy and the achievable purpose of the present invention.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising a … …" does not exclude the presence of another identical element in a process, method, article, or apparatus that comprises the element.
As shown in fig. 1, the present embodiment provides a circuit system of a micro star sensor, including: the power supply conversion and monitoring protection circuit comprises a power supply conversion and monitoring protection circuit 1 and an internal chip connected with the power supply conversion and monitoring protection circuit 1; the internal chip comprises a driving detector 2, an FPGA3 and a DSP 4; the power supply conversion and monitoring protection circuit 1 is used for converting voltage, supplying power to the internal chip and monitoring and controlling current of the driving detector 2 in real time; the driving detector 2 and the DSP 4 are respectively connected with the FPGA 3; the driving detector 2 is used for acquiring an original star map, forming star map data and sending the star map data to the FPGA 3; the FPGA3 is used for processing the received star map data to obtain star map information; the DSP 4 is used for acquiring the star map information, performing star map identification and attitude calculation on the star map information according to a star catalogue and an identification algorithm, packaging to obtain a telemetering data packet, and sending the telemetering data packet to a satellite attitude and orbit control subsystem through the FPGA 3.
As shown in fig. 2, the power conversion and monitoring protection circuit 1 includes: the device comprises a chip, a low-voltage protection circuit, a filter circuit of an input power supply, a frequency control circuit, an output and feedback circuit, a compensation circuit, a slow start circuit, a chip detection circuit and a power supply monitoring protection circuit; the input end of the low-voltage protection circuit is connected with the input end of the filter circuit of the input power supply; the output end of the low-voltage protection circuit is connected with the chip; the output end of the filter circuit of the input power supply is connected with the chip; the low-voltage protection circuit is used for detecting an input voltage value and controlling the input circuit to be switched off; the filter circuit of the input power supply is used for controlling the fluctuation of the input voltage; the input end of the slow starting circuit is connected with the chip, and the output end of the slow starting circuit is connected with a ground wire; the slow starting circuit is used for controlling the starting time of the chip; the input end of the chip detection circuit is connected with the chip, and the output end of the chip detection circuit is connected with the internal chip; the chip detection circuit is used for detecting the state of the chip; the input end of the output and feedback circuit is connected with the chip, and the output end of the output and feedback circuit is connected with the internal chip; the output and feedback circuit is used for reducing output ripple voltage and realizing voltage conversion; the power supply monitoring protection circuit inputs a current signal and performs enable end level processing on the current signal to obtain a power supply turn-off signal; the power supply monitoring protection circuit is used for controlling the turn-off of the chip according to the power supply turn-off signal and monitoring the power supply state of the driving detector 2.
The input end is a current input end, and the output end is a current output end.
The second pin and the fifth pin of the chip are connected with the low-voltage protection circuit and the filter circuit of the input power supply; the fifth pin, the sixth pin and the seventh pin of the chip are connected; a third pin and a fourth pin of the chip are connected with the frequency control circuit; the first pin, the eighth pin, the ninth pin and the tenth pin of the chip are connected with a ground wire; the fifteenth pin, the sixteenth pin and the seventeenth pin of the chip are connected with the output and feedback circuit; an eleventh pin, a twelfth pin, a thirteenth pin, a fourteenth pin and a fifteenth pin of the chip are connected; an eighteenth pin of the chip is connected with the compensation circuit; a nineteenth pin of the chip is connected with the slow start circuit; the twentieth pin of the chip is connected with the chip detection circuit; the power supply monitoring protection circuit is composed of an overvoltage protection circuit.
The low-voltage protection circuit is used for preventing the star sensor load pressure from being overlarge when the power conversion and monitoring protection circuit 1 supplies power to the star sensor due to overlarge current in low voltage.
The low-voltage protection circuit includes:
the second pin is connected with the second end of the resistor R4 and the first end of the resistor R5; the first end of the resistor R4 is connected with the fifth pin, and the second end of the resistor R5 is connected with a ground wire; the low pressure range is set to +4V.
The filter circuit of the input power supply is used for reducing the influence of the input voltage on a chip in the power supply conversion and monitoring protection circuit 1 when the input voltage fluctuates; the filter circuit of the input power supply includes: the fifth pin is connected with the first end of the capacitor C5, the first end of the capacitor C6 and the input voltage end; the second end of the capacitor C5 is connected with the first end of the capacitor C10; the second end of the capacitor C10 is connected with a ground wire; and the second end of the capacitor C6 is connected with the ground wire.
The frequency control circuit includes:
the third pin is connected with the second end of the resistor R6; the first end of the resistor R6 is connected with the first end of the resistor R7 and is connected with a ground wire; and the second end of the resistor R7 is connected with the fourth pin.
The output and feedback circuit includes:
the sixteenth pin is connected with the first end of the capacitor C1; the fifteenth pin is connected with the second end of the capacitor C1 and the first end of the inductor L1; the second end of the inductor L1 is connected with the first end of the resistor R8, the first end of the capacitor C7 and the first end of the inductor L2; the seventeenth pin is connected with the second end of the resistor R8 and the first end of the resistor R12; the second end of the resistor R12 is connected with a ground wire; the second end of the capacitor C7 is connected with the first end of the capacitor C11; the second end of the capacitor C11 is connected with a ground wire; and the second end of the inductor L2 is connected with the first output voltage end.
The output and feedback circuit comprises an LC filter circuit; the LC filter circuit is composed of the inductor L1, the capacitor C7 and the capacitor C11; the LC filter circuit is used for reducing the output ripple voltage.
The compensation circuit includes:
the eighteenth pin is connected with the first end of the resistor R14 and the first end of the capacitor C13; the second end of the resistor R14 is connected with the first end of the capacitor C14; and the second end of the capacitor C14 is connected with the second end of the capacitor C13 and is connected with the ground wire in parallel.
And the slow starting circuit is used for controlling the starting time of the chip by setting the input voltage to the capacitor resistor on the periphery of the chip in the power conversion and monitoring protection circuit 1.
The slow start circuit includes:
the nineteenth pin is connected with the first end of the capacitor C12; and the second end of the capacitor C12 is connected with the ground wire.
The chip detection circuit includes:
the twentieth pin is connected with the second end of the resistor R3 and the first output voltage end; the first end of the resistor R3 is connected with the second end of the resistor R1 and the first end of the resistor R2; the first end of the resistor R1 is connected with the input voltage end; and the second end of the resistor R2 is connected with the ground wire.
The power supply monitoring protection circuit is used for realizing the power supply conversion and the switching off of a chip in the monitoring protection circuit 1 by controlling the signal level of an enable end; and monitoring the state of a chip in the power supply conversion and monitoring protection circuit 1 through the FPGA 3.
As shown in fig. 3, the power monitoring protection circuit includes:
the input voltage end is connected with a first end of a resistor R64 and a first end of a fuse F2; the second end of the resistor R64 is connected with the first end of the fuse F1; the second end of the fuse F1 is connected with the second end of the fuse F2, the first end of the transient diode D5, the first end of the capacitor C45 and the first end of the inductor L3; the second end of the transient diode D5 is connected with a ground wire; the second end of the capacitor C45 is connected with the first end of the capacitor C48; the second end of the capacitor C48 is connected with the ground wire; the second end of the inductor L3 is connected with the first end of the capacitor C46 and the second output voltage end; the second end of the capacitor C46 is connected with the first end of the capacitor C49; and the second end of the capacitor C49 is connected with the ground wire.
The power supply monitoring protection circuit 1 comprises the overvoltage protection circuit; the overvoltage protection circuit is composed of the resistor R64, the fuse F1, the fuse F2 and the transient diode D5; the overvoltage protection circuit is used for enabling the star sensor to discharge current when the whole star power supply generates pulses; when the primary bus voltage changes, the input voltage is limited within a certain range, and a back-end circuit system is prevented from being damaged; the overpressure range is set to +7V.
In the circuit diagram, the above elements are the first end and the second end from left to right or from top to bottom in sequence.
The components in the power conversion and monitoring protection circuit 1 are domestic anti-radiation switch power chips, so that the reliability of the space environment can be improved, the working efficiency can be improved, the power consumption of the whole machine (the total power consumption is 1.61W) can be reduced, and the power consumption conditions of main modules of a circuit system are shown in the following table.
The low-voltage protection threshold voltage is designed, capacitors are arranged at the input end and the output end, as the requirement of a driving detector for power supply is periodically changed, the transient ripple current is large, the output end adopts a CAK55 series high-molecular conductive polymer chip type tantalum capacitor (a capacitor with a plus sign in figures 2 and 3) of the international latest technology, the ESR is low (one tenth of the normal tantalum capacitor), the low-voltage protection threshold voltage can bear 10 times of ripple current of the common tantalum capacitor, the capacitance is improved, and the volume of a printed board is reduced.
The power supply conversion and monitoring protection circuit 1 reduces the load pressure of a superior power supply system by designing protection circuits such as low voltage, overvoltage and slow start, and ensures that the superior power supply system is not influenced when a product fails; the three power supplies (pixel array power supply, digital and port power supply and image output power supply) for driving the detector 2 are monitored in real time, the power supply is automatically cut off when a single particle is latched, the FPGA3 is informed, the power supply state is displayed, and a user sends an instruction to control the on-off of the driving detector 2 according to the state. The scheme can improve the reliability and the service life of the miniature star sensor.
The driving detector 2 is used for shooting an original star map and forming star map data; and designing self external bias voltage according to the star target characteristics and the response characteristics of the driving detector, and carrying out sensitivity and background energy allocation on the external bias voltage.
The driving detector 2 is an SPI driving detector which is a 2048 multiplied by 2048 large-area array, high-sensitivity and anti-halation micro-photosensor. The detection capability of different star sensors is different and mainly depends on the quantum efficiency, gain, exposure time and the like of the driving detector 2, and the star sensor in the invention needs the detection capability of 6 stars and the like, so that configuration of bias voltages such as charging voltage, starting voltage, reset voltage and the like of a photoelectric converter is needed.
The FPGA3 is used for receiving the star map data output by the driving detector 2 by configuring an SPI register for the driving detector 2 and processing the star map data to obtain star map information; tracking a satellite peripheral window image; detecting the state signals of the pixel array power supply, the digital and port power supply and the image output power supply of the driving detector 2 in real time through an internal design program of the driving detector, and controlling the on-off of the driving detector 2; and the FPGA3 performs image gray level calculation, threshold segmentation and fixed star point centroid calculation on star map data to obtain star map information such as star point centroid coordinates.
The DSP 4 is used for carrying out star map recognition and attitude calculation on star map information through a fixed star table and a recognition algorithm to obtain a telemetering data packet according to the received interrupt signal sent by the FPGA3, and packaging the telemetering data packet to the FPGA 3; the internal chip further includes: a program solid-state memory 5, a program static random access memory 6, and an image static random access memory 7; the program solid-state memory 5 is respectively connected with the FPGA3 and the DSP 4 through an address bus and a data bus; the program static random access memory 6 is respectively connected with the FPGA3 and the DSP 4 through the address bus and the data bus; the image static random access memory 7 is connected with the FPGA 3; the program solid-state memory 5 is used for storing the star atlas information, application software required by the DSP 4 during operation and data information obtained after operation; the program static random access memory 6 is used for running the application software loaded after the program solid-state memory 5 is powered on and reset; the image static random access memory 7 is used as a window image memory of the FPGA3 and a window control word memory of the DSP 4 in a space operation stage; and under the star map mode, outputting and caching the star map data.
The star table and the identification algorithm are stored in the program solid-state memory 5, and when the star sensor is electrified and works, the star table and the identification algorithm are copied from the program solid-state memory 5 to the program static random access memory 6 to run. After the star sensor is powered on, the reset circuit automatically resets the FPGA3 and the DSP 4. The FPGA3 generates a read-write signal according to the read-write control signal and the high-order address decoding sent by the DSP 4, thereby controlling the program solid-state memory 5 and the program static random access memory 6.
The telemetering data packet comprises a sensitive period attitude 4 element, a detection star, a navigation star and an attitude determination star element, a gray level mean value of a picture, an angular rate and the like. And the DSP 4 packages the telemetering data packet and sends the telemetering data packet to the satellite attitude and orbit control subsystem for use through a serial port module of the FPGA 3.
When the program solid-state memory 5 enables any signal by designing a protection signal, the storage space can not modify the content in the program solid-state memory 5.
As shown in FIG. 4, in the circuit of the program solid-state memory 5, pins A0 to A17 of a chip are connected with a 23-bit address bus; the DQ 0-DQ 31 pins are connected with a 32-bit data bus; the CE # pin is connected with a chip selection signal circuit; the pin OE # (G #) is connected with a read enable control signal circuit; the GD # pin is connected with a read bus enabling signal circuit; the WE # pin is connected with a write control signal circuit; the VDD pin is connected with a power supply circuit; the A18 th to A19 th pins are connected with a memory partitioning circuit; the RESET # pin is connected with a RESET/standby circuit; the PEN pin is connected with a write operation protection signal circuit; the WP # pin is connected with a write logic protection signal circuit; the VSS pin is connected to ground.
In order to prevent the flash content from being modified by misoperation in the software running process, the solid-state memory 5 is designed with # WP and PEN write protection signals, and when any one signal is enabled, the storage space cannot be erased and programmed. Specific signals are defined as follows: 1. (ii) the/GD is high, the output is controlled by G #; the/GD is low, and a high resistance state is output; PEN is high, chip erasable and program operation; PEN is low, the chip cannot be erased and programmed; 3.L # is low, supporting asynchronous read and write; l # is high, supporting asynchronous bus locking operation; 4.B and K do not support synchronous Burst mode; CS # is high,/FLASH _ RST is high, then enter standby mode. General erasing and programming operations all need software to write corresponding instruction codes, protection on circuit hardware design is added on the basis of the design, the flash storage program content is further guaranteed not to be rewritten through a write protection signal, and the reliability of the micro star sensor is improved. The Flash has an address range of 0x 1000-0 x1FFF, a 128Kbit storage space is total, besides a normal storage read-write function, the Flash also has a PROM function mode that once programming can not be modified, the Flash can be started by writing a special instruction, the storage space can be used for storing important register data or management programs of the micro star sensor, when software fails, an on-orbit fault maintenance mode is started by the data in the area, and the improvement of the system reliability of the micro star sensor is facilitated.
The FPGA3 controls the program solid-state memory 5, the program static random access memory 6 and the image static random access memory 7 through chip selection, read-write signals, a 32-bit data bus and a 23-bit address bus, so that the application software of the DSP 4 is loaded and operated. The star map data and star map information are stored in the image static random access memory 7 through the FPGA3, and the DSP 4 accesses the star map information in the image static random access memory 7 through the FPGA 3.
The FPGA3, the DSP 4, the program solid-state memory 5, the program static random access memory 6 and the image static random access memory 7 are all selected from components with strong radiation resistance and high reliability, so that the service life of the star sensor is prolonged, and the reliability of space work is improved.
The internal chip further includes: a field programmable gate array restorer 8, a digital signal processing restorer and a watchdog 11; the field programmable gate array restorer 8 is connected with the FPGA 3; the digital signal processing restorer and the watchdog 11 are respectively connected with the FPGA3 and the DSP 4; the field programmable gate array restorer 8 is used for carrying out resetting operation on the FPGA3 which fails; the digital signal processing restorer and watchdog 11 is used for resetting the DSP 4 which fails; and detecting the voltage of the DSP 4 and the bus, and delaying the start of the DSP 4.
As shown in fig. 5, in the digital signal processing reset and watchdog 11 circuit, the SENSE1 pin of the chip is connected to the detection circuit with + 3.3V; the SENSE2 pin is connected with a detection circuit with +1.8V voltage; the SENSE3 pin is connected with a detection circuit with +5.0V voltage; the/MR pin is connected with a reset instruction circuit; the VDD pin is connected with a power supply circuit; the/RESET pin is connected with a RESET execution circuit; the GND pin is connected with a ground wire.
When the running application software of the DSP 4 processes data, the power supply of the DSP fluctuates to affect the normal operation of the program. The field programmable gate array restorer 8, the digital signal processing restorer and the watchdog 11 realize sequential time sequence restoration (the restoration time of the FPGA3 is 100ms, and the restoration time of the DSP 4 is 200 ms) of the FPGA3 and the DSP 4 through the capacitor charging of the RC circuit, and the chip pins of the FPGA3 and the DSP 4 are ensured to be in a high-resistance state at the time, so that the program loading and the starting operation are completed. When the DSP software runs and exceeds the set time of the watchdog, the FPGA3 can pass through a reset instruction; when the core supply voltage and the I/O supply voltage of the DSP 4 are lower than the minimum threshold (the core supply voltage minimum threshold of the DSP 4 is 1.71v, and the I/O supply voltage minimum threshold is 3.14V), the digital signal processing reset and watchdog 11 resets the DSP 4 and reloads the program. By the operation, the software can be ensured to work in a normal mode, the risk of a satellite user caused by program operation faults can be reduced to a certain extent, and the reliability of the star sensor is improved.
The internal chip further includes: 422 interface 9 and low voltage differential signal interface 10; the 422 interface 9, the low-voltage differential signal interface 10 and the FPGA3 are connected with each other; the 422 interface 9 and the low-voltage differential signal interface 10 are respectively connected with a satellite attitude and orbit control subsystem; the 422 interface 9 is used for connecting and communicating a satellite attitude and orbit control subsystem with the star sensor; the low voltage differential signal interface 10 is used for providing the original star map, the star map data and the program operation process data of the DSP 4 to the satellite attitude and orbit control subsystem in the space operation stage; in the ground test stage, a test star map formed by simulating the functions of the driving detector 2 by a test computer is provided for the FPGA 3.
The satellite attitude and orbit control subsystem and the star sensor are generally communicated through an RS422 serial port (422 interface 9), the satellite attitude and orbit control subsystem sends a telemetry data request command to the star sensor, the 422 interface 9 converts a differential signal into a single-ended signal, the single-ended signal is provided for the FPGA3 to carry out serial-parallel conversion and then is delivered to the DSP 4, after the DSP 4 finishes calculating and packaging a telemetry data packet, parallel data are converted into serial data through the FPGA3, and the serial data are sent to the satellite attitude and orbit control subsystem through the 422 interface 9.
The 422 interface 9 controls the exposure mode, the gain size, the sensitivity, the background gray scale, the working mode, the switch reset, the synchronous timing, the reading attitude information and the like of the star sensor by sending instructions.
The satellite is an on-board computer in the satellite attitude and orbit control subsystem; the program operation process data of the DSP 4 is some variable parameter information in the star sensor operation process; in the ground test stage, when the driving detector 2 and the lens are not assembled, star map information is injected into the star sensor through the low-voltage differential signal interface 10 interface under the condition of no star field or light star model, so as to simulate the imaging effect of the driving detector 2 under the star field condition.
The driving detector 2, the FPGA3, the DSP 4, the program solid-state memory 5, the program static random access memory 6, the image static random access memory 7, the field programmable gate array restorer 8, the 422 interface 9 and the low-voltage differential signal interface 10 are used for selecting SAST and CAST high-quality grades and irradiation-resistant devices, and on the basis, surface patches and small packaging devices are selected, so that the space of a printed board is saved, reflow soldering is realized, the soldering quality and the circuit reliability are improved, and the service life of the miniature star sensor is prolonged.
The FPGA3 is connected with the driving detector 2 through a low-voltage differential signal; connected to the DSP 4 including, but not limited to, via a 32-bit data bus and a 23-bit address bus; connected with the program solid state memory 5, including but not limited to, by a 23-bit address bus, 20-bit address lines, and a 32-bit data bus; connected to the program sram 6, including but not limited to, by a 23-bit address bus, 19-bit address lines, and a 32-bit data bus; the connection with the image static random access memory 7 includes, but is not limited to, connection through 2 × 16 bit data lines and 2 × 19 bit address lines; the low voltage differential signal interface 10 is connected by a low voltage differential signal.
The DSP 4 is connected with the program solid-state memory 5 by a 23-bit address bus, a 20-bit address line and a 32-bit data bus; including but not limited to, connection to program sram 6 via a 23-bit address bus, 19-bit address lines, and a 32-bit data bus.
The program solid state memory 5 and the program static random access memory 6 include, but are not limited to, being connected by a 23-bit address bus, 19-bit address lines, 20-bit address lines, and a 32-bit data bus.
The FPGA3, DSP 4, program solid state memory 5 and program static random access memory 6 share a 32-bit data bus and a 23-bit address bus.
The chip is composed of a switching power supply and a linear regulator, but the voltage change range of the satellite-borne power supply is large, in order to prevent large current from influencing a satellite power supply system under the condition of low voltage, a low-voltage protection circuit is designed in an input circuit of the star sensor, an overvoltage protection circuit is designed according to the input primary voltage of the star sensor, and when the whole star power supply generates pulses, the star sensor can discharge current through a transient diode (TVS); in order to improve the working voltage of a high-current core low-voltage chip, a switching power supply is selected, and the design scheme of matching an LC filter circuit at the output end can improve the power supply conversion efficiency (for example, the efficiency of a linear regulator for the core voltage of 1V is only 20%, and can reach 95% by using the switching power supply), and the LC filter circuit effectively reduces the output ripple voltage; according to the method, a cascade power supply system is designed according to analysis of power-on time sequence and power consumption requirements of different chips in the star sensor on a power supply, so that the chips of the star sensor can be guaranteed to normally supply power, and meanwhile, the time sequence requirements of power-on, reset and the like are met.
According to the analysis of the star sensor drive detector on the requirement of a power supply and the latch effect, a linear regulator with current monitoring is selected, and the threshold value of the monitoring current is configured through a peripheral circuit; the FPGA3 is used for detecting the state signals of the pixel array power supply, the digital and port power supply and the image output power supply of the driving detector 2 in real time, the monitoring protection circuit automatically cuts off the power supply and informs the FPGA3 when the single particle is latched, and a user sends an instruction to control the on-off of the driving detector according to the state.
The input voltage of the power supply conversion and monitoring protection circuit 1 is 5V; the output voltage is 1.2V, which is the core voltage of the FPGA 3. The power monitoring protection circuit mainly comprises a fuse, a current limiting resistor and a transient diode (TVS). The voltage range of the power supply system is changed, and the conversion voltage of the star sensor can be recovered to be normal.
The mechanical dimension information of the shape of the micro star sensor and the installation position and requirements of the component are specified in the embodiment, and the mechanical dimension of the micro star sensor is shown in the following table:
| name (R) | Numerical value |
| Maximum size of the whole machine | (112±2)mm×(112±2)mm×(163±2)mm |
| Mounting surface size | (95±0.2)mm×(75±0.2)mm |
| Flatness of installation | (200×200):0.1 |
| Mounting hole | |
| 4×(Ф4.5±0.1)mm | |
| Roughness of mounting surface | Not more than 3.2 μm |
| Thickness of mounting lug | (5.0±0.2)mm |
The micro star sensor provided by the embodiment not only realizes the design requirements of microminiature, light weight and low cost, but also achieves or even exceeds foreign mainstream star sensors in various functional performance indexes through various tests and experimental examinations, and the indexes of the micro star sensor and the foreign mainstream star sensors are compared as shown in the following table.
On the basis of meeting the requirements of light weight, miniaturization and low cost, the precision of the star sensor reaches 3' (3 sigma), the dynamic performance can be tracked in an attitude tracking mode at 2.6 degrees per second, the precision standard of high-end products of the mainstream star sensor abroad is met, meanwhile, the circuit design is optimized, protection circuits such as overvoltage, low voltage and slow start are designed, an anti-latch circuit is designed, the quality grade of components is improved, the reliability of a circuit system is improved, the on-orbit service life is predicted to be more than 7 years, and the use requirements of the current commercial satellite on the micro star sensor can be met. The device has the advantages of small volume, light weight, high precision, good dynamic performance, low cost, high reliability, convenient assembly and adjustment, high production efficiency and simple interface, is easy to stand out in the competition of numerous star sensors at home and abroad, and can meet the requirements of commercial satellites and large satellites.
While the present invention has been described in detail with reference to the preferred embodiments, it should be understood that the above description should not be taken as limiting the invention. Various modifications and alterations to this invention will become apparent to those skilled in the art upon reading the foregoing description. Accordingly, the scope of the invention should be determined from the following claims.
Claims (5)
1. A miniature star sensor circuitry, comprising: the power supply conversion and monitoring protection circuit comprises a power supply conversion and monitoring protection circuit (1) and an internal chip connected with the power supply conversion and monitoring protection circuit (1);
the internal chip comprises a driving detector (2), an FPGA (3) and a DSP (4);
the power supply conversion and monitoring protection circuit (1) is used for converting voltage, supplying power to the internal chip and monitoring and controlling current of the driving detector (2) in real time;
the driving detector (2) and the DSP (4) are respectively connected with the FPGA (3);
the driving detector (2) is used for acquiring an original star map, forming star map data and sending the star map data to the FPGA (3);
the FPGA (3) is used for processing the received star map data to obtain star map information;
the DSP (4) is used for acquiring the star map information, performing star map identification and attitude calculation on the star map information according to a star catalogue and an identification algorithm, packaging to obtain a telemetering data packet, and sending the telemetering data packet to a satellite attitude and orbit control subsystem through the FPGA (3);
the power conversion and monitoring protection circuit (1) comprises: the device comprises a chip, a low-voltage protection circuit, a filter circuit of an input power supply, a slow start circuit, a chip detection circuit, an output and feedback circuit and a power supply monitoring protection circuit;
the input end of the low-voltage protection circuit is connected with the input end of the filter circuit of the input power supply; the output end of the low-voltage protection circuit is connected with the chip; the output end of the filter circuit of the input power supply is connected with the chip;
the low-voltage protection circuit is used for detecting an input voltage value and controlling the input circuit to be switched off;
the filter circuit of the input power supply is used for controlling the fluctuation of the input voltage;
the input end of the slow starting circuit is connected with the chip, and the output end of the slow starting circuit is connected with a ground wire;
the slow starting circuit is used for controlling the starting time of the chip;
the input end of the chip detection circuit is connected with the chip, and the output end of the chip detection circuit is connected with the internal chip;
the chip detection circuit is used for detecting the state of the chip;
the input end of the output and feedback circuit is connected with the chip, and the output end of the output and feedback circuit is connected with the internal chip;
the output and feedback circuit is used for reducing output ripple voltage and realizing voltage conversion;
the power supply monitoring protection circuit inputs a current signal and performs enable end level processing on the current signal to obtain a power supply turn-off signal;
the power supply monitoring protection circuit is used for controlling the chip to be turned off according to the power supply turn-off signal and monitoring the power supply state of the driving detector (2);
the components in the power conversion and monitoring protection circuit (1) are anti-radiation switch power chips;
the internal chip also comprises a program solid-state memory (5), and the program solid-state memory (5) is added with circuit hardware design protection;
the driving detector (2) is an SPI driving detector;
the FPGA (3) receives star map data output by the driving detector (2) by configuring an SPI register for the driving detector (2), and processes the star map data to obtain star map information;
the FPGA (3) and the DSP (4) carry out data transmission through a data bus and an address bus;
the internal chip further includes: a field programmable gate array restorer (8), a digital signal processing restorer and a watchdog (11);
the field programmable gate array restorer (8) is connected with the FPGA (3); the digital signal processing restorer and the watchdog (11) are respectively connected with the FPGA (3) and the DSP (4);
the field programmable gate array restorer (8) is used for carrying out restoration operation on the FPGA (3) with failure;
the digital signal processing restorer and the watchdog (11) are used for resetting the DSP (4) which fails; detecting the voltage of the DSP (4) and the bus, and delaying the start of the DSP (4);
the driving detector (2) comprises a pixel array power supply, a digital and port power supply and an image output power supply; the FPGA (3) is used for detecting the state signals of a pixel array power supply, a digital and port power supply and an image output power supply of the driving detector (2) in real time, and the monitoring protection circuit automatically cuts off the power supply and informs the FPGA (3) when a single particle is latched.
2. The miniature star sensor circuitry of claim 1, wherein said internal chip further comprises: a program static random access memory (6) and an image static random access memory (7);
the program solid-state memory (5) is respectively connected with the FPGA (3) and the DSP (4) through an address bus and a data bus; the program static random access memory (6) is respectively connected with the FPGA (3) and the DSP (4) through the address bus and the data bus; the image static random access memory (7) is connected with the FPGA (3);
the program solid-state memory (5) is used for storing the star atlas information, application software required by the DSP (4) during operation and data information obtained after operation;
the program static random access memory (6) is used for running the application software loaded after the program solid-state memory (5) is powered on and reset;
the image static random access memory (7) is used as a window image memory of the FPGA (3) and a window control word memory of the DSP (4) in a space operation stage; and under the star map mode, outputting and caching the star map data.
3. The miniature star sensor circuitry of claim 1, wherein said internal chip further comprises: a 422 interface (9) and a low voltage differential signal interface (10);
the 422 interface (9), the low-voltage differential signal interface (10) and the FPGA (3) are connected with each other; the 422 interface (9) and the low-voltage differential signal interface (10) are respectively connected with a satellite attitude and orbit control subsystem;
the 422 interface (9) is used for connecting and communicating a satellite attitude and orbit control subsystem with the star sensor;
the low-voltage differential signal interface (10) is used for providing the original star map, star map data and program operation process data of the DSP (4) to the satellite attitude and orbit control subsystem in a space operation stage; and in the ground test stage, providing a test star map formed by simulating the functions of the drive detector (2) by a test computer to the FPGA (3).
4. The miniature star sensor circuitry of claim 1, wherein:
the output and feedback circuit comprises an LC filter circuit;
the LC filter circuit consists of an inductor L1, a capacitor C7 and a capacitor C11;
the LC filter circuit is used for reducing the output ripple voltage.
5. The miniature star sensor circuitry of claim 1, wherein:
the power supply monitoring protection circuit (1) comprises an overvoltage protection circuit;
the overvoltage protection circuit is composed of a resistor R64, a fuse F1, a fuse F2 and a transient diode D5;
the overvoltage protection circuit is used for enabling the star sensor to discharge current when the whole star power supply generates pulses.
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