CN111883424A - Silicon wafer scribing process - Google Patents
Silicon wafer scribing process Download PDFInfo
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- CN111883424A CN111883424A CN202010684280.8A CN202010684280A CN111883424A CN 111883424 A CN111883424 A CN 111883424A CN 202010684280 A CN202010684280 A CN 202010684280A CN 111883424 A CN111883424 A CN 111883424A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
- H01L21/3043—Making grooves, e.g. cutting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
Abstract
The invention provides a silicon wafer scribing process, which comprises the following steps: s1 blade model selection; s2, cutting the wafer, including a transverse cutting process and a vertical cutting process; the transverse cutting process adopts double-knife cutting, and the double-knife cutting comprises the following steps: a, cutting by a first knife, and cutting by a second knife; s3 performance detection; the invention has the beneficial effects that: compared with the traditional one-knife cutting method, the method has the advantages that the yield can be obviously improved under the condition that the cutting efficiency is not influenced by adopting double-knife cutting in the transverse cutting process; compared with the traditional method of cutting only by one knife, the method of cutting by one knife and cutting by double knives at intervals in the transverse cutting process not only improves the qualification rate, but also greatly reduces the process time and improves the processing efficiency; compared with a processing method of only adopting double-knife cutting in a transverse cutting process, the method has the advantages that the process duration is greatly reduced, the processing efficiency is improved, meanwhile, the qualification rate is only reduced to a small extent, and the method is suitable for being used in the production of small-size chips.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a process for scribing a silicon wafer.
Background
The whole process of semiconductor device production is generally divided into two parts, namely a wafer manufacturing process and a sealing and testing process, wherein the general sealing and testing process comprises the working procedures of wafer thinning, back evaporation, wafer scribing, wafer mounting, bonding, packaging, post curing, high-temperature storage, deburring, tin dipping, rib cutting, testing and sorting, printing, packaging and the like.
The chip sealing and testing process starts from the step of separating the chip into single chips, namely the wafer scribing step; the scribing process is to cut the whole wafer according to the size of a chip by adopting a blade made of diamond particles, so that the whole wafer is separated into single chips with independent electrical properties; the quality of the wafer scribing process directly affects the performance of the product.
Because of the brittleness of the silicon material, the mechanical cutting method may generate mechanical stress on the front and back surfaces of the wafer, resulting in front and back chipping angles at the edge of the chip. The front and back chipping angles reduce the mechanical strength of the chip and cause dark cracks. The dark cracks can further spread in the subsequent packaging process or in the use of products, so that the chip can be broken, and the electrical performance can be failed; if the flip angle enters the internal circuit of the chip, the electrical performance of the chip can be directly failed and the chip is scrapped.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a silicon wafer scribing process.
The invention solves the technical problems through the following technical means:
a silicon wafer scribing process comprises the following steps:
s1 blade model selection
Selecting a blade with a proper model according to the size of the wafer and the size of the chip obtained by cutting;
s2 wafer dicing
The method comprises a transverse cutting process and a vertical cutting process, wherein the wafer is cut into a plurality of square chips through the transverse cutting process and the vertical cutting process; the transverse cutting process adopts double-knife cutting, the vertical cutting process adopts one-knife cutting, and the chips are completely cut by the one-knife cutting; the double-blade cutting comprises the following steps:
a first knife cut
Carrying out first knife cutting on the wafer; the cutting depth is one half to two thirds of the thickness of the chip;
b second knife cutting
Carrying out second knife cutting on the wafer along the first knife cutting trace; completely cutting the chip;
s3 Performance testing
And detecting the appearance and the performance of the chip.
As a further improvement of the above technique, in the step S2, a cutting method of firstly performing a transverse cutting and then performing a vertical cutting is adopted for the wafer cutting.
As a further improvement of the above technology, in the transverse cutting process, a cutting method using a one-blade cutting and a double-blade cutting at intervals is adopted to cut the wafer into a plurality of square chips.
As a further improvement of the above technology, in the S2 wafer cutting, a double-blade cutting in the transverse cutting process is performed first, the wafer is cut into a plurality of pieces, then a blade cutting in the vertical cutting process is performed, a plurality of rectangular chips are obtained by cutting, the rectangular chips are composed of two connected square chips, and finally a blade cutting in the transverse cutting process is performed, and the plurality of rectangular chips are cut to obtain square chips.
As a further improvement of the technology, the cutting depth of the first knife is three fifths of the thickness of the chip.
The invention has the beneficial effects that: compared with the traditional one-knife cutting method, the method has the advantages that the yield can be obviously improved under the condition that the cutting efficiency is not influenced by adopting double-knife cutting in the transverse cutting process;
compared with the traditional method of cutting only by one knife, the method of cutting by one knife and cutting by double knives at intervals in the transverse cutting process not only improves the qualification rate, but also greatly reduces the process time and improves the processing efficiency; compared with a processing method of only adopting double-knife cutting in a transverse cutting process, the processing time is greatly reduced, the processing efficiency is improved, the qualification rate is only reduced to a small extent, and the qualification rate is still higher than that of the traditional method of only adopting one-knife cutting.
Drawings
Fig. 1 is a schematic structural diagram of a cutting mark of a transverse cutting process, a cutting mark of a vertical cutting process, and a chip in embodiments 1 to 3 of the present invention;
fig. 2 is a schematic structural diagram of a cut mark of double-blade cutting in a transverse cutting process, a cut mark of a vertical cutting process, and a chip in embodiment 4-6 of the present invention;
fig. 3 is a schematic structural diagram of a double-blade cutting in a transverse cutting process, a blade mark for one-blade cutting, a blade mark for a vertical cutting process, and a chip in the embodiment 4-6 of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present.
Example 1
The process for scribing the silicon wafer comprises the following steps:
s1 blade model selection
Selecting a blade with a proper model according to the size of the wafer and the size of the chip obtained by cutting;
s2 wafer dicing
The method comprises a transverse cutting process and a vertical cutting process, wherein the wafer is cut into a plurality of square chips through the transverse cutting process and the vertical cutting process; firstly, transversely cutting and then vertically cutting; the transverse cutting process adopts double-knife cutting, the vertical cutting process adopts one-knife cutting, and the chips are completely cut by the one-knife cutting; the transverse cutting marks are shown as CH1 in FIG. 1, and the vertical cutting marks are shown as CH2 in FIG. 1; the double-blade cutting comprises the following steps:
a first knife cut
Carrying out first knife cutting on the wafer; the cutting depth is one half of the thickness of the chip;
b second knife cutting
Carrying out second knife cutting on the wafer along the first knife cutting trace; completely cutting the chip;
s3 Performance testing
And detecting the appearance and the performance of the chip.
Example 2
The process for scribing the silicon wafer comprises the following steps:
s1 blade model selection
Selecting a blade with a proper model according to the size of the wafer and the size of the chip obtained by cutting;
s2 wafer dicing
The method comprises a transverse cutting process and a vertical cutting process, wherein the wafer is cut into a plurality of square chips through the transverse cutting process and the vertical cutting process; firstly, transversely cutting and then vertically cutting; the transverse cutting process adopts double-knife cutting, the vertical cutting process adopts one-knife cutting, and the chips are completely cut by the one-knife cutting; the transverse cutting marks are shown as CH1 in FIG. 1, and the vertical cutting marks are shown as CH2 in FIG. 1; the double-blade cutting comprises the following steps:
a first knife cut
Carrying out first knife cutting on the wafer; the cutting depth is two thirds of the thickness of the chip;
b second knife cutting
Carrying out second knife cutting on the wafer along the first knife cutting trace; completely cutting the chip;
s3 Performance testing
And detecting the appearance and the performance of the chip.
Example 3
The process for scribing the silicon wafer comprises the following steps:
s1 blade model selection
Selecting a blade with a proper model according to the size of the wafer and the size of the chip obtained by cutting;
s2 wafer dicing
The method comprises a transverse cutting process and a vertical cutting process, wherein the wafer is cut into a plurality of square chips through the transverse cutting process and the vertical cutting process; firstly, transversely cutting and then vertically cutting; the transverse cutting process adopts double-knife cutting, the vertical cutting process adopts one-knife cutting, and the chips are completely cut by the one-knife cutting; the transverse cutting marks are shown as CH1 in FIG. 1, and the vertical cutting marks are shown as CH2 in FIG. 1; the double-blade cutting comprises the following steps:
a first knife cut
Carrying out first knife cutting on the wafer; the cutting depth is three fifths of the thickness of the chip;
b second knife cutting
Carrying out second knife cutting on the wafer along the first knife cutting trace; completely cutting the chip;
s3 Performance testing
And detecting the appearance and the performance of the chip.
Example 4
The process for scribing the silicon wafer comprises the following steps:
s1 blade model selection
Selecting a blade with a proper model according to the size of the wafer and the size of the chip obtained by cutting;
s2 wafer dicing
The method comprises a transverse cutting process and a vertical cutting process, wherein the wafer is cut into a plurality of square chips through the transverse cutting process and the vertical cutting process;
a cutting method of one-knife cutting and double-knife cutting which are used at intervals is adopted in the transverse cutting process, and a cutting method of one-knife cutting is adopted in the vertical cutting process;
firstly, double-knife cutting in a transverse cutting process is carried out, a plurality of wafers are cut into a plurality of wafers as knife marks are shown as CH3 in figures 2 and 3, then, one-knife cutting in a vertical cutting process is carried out, the knife marks are shown as CH4 in figures 2 and 3, a plurality of rectangular chips are obtained through cutting, the rectangular chips are formed by connecting two square chips, finally, one-knife cutting in a transverse cutting process is carried out, the knife marks are shown as CH5 in figure 3, and the rectangular chips are cut to obtain the square chips;
the double-blade cutting comprises the following steps:
a first knife cut
Carrying out first knife cutting on the wafer; the cutting depth is one half of the thickness of the chip;
b second knife cutting
Carrying out second knife cutting on the wafer along the first knife cutting trace; completely cutting the chip;
s3 Performance testing
And detecting the appearance and the performance of the chip.
Example 5
The process for scribing the silicon wafer comprises the following steps:
s1 blade model selection
Selecting a blade with a proper model according to the size of the wafer and the size of the chip obtained by cutting;
s2 wafer dicing
The method comprises a transverse cutting process and a vertical cutting process, wherein the wafer is cut into a plurality of square chips through the transverse cutting process and the vertical cutting process;
a cutting method of one-knife cutting and double-knife cutting which are used at intervals is adopted in the transverse cutting process, and a cutting method of one-knife cutting is adopted in the vertical cutting process;
firstly, double-knife cutting in a transverse cutting process is carried out, a plurality of wafers are cut into a plurality of wafers as knife marks are shown as CH3 in figures 2 and 3, then, one-knife cutting in a vertical cutting process is carried out, the knife marks are shown as CH4 in figures 2 and 3, a plurality of rectangular chips are obtained through cutting, the rectangular chips are formed by connecting two square chips, finally, one-knife cutting in a transverse cutting process is carried out, the knife marks are shown as CH5 in figure 3, and the rectangular chips are cut to obtain the square chips;
the double-blade cutting comprises the following steps:
a first knife cut
Carrying out first knife cutting on the wafer; the cutting depth is two thirds of the thickness of the chip;
b second knife cutting
Carrying out second knife cutting on the wafer along the first knife cutting trace; completely cutting the chip;
s3 Performance testing
And detecting the appearance and the performance of the chip.
Example 6
The process for scribing the silicon wafer comprises the following steps:
s1 blade model selection
Selecting a blade with a proper model according to the size of the wafer and the size of the chip obtained by cutting;
s2 wafer dicing
The method comprises a transverse cutting process and a vertical cutting process, wherein the wafer is cut into a plurality of square chips through the transverse cutting process and the vertical cutting process;
a cutting method of one-knife cutting and double-knife cutting which are used at intervals is adopted in the transverse cutting process, and a cutting method of one-knife cutting is adopted in the vertical cutting process;
firstly, double-knife cutting in a transverse cutting process is carried out, a plurality of wafers are cut into a plurality of wafers as knife marks are shown as CH3 in figures 2 and 3, then, one-knife cutting in a vertical cutting process is carried out, the knife marks are shown as CH4 in figures 2 and 3, a plurality of rectangular chips are obtained through cutting, the rectangular chips are formed by connecting two square chips, finally, one-knife cutting in a transverse cutting process is carried out, the knife marks are shown as CH5 in figure 3, and the rectangular chips are cut to obtain the square chips;
the double-blade cutting comprises the following steps:
a first knife cut
Carrying out first knife cutting on the wafer; the cutting depth is three fifths of the thickness of the chip;
b second knife cutting
Carrying out second knife cutting on the wafer along the first knife cutting trace; completely cutting the chip;
s3 Performance testing
And detecting the appearance and the performance of the chip.
Processing 5 six-inch wafers by adopting a one-knife cutting method in the prior art for transverse cutting and vertical cutting to obtain 4800 chips;
respectively processing 5 six-inch wafers by each method in wafer scribing in the embodiments 1 to 3 to obtain 14400 chips;
respectively processing 5 six-inch wafers by each method in wafer scribing in the embodiments 4 to 6 to obtain 14400 chips;
detection data comparison
| Process for the preparation of a coating | Total number of chips | Number of qualified chips | Percent of pass | Number of corner breakings | Duration of the process |
| Comparative example | 4800 | 4733 | 98.60 | 67 | 5h |
| Example 1 | 4800 | 4793 | 99.85 | 7 | 5h10m |
| Example 2 | 4800 | 4787 | 99.73 | 13 | 5h30m |
| Example 3 | 4800 | 4798 | 99.96 | 2 | 5h15m |
| Example 4 | 4800 | 4758 | 99.13 | 42 | 3h10m |
| Example 5 | 4800 | 4751 | 98.98 | 49 | 3h35m |
| Example 6 | 4800 | 4770 | 99.38 | 30 | 3h20m |
It is noted that, in this document, relational terms such as first and second, and the like, if any, are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (5)
1. A silicon wafer scribing process is characterized in that: the method comprises the following steps:
s1 blade model selection
Selecting a blade with a proper model according to the size of the wafer and the size of the chip obtained by cutting;
s2 wafer dicing
The method comprises a transverse cutting process and a vertical cutting process, wherein the wafer is cut into a plurality of square chips through the transverse cutting process and the vertical cutting process; the transverse cutting process adopts double-knife cutting, the vertical cutting process adopts one-knife cutting, and the chips are completely cut by the one-knife cutting; the double-blade cutting comprises the following steps:
a first knife cut
Carrying out first knife cutting on the wafer; the cutting depth is one half to two thirds of the thickness of the chip;
b second knife cutting
Carrying out second knife cutting on the wafer along the first knife cutting trace; completely cutting the chip;
s3 Performance testing
And detecting the appearance and the performance of the chip.
2. The process of dicing a silicon wafer according to claim 1, characterized in that: in the step S2, the wafer is cut in a transverse cutting mode and then in a vertical cutting mode.
3. The process of dicing a silicon wafer according to claim 1, characterized in that: in the transverse cutting procedure, a cutting method with one-knife cutting and double-knife cutting used at intervals is adopted to cut the wafer into a plurality of square chips.
4. The process of dicing a silicon wafer according to claim 3, characterized in that: s2 the wafer cutting is firstly carried out double-knife cutting in the transverse cutting procedure, the wafer is cut into a plurality of strips, then a knife cutting in the vertical cutting procedure is carried out, a plurality of rectangular chips are obtained through cutting, the rectangular chips are composed of two connected square chips, finally a knife cutting in the transverse cutting procedure is carried out, and a plurality of rectangular chips are cut to obtain the square chips.
5. The process of dicing a silicon wafer according to claim 2 or 4, characterized in that: the cutting depth of the first knife is three fifths of the thickness of the chip.
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| CN202010684280.8A CN111883424A (en) | 2020-07-16 | 2020-07-16 | Silicon wafer scribing process |
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| CN113172781A (en) * | 2021-04-07 | 2021-07-27 | 郑州磨料磨具磨削研究所有限公司 | Cutting method of ultrathin wafer |
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