CN111863948A - GaN-based P-GaN enhanced HEMT device with gate-source bridge and preparation method thereof - Google Patents
GaN-based P-GaN enhanced HEMT device with gate-source bridge and preparation method thereof Download PDFInfo
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- 230000005533 two-dimensional electron gas Effects 0.000 description 6
- 238000005468 ion implantation Methods 0.000 description 3
- 230000009467 reduction Effects 0.000 description 3
- 238000005036 potential barrier Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 230000004913 activation Effects 0.000 description 1
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- 238000005265 energy consumption Methods 0.000 description 1
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- 150000002500 ions Chemical class 0.000 description 1
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Abstract
The invention provides a GaN-based P-GaN enhanced HEMT device structure with a gate source bridge and a manufacturing method thereof2Or SiN film, and then wet etchingTo obtain the required SiO2Or SiN pattern, followed by secondary epitaxial growth to grow the complete structure. When the P-GaN cap layer is etched, P-GaN between the gate electrode and the connecting gate source is left, and the P-GaN is mixed with SiO after the chip is manufactured2Or the SiN dielectric layer patterns together form a gate-source bridge. Compared with the traditional structure, the invention can obtain higher threshold voltage, and because of the existence of the dielectric film under the gate-source bridge, the output current can not be reduced while the threshold voltage is improved.
Description
Technical Field
The invention relates to a GaN-based P-GaN enhanced HEMT device with a gate-source bridge and a preparation method thereof, belonging to the technical field of semiconductor materials.
Background
The GaN material is taken as a representative of the third generation wide bandgap semiconductor material, becomes a research hotspot by the characteristics of wide bandgap, high electronic saturation rate, high temperature resistance, radiation resistance and the like, and has great application prospect particularly in the fields of high temperature, high power and microwave. Due to the characteristics of the AlGaN/GaN heterojunction, a heterojunction interface can generate high-density two-dimensional electron gas under the condition of no doping, the existence of the two-dimensional electron gas greatly improves the carrier mobility, reduces the on-resistance and the response time of a device, and improves the performance of the device.
The GaN-based HEMT is mainly divided into a depletion type and an enhancement type at present, as long as the depletion type device is in a conducting state when a grid is in zero bias due to two-dimensional electron gas with high concentration and high mobility, the device needs to apply negative bias on the grid to turn off a switch, and in practical application, a negative voltage power supply design needs to be added, so that on one hand, energy consumption is increased, and on the other hand, certain potential safety hazards exist. Therefore, in practical applications, depletion devices are less common, and normally-on devices, i.e., enhancement devices, are essential.
Currently, there are four main manufacturing methods for the enhanced HEMT: groove type, F ion implantation under the grid, cascade of cascade and P-GaN cap layer. The four methods have advantages and disadvantages, the groove-type device needs to perform partial removal treatment on the barrier under the gate to achieve the enhancement effect, however, the etching damage is inevitable, and the precision needs to be controlled accurately. F ion implantation under the grid is to use F ions to exhaust two-dimensional electron gas under the grid, however, the F ion implantation is unstable, and the threshold value of the device is unstable. The cascode cascade is to cascade a depletion mode device and a Si device to realize enhancement, and is limited by the performance of the Si device. The method of the P-GaN cap layer is to adjust two-dimensional electron gas in a channel in a polarization mode, and the P-GaN gate cap layer technology has potential advantages in the aspects of interface quality, device on-state characteristics and the like, but is limited by low activation energy, and is difficult to realize P-GaN with high doping concentration, and if enhancement is to be realized, thicker P-GaN is needed, so that the driving capability is reduced.
Disclosure of Invention
The invention aims to provide a GaN-based P-GaN enhancement type HEMT device with a grid source bridge, which can not cause the reduction of output current while improving the threshold voltage.
The purpose of the invention is realized by the following technical scheme:
the utility model provides a take gaN base P-gaN enhancement mode HEMT device of grid source bridge, its structure includes substrate, buffer layer, channel layer, barrier layer, GaN cap layer, passivation dielectric layer, P-gaN cap layer from bottom to top in proper order, still includes source electrode and the drain electrode that sets up on the barrier layer, and the gate electrode sets up on P-gaN cap layer, its characterized in that: the passivation dielectric layer is filled between the gate-source bridge and the GaN cap layer, one end of the gate-source bridge is connected with the P-GaN cap layer, and the other end of the gate-source bridge is connected with the source electrode. Wherein a two-dimensional electron gas (2DEG) is generated between the barrier layer and the channel layer heterojunction.
Preferably, the number of the gate-source bridges is one or more than two, and the more than two strip gate-source bridges are arranged in parallel.
Preferably, the thickness of the P-GaN cap layer is 80-120nm, and the Mg doping concentration of the P-GaN is not less than 1 x 1019cm-3The gate-source bridge and the P-GaN cap layer have the same height and are made of the same material.
Preferably, the channel layer is a GaN channel layer with the thickness of 60nm-120nm, and the barrier layer is Al with the thickness of 10nm-40nmxGa1-xN or InGaN, barrier layer, and X represents 15-30% of Al composition.
Preferably, the thickness of the GaN cap layer is 2nm-5 nm.
Preferably, the substrate is a Si substrate, a sapphire substrate or a SiC substrate, and the buffer layer is made of an AlGaN material having an Al content gradually decreasing from the AlN layer to the GaN layer, and has a thickness of 1 μm to 3.5 μm.
Preferably, the surface of the device except for the source electrode, the drain electrode and the gate electrode is covered with SiC or SiO2Or a SiN passivation layer.
Preferably, the material used by the passivation dielectric layer is SiC or SiO2Or SiN.
The invention also discloses a preparation method of the GaN-based P-GaN enhanced HEMT device with the grid source bridge, which comprises the following steps:
(1) growing a buffer layer, a channel layer, a barrier layer and a GaN cap on a substrate in sequence;
(2) growing a passivation dielectric layer on the GaN cap;
(3) etching the passivation dielectric layer by adopting a photoetching technology, and only leaving the passivation dielectric layer with the same width as the area where the gate-source bridge is located;
(4) continuously growing a P-GaN cap layer;
(5) etching the P-GaN cap layer and the GaN cap layer by adopting a photoetching technology, and only leaving the P-GaN cap layer where the gate electrode and the gate-source bridge are located;
(6) evaporating and plating a plurality of layers of metal on the barrier layer to be used as a source electrode and a drain electrode, and quickly annealing to form ohmic contact;
(7) evaporating and plating multilayer metal on the P-GaN cap layer to be used as a gate electrode;
(8) growing a layer of SiC and SiO on the surface of the device2Or SiN passivation film, and etching to remove SiC and SiO at gate electrode, source electrode and drain electrode2Or a SiN passivation film.
The invention provides a P-GaN cap layer enhanced HEMT provided with a gate-source bridge, which can obtain higher threshold voltage compared with the traditional structure, the P-GaN bridge is connected between a gate electrode and a source electrode and can provide an additional conductive channel, generally, the bridge connection resistance is lower than the contact resistance of the gate electrode, when positive voltage is applied to the gate electrode, most of the voltage falls on the contact resistance of the gate electrode, so that the voltage for reducing the AlGaN potential barrier is reduced, the voltage is insufficient to open a channel, thereby improving the threshold voltage of a device, and along with the increase of the number of bridges, the bridge contact resistance is lower, the potential of the gate voltage on the contact resistance of the gate electrode is reduced more greatly, the voltage for reducing the AlGaN potential barrier is smaller, the threshold voltage of the device is higher, on the other hand, the conductive channel area of the device can be reduced due to the existence of the gate-source bridge, thereby causing the reduction of output current, but, the existence of the dielectric layer enables the conductive channel of the device not to be reduced even if the grid-source bridge exists, and the output current is not reduced. In other words, compared with the traditional structure, the invention can obtain higher threshold voltage, and because of the existence of the dielectric film under the gate-source bridge, the invention can not cause the reduction of output current while improving the threshold voltage.
Drawings
FIG. 1 is a sectional view of a GaN epitaxial wafer on which a GaN cap layer has been grown.
FIG. 2 SiO production2Or a GaN epitaxial wafer profile with a SiN pattern.
FIG. 3 is a cross-sectional view of a GaN epitaxial wafer with a P-GaN cap layer after the second epitaxy.
FIG. 4 is a cross-sectional view of a GaN epitaxial wafer of P-GaN with the gate electrode and the gate-source bridge in place.
FIG. 5 is a sectional view of a GaN HEMT chip with a P-GaN cap layer of a drain-source electrode.
FIG. 6 is a cross-sectional view of a GaN HEMT chip with a completed gate electrode.
FIG. 7 is a cross-sectional view of a GaN HEMT chip with a passivation layer.
Fig. 8 is a schematic perspective view of a P-GaN enhancement mode HEMT device with a gate-source bridge (the passivation layer of SiO2 is not shown).
Detailed Description
The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
Example 1
A preparation method of a GaN-based P-GaN enhanced HEMT device with a gate-source bridge comprises the following steps:
(1) growing a buffer layer 2, a channel layer 3, a barrier layer 4 and a GaN cap5 on a substrate 1 in this order, as shown in fig. 1;
(2) growing a passivation dielectric layer on the GaN cap;
(3) etching the passivation dielectric layer by adopting a photoetching technology, and only leaving the passivation dielectric layer 6 with the same width as the area where the gate-source bridge is positioned, as shown in FIG. 2;
(4) continuing to grow a P-GaN cap layer 7, as shown in FIG. 3;
(5) etching the P-GaN cap layer and the GaN cap layer by adopting a photoetching technology, and only leaving the P-GaN cap layer where the gate electrode and the grid-source bridge are located, wherein the P-GaN cap layer where the grid-source bridge is located forms a grid-source bridge 8, as shown in FIG. 4;
(6) a plurality of layers of metal are deposited on the barrier layer to be used as a source electrode 9 and a drain electrode 10, and ohmic contact is formed through rapid annealing, as shown in figure 5;
(7) a multilayer metal is vapor-deposited on the P-GaN cap layer as a gate electrode 11, as shown in fig. 6;
(8) growing a layer of SiO on the surface of the device2Passivating the film 12 and then etching away the SiO at the gate, source and drain electrodes by photolithography2Passivation film as shown in fig. 7.
Example 2
As shown in FIG. 8, a GaN-based P-GaN enhancement HEMT device with a gate-source bridge comprises, from bottom to top, a Si substrate, a 2 μm AlGaN buffer layer, an 80nm GaN channel layer, and 20nmAl0.2Ga0.8An N barrier layer, a GaN cap layer with the thickness of about 2nm, a P-GaN cap layer doped with Mg with the thickness of 100nm and the doping concentration of 2 multiplied by 1019cm-3The multilayer metal electrode structure also comprises a source electrode and a drain electrode which are arranged on the barrier layer, the source electrode and the drain electrode are multilayer metal electrodes of 20nmAl, 120nmTi, 50nmNi and 50nmAu, the source electrode and the drain electrode form ohmic contact with a device, a gate electrode is arranged on the P-GaN cap layer and is a multilayer metal electrode of 50nmNi and 100nmAu, the multilayer metal electrode structure also comprises two parallel grid-source bridges, the grid-source bridges are arranged on the GaN cap layer, one end of each grid-source bridge is connected with the P-GaN cap layer, and the other end of each grid-source bridge is connected with the POne end of the reverse gate is connected with a source electrode, and a layer of SiO is arranged below the reverse gate source bridge2And a P-GaN gate-source bridge is arranged on the dielectric layer. The surface of the device except for the source electrode, the drain electrode and the gate electrode is covered with SiO2And a passivation layer. The threshold voltage of the device may be up to 3.9V.
Example 3
A GaN-based P-GaN enhancement type HEMT device with a gate-source bridge comprises a sapphire substrate, a 1 μm AlGaN buffer layer, a 60nm GaN channel layer and a 10nmAl from bottom to top in sequence0.3Ga0.7An N barrier layer, a GaN cap layer with the thickness of about 3nm, a P-GaN cap layer doped with 120nmMg and the doping concentration of 1 multiplied by 1019cm-3The GaN-based light-emitting diode further comprises a source electrode and a drain electrode which are arranged on the barrier layer, the source electrode and the drain electrode are multilayer metal electrodes of 20nmAl, 120nmTi, 50nmNi and 50nmAu, the source electrode and the drain electrode form ohmic contact with a device, a gate electrode is arranged on the P-GaN cap layer and is a multilayer metal electrode of 50nmNi and 100nmAu, the GaN-based light-emitting diode further comprises a grid source bridge, the grid source bridge is arranged on the GaN cap layer, one end of the grid source bridge is connected with the P-GaN cap layer, the other end of the grid source bridge is connected with the source electrode, a layer of SiN is arranged below the grid source bridge, and the P-GaN grid source. The regions of the device surface other than the source, drain and gate electrodes are covered with a SiN passivation layer. The threshold voltage of the device may be up to 2.8V.
Example 4
A GaN-based P-GaN enhancement type HEMT device with a gate-source bridge comprises a SiC substrate, a 3.5 mu m AlGaN buffer layer, a 120nm GaN channel layer, a 40nm InGaN barrier layer, a GaN cap layer with the thickness of about 2.5nm, a 60nm Mg-doped P-GaN cap layer and the doping concentration of 4 multiplied by 1019cm-3The multilayer metal electrode structure also comprises a source electrode and a drain electrode which are arranged on the barrier layer, the source electrode and the drain electrode are multilayer metal electrodes of 200nmAl, 120nmTi, 50nmNi and 50nmAu, the source electrode and the drain electrode form ohmic contact with a device, a gate electrode is arranged on the P-GaN cap layer and is a multilayer metal electrode of 50nmNi and 100nmAu, the multilayer metal electrode structure also comprises four parallel grid source bridges, the grid source bridges are arranged on the GaN cap layer, one end of each grid source bridge is connected with the P-GaN cap layer, the other end of each grid source bridge is connected with the source electrode, a SiC dielectric layer is arranged below each reverse grid source bridge, and a P-GaN grid source is arranged above each dielectric layerA bridge. The regions of the device surface other than the source, drain and gate electrodes are covered with a SiC passivation layer. The threshold voltage of the device can be up to 5.1V.
Claims (9)
1. The utility model provides a take gaN base P-gaN enhancement mode HEMT device of grid source bridge, its structure includes substrate, buffer layer, channel layer, barrier layer, GaN cap layer, passivation dielectric layer, P-gaN cap layer from bottom to top in proper order, still includes source electrode and the drain electrode that sets up on the barrier layer, and the gate electrode sets up on P-gaN cap layer, its characterized in that: the passivation dielectric layer is filled between the gate-source bridge and the GaN cap layer, one end of the gate-source bridge is connected with the P-GaN cap layer, and the other end of the gate-source bridge is connected with the source electrode.
2. The P-GaN band-gate source-bridge GaN-based P-GaN enhancement mode HEMT device of claim 1, wherein: the number of the grid source bridges is one or more than two, and the more than two grid source bridges are arranged in parallel.
3. The GaN-based P-GaN enhancement mode HEMT device P-GaN with the gate-source bridge of claim 2, characterized in that: the thickness of the P-GaN cap layer is 80-120nm, and the Mg doping concentration of the P-GaN is not less than 1 multiplied by 1019cm-3The gate-source bridge and the P-GaN cap layer have the same height and are made of the same material.
4. The GaN-based P-GaN enhancement mode HEMT device with a gate-source bridge of claim 3, wherein: the channel layer is a GaN channel layer with the thickness of 60nm-120nm, and the barrier layer is Al with the thickness of 10nm-40nmxGa1-xN or InGaN, barrier layer, and X represents 15-30% of Al composition.
5. The GaN-based P-GaN enhancement mode HEMT device with a gate-source bridge of claim 4, wherein: the thickness of the GaN cap layer is 2-3 nm.
6. The GaN-based P-GaN enhancement mode HEMT device P-GaN with the gate-source bridge of claim 5, characterized in that: the substrate is a Si substrate, a sapphire substrate or a SiC substrate, the buffer layer is made of AlGaN material of which the Al content is gradually reduced along the direction from the AlN layer to the GaN layer, and the thickness is 1-3.5 μm.
7. The GaN-based P-GaN enhancement mode HEMT device with a gate-source bridge of claim 6, wherein: the surface of the device is covered with SiC and SiO except the source electrode, the drain electrode and the gate electrode2Or a SiN passivation layer.
8. The GaN-based P-GaN enhancement mode HEMT device with a gate-source bridge of claim 1, wherein: the passivation dielectric layer is made of SiC or SiO2Or SiN.
9. The method for manufacturing a GaN-based P-GaN enhancement type HEMT device with a gate-source bridge as claimed in any of claims 1 to 8, which comprises the steps of:
(1) growing a buffer layer, a channel layer, a barrier layer and a GaN cap on a substrate in sequence;
(2) growing a passivation dielectric layer on the GaN cap;
(3) etching the passivation dielectric layer by adopting a photoetching technology, and only leaving the passivation dielectric layer with the same width as the area where the gate-source bridge is located;
(4) continuously growing a P-GaN cap layer;
(5) etching the P-GaN cap layer and the GaN cap layer by adopting a photoetching technology, and only leaving the P-GaN cap layer where the gate electrode and the gate-source bridge are located;
(6) evaporating and plating a plurality of layers of metal on the barrier layer to be used as a source electrode and a drain electrode, and quickly annealing to form ohmic contact;
(7) evaporating and plating multilayer metal on the P-GaN cap layer to be used as a gate electrode;
(8) growing a layer of SiC and SiO on the surface of the device2Or SiN passivation film, and etching to remove SiC and SiO at gate electrode, source electrode and drain electrode2Or a SiN passivation film.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010766289.3A CN111863948B (en) | 2020-08-03 | GaN-based P-GaN enhanced HEMT device with gate-source bridge and preparation method thereof | |
| PCT/CN2021/106422 WO2022028225A1 (en) | 2020-08-03 | 2021-07-15 | P-gan enhanced hemt device with gate-source bridge and manufacturing method therefor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010766289.3A CN111863948B (en) | 2020-08-03 | GaN-based P-GaN enhanced HEMT device with gate-source bridge and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111863948A true CN111863948A (en) | 2020-10-30 |
| CN111863948B CN111863948B (en) | 2024-05-28 |
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| CN113823685A (en) * | 2021-08-30 | 2021-12-21 | 瑶芯微电子科技(上海)有限公司 | HEMT device based on composite cap layer/dielectric layer/passivation layer and preparation method thereof |
| WO2022028225A1 (en) * | 2020-08-03 | 2022-02-10 | 南京集芯光电技术研究院有限公司 | P-gan enhanced hemt device with gate-source bridge and manufacturing method therefor |
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Cited By (2)
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| WO2022028225A1 (en) * | 2020-08-03 | 2022-02-10 | 南京集芯光电技术研究院有限公司 | P-gan enhanced hemt device with gate-source bridge and manufacturing method therefor |
| CN113823685A (en) * | 2021-08-30 | 2021-12-21 | 瑶芯微电子科技(上海)有限公司 | HEMT device based on composite cap layer/dielectric layer/passivation layer and preparation method thereof |
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