CN111863729A - Vertical structure micro light-emitting diode display panel and manufacturing method thereof - Google Patents
Vertical structure micro light-emitting diode display panel and manufacturing method thereof Download PDFInfo
- Publication number
- CN111863729A CN111863729A CN202010628913.3A CN202010628913A CN111863729A CN 111863729 A CN111863729 A CN 111863729A CN 202010628913 A CN202010628913 A CN 202010628913A CN 111863729 A CN111863729 A CN 111863729A
- Authority
- CN
- China
- Prior art keywords
- diode
- vertical
- micro
- electrode
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000004065 semiconductor Substances 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims abstract description 22
- 239000002184 metal Substances 0.000 claims abstract description 17
- 229910052751 metal Inorganic materials 0.000 claims abstract description 17
- 238000000151 deposition Methods 0.000 claims abstract description 12
- 238000000059 patterning Methods 0.000 claims abstract description 9
- 239000010410 layer Substances 0.000 claims description 108
- 239000000463 material Substances 0.000 claims description 18
- 239000012790 adhesive layer Substances 0.000 claims description 10
- 238000005538 encapsulation Methods 0.000 claims description 6
- 230000002411 adverse Effects 0.000 abstract description 6
- 230000000694 effects Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 9
- 239000000758 substrate Substances 0.000 description 4
- 238000005516 engineering process Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229920006267 polyester film Polymers 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
- H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
- H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention provides a display panel of a vertical structure micro light-emitting diode display panel and a manufacturing method thereof, wherein the manufacturing method comprises the following steps: s1: forming first electrodes distributed in an array on the bottom back plate; s2: bonding the vertical micro diode on the first electrode of the bottom backboard through a bonding process; s3: depositing a filling layer covering the vertical type micro diode; s4: firstly, exposing and developing the filling layer and forming an opening on the vertical micro diode; and then depositing a first metal layer, and patterning the first metal layer to form a first conducting electrode positioned in the opening and a second conducting electrode positioned between two adjacent first conducting electrodes. The invention avoids high temperature and high pressure actions, thereby solving the above characteristic influence and semiconductor adverse risk and reducing the high cost loss of the backboard caused by the adverse effect.
Description
Technical Field
The invention relates to the technical field of micro light-emitting diodes, in particular to a vertical structure micro light-emitting diode display panel and a manufacturing method thereof.
Background
With the vigorous development of the display industry, Micro light emitting diodes (Micro LEDs) have appeared on the stage of the era as a new generation of display technology, and compared with the existing OLED and LCD technologies, the Micro LEDs have the advantages of higher brightness, lower power consumption, better light emitting efficiency and longer service life, but the existing Micro LEDs still have many problems to be solved, and no matter the process technology, the inspection standard or the production and manufacturing cost, the Micro LEDs have a great distance from mass production and commercial application. One of the most important challenges, due to the size of Micro LEDs generally smaller than 100 μm and the large number of Micro LEDs to be transferred, is how to implant a huge number of Micro LED devices (for example, with 4K (4096 × 2160) resolution, up to 2654 ten thousand Micro LEDs are required to be transferred) on a display backplane or a target circuit to reduce the manufacturing cost thereof, and this process is called bulk transfer. The principle of mass transfer is that a force is applied to the Micro LED die to make it accurately adsorbed, and then the Micro LED die is transferred to a target back plate to be accurately released.
The micro light-emitting diode is placed on the lower electrode of the driving backboard in a mass transfer mode, and then the upper electrode is formed after the structures such as planarization, an insulating layer and the like, so that the lower electrode and the upper electrode are conducted, but the micro light-emitting diode needs to be connected with the backboard through metal bonding after mass transfer, the metal bonding process needs certain high-temperature and high-pressure conditions, certain influence can be generated on the characteristics of the semiconductor backboard, and the risk of generating bad damage due to internal damage of a semiconductor layer is generated.
Disclosure of Invention
The invention aims to provide a vertical structure micro light-emitting diode display panel and a manufacturing method thereof, wherein the vertical structure micro light-emitting diode display panel can avoid the risk of poor semiconductors caused by high-temperature and high-voltage actions.
The invention provides a manufacturing method of a display panel of a vertical structure micro light-emitting diode display panel, which comprises the following steps:
s1: forming first electrodes distributed in an array on the bottom back plate;
s2: firstly, transferring the vertical micro diode on the bottom backboard and positioned on at least part of the first electrode, and then bonding the vertical micro diode on the first electrode of the bottom backboard through a bonding process;
s3: depositing a filling layer covering the vertical type micro diode on the basis of the step S2, wherein the thickness of the material of the filling layer is higher than the height of the vertical type micro diode;
s4: on the basis of step S3, first, the filling layer is exposed and developed to form an opening on the vertical micro diode; then depositing a first metal layer, patterning the first metal layer to form a first conducting electrode positioned in the opening and a second conducting electrode positioned between two adjacent first conducting electrodes, wherein the second conducting electrode is positioned on the filling layer;
The vertical micro diode is monochrome or red, green and blue.
Further, the bonding area between the vertical type micro diode and the bottom back plate is not more than half of the bottom area of the vertical type micro diode.
Further, the bottom of the vertical micro diode is square or circular, and the shape of the first electrode is consistent with or inconsistent with the shape of the bottom of the vertical micro diode.
Further, the bottom panel of the vertical micro diode is not smaller than the area of the first electrode, the first electrode is entirely covered by the vertical micro diode, or half of the first electrode is covered by the vertical micro diode, or the length of the side edge of the first electrode is the same as the length of the side edge of the vertical micro diode.
Further, step S2 further includes the steps of: and detecting the vertical micro diode and repairing the damaged vertical micro diode.
Further, the filling layer is made of opaque material.
Further, the method also comprises the following steps:
s5: on the basis of step S4, an insulating layer is first deposited; then patterning the insulating layer so that at least part of the surface of the first conducting electrode and at least part of the surface of the second conducting electrode are not covered by the insulating layer;
S6: depositing a semiconductor material layer on the basis of the step S5, patterning the semiconductor material layer to form semiconductor layers each in contact with the first and second through electrodes;
s7: depositing a gate insulating layer on the basis of the step S6;
s8: depositing a second metal layer on the basis of the step S7, and patterning the second metal layer to form a gate;
s9: an adhesive layer and an encapsulation layer are deposited on the basis of step S8.
Further, step S6 includes conducting a semiconductor layer over the first conductive electrode and the second conductive electrode and forming a first conductive semiconductor layer on the first conductive electrode and a second conductive semiconductor layer on the second conductive electrode, respectively, in addition to step S6.
The invention also provides a vertical structure micro light-emitting diode display panel, which comprises a bottom backboard, vertical micro diodes positioned on the bottom backboard, a first electrode for bonding the vertical micro diodes on the bottom backboard, a filling layer for covering the vertical micro diodes, a first conducting electrode positioned on each vertical micro diode, and a second conducting electrode positioned on the filling layer and having a distance with the first conducting electrode, wherein the vertical micro diodes are in single color or in three colors of red, green and blue.
The semiconductor device further comprises an insulating layer filled between the first conducting electrode and the second conducting electrode, a semiconductor layer formed on the first conducting electrode and the second conducting electrode, a gate insulating layer covering the semiconductor layer, a gate electrode positioned on the gate insulating layer and above the semiconductor layer, an adhesive layer covering the gate electrode and the gate insulating layer, and an encapsulation layer positioned on the adhesive layer.
The vertical structure micro light-emitting diode display panel forms the vertical type micro light-emitting diode through the bonding process, so that other film layer structures of the back plate are formed after the back plate is combined with the vertical type micro light-emitting diode, the actions of high temperature and high pressure are avoided, the characteristic influence and semiconductor adverse risk are solved, and the high-cost back plate loss caused by the adverse effect is reduced.
Drawings
FIG. 1 is a schematic structural diagram of one of the steps of fabricating a vertical structure micro light emitting diode display panel according to the present invention;
FIGS. 2(a) and 2(b) are schematic structural diagrams illustrating a second step of fabricating a vertical structure micro light emitting diode display panel according to the present invention;
FIG. 3 is a schematic structural diagram of a third step of fabricating a vertical structure micro light emitting diode display panel according to the present invention;
FIG. 4 is a structural diagram of a fourth step of fabricating a vertical structure micro light emitting diode display panel according to the present invention;
FIG. 5 is a schematic structural diagram of a fifth step of fabricating a vertical structure micro light emitting diode display panel according to the present invention;
FIGS. 6(a) and 6(b) are schematic structural diagrams illustrating a sixth step of fabricating a vertical structure micro LED display panel according to the present invention;
FIG. 7 is a schematic structural diagram of a seventh step of fabricating a vertical structure micro light emitting diode display panel according to the present invention;
FIG. 8 is a structural diagram of an eighth step in the manufacture of a vertical structure micro light emitting diode display panel according to the present invention;
FIG. 9 is a schematic structural diagram of a ninth step of fabricating a vertical structure micro light emitting diode display panel according to the present invention.
Detailed Description
The present invention is further illustrated by the following figures and specific examples, which are to be understood as illustrative only and not as limiting the scope of the invention, which is to be given the full breadth of the appended claims and any and all equivalent modifications thereof which may occur to those skilled in the art upon reading the present specification.
For the sake of simplicity, the drawings only schematically show the parts relevant to the present invention, and they do not represent the actual structure as a product. In addition, in order to make the drawings concise and understandable, components having the same structure or function in some of the drawings are only schematically illustrated or only labeled. In this document, "one" means not only "only one" but also a case of "more than one".
The invention relates to a manufacturing method of a display panel of a vertical structure micro light-emitting diode display panel, which comprises the following steps:
s1: as shown in fig. 1, first electrodes 11 are formed on the bottom backplate 10 in an array.
The first electrode 11 is a bonding metal, such as Cu, Sn, In, and the like. The bottom back sheet 10 is a glass substrate, a PET (high temperature resistant polyester film), a PI (polyimide film), or the like, that is, the bottom back sheet 10 may be a rigid substrate or a flexible substrate.
S2: as shown in fig. 2(a) and 2(b), the vertical type micro-diode 20 is first transferred on the bottom backplate 10 and located on at least a portion of the first electrode 11, and then the vertical type micro-diode 20 is bonded on the first electrode 11 of the bottom backplate 10 through a bonding process; and finally, detecting the vertical micro diode 20 and repairing the damaged vertical micro diode 20.
The vertical micro-diode 20 is a single color, or red, green, and blue. After the vertical micro diodes 20 are bonded to the corresponding first electrodes 11, the vertical micro diodes 20 are detected, damaged vertical micro diodes 20 are screened out and repaired, and the bonded yield is guaranteed.
As shown in fig. 2(b), the bonding area between the vertical type micro-diode 20 and the bottom backplate 10 is not more than half of the bottom area of the vertical type micro-diode 20. The bottom of the vertical type micro diode 20 is square or circular, and the shape of the first electrode 11 is identical to or different from the shape of the bottom of the vertical type micro diode 20. The first electrode 11 and the vertical type micro diode 20 are bonded on the bottom backplate 10 by a metal bonding process.
The bottom panel of the vertical type micro-diode 20 is not larger than the area of the first electrode 11, the first electrode 11 may be entirely covered by the vertical type micro-diode 20, or at least half of the first electrode 11 is covered by the vertical type micro-diode 20, or the length of the side of the first electrode 11 is the same as the length of the side of the vertical type micro-diode 20.
S3: as shown in fig. 3, a filling layer 30 covering the vertical type micro diode 20 is deposited on the basis of the step S2.
The gap between the adjacent vertical micro diodes 20 is filled and flattened through the filling layer 30, so that the influence of the height difference of the vertical micro diodes 20 on the following process is solved. The thickness of the material of the filling layer 30 is higher than the height of the vertical micro-diode 20, so as to ensure that the filling layer 30 completely covers the vertical micro-diode 20. The filling layer 30 is made of opaque material and has better light shielding performance; the material of the filling layer 30 has high temperature resistance, low shrinkage, low mass loss ratio, and non-conductivity.
S4: as shown in fig. 4, the filling layer 30 is first exposed and developed on the basis of step S3 and an opening on the vertical type micro diode 20 is formed; then, a first metal layer is deposited and patterned to form a first conductive electrode 31 located in the opening and a second conductive electrode 42 located between two adjacent first conductive electrodes 41, where the second conductive electrode 42 is located on the filling layer 30.
Wherein the first conductive electrode 41 is a source, and the second conductive electrode 42 is a drain; alternatively, the first conductive electrode 41 is a drain and the second conductive electrode 42 is a source. The first conductive electrode 41 is disposed on the vertical micro diode 20 and electrically connected to the vertical micro diode 20.
S5: as shown in fig. 5, on the basis of step S4, the insulating layer 50 is first deposited; the insulating layer 50 is then patterned such that at least a portion of the surface of the first conductive electrode 41 and at least a portion of the surface of the second conductive electrode 42 are not covered by the insulating layer 50.
Wherein the material of the insulating layer 50 may be silicon oxide, silicon nitride or a combination thereof, and the insulating layer 50 is located between the first conductive electrode 41 and the second conductive electrode 42.
S6: as shown in fig. 6(a), a semiconductor material layer is deposited on the basis of step S5, and the semiconductor material layer is patterned to form a semiconductor layer 60 which is in contact with both the first through electrode 41 and the second through electrode 42;
Step S6 further includes, in addition to step S6, conducting a semiconductor layer located above the first conductive electrode 41 and the second conductive electrode 42 and forming a first conductive semiconductor layer 61 located on the first conductive electrode 41 and a second conductive semiconductor layer 62 located on the second conductive electrode 42, respectively.
As shown in fig. 6(a), each vertical type micro diode 20 corresponds to one semiconductor layer 60, and the semiconductor layer 60 is in contact with at least a part of the surface of the first conductive electrode 41 and at least a part of the surface of the second conductive electrode 42.
As shown in fig. 6(b), the first conductive semiconductor layer 61 is in contact with at least a part of the surface of the first via electrode 41, the second conductive semiconductor layer 62 is in contact with at least a part of the surface of the second via electrode 42 and at least a part of the surface of the first via electrode 41, and the semiconductor layer 60 is also present between the second conductive semiconductor layers 62. The semiconductor layer is made of IGZO, LTPS or a-Si.
S7: as shown in fig. 7, a gate insulating layer 70 is deposited on the basis of step S6.
The material of the gate insulating layer 70 may be silicon oxide, silicon nitride, or a combination thereof.
S8: as shown in fig. 8, a second metal layer is deposited on the basis of step S7, and the second metal layer is patterned to form the gate 80.
S9: as shown in fig. 9, an adhesive layer 91 and an encapsulation layer 92 are deposited on the basis of step S8.
The material of the adhesive layer 91 is a light-shielding material, so that the characteristic of the semiconductor layer is prevented from being deviated due to the entrance of external light. The sealing layer 92 may be a rigid protective substrate or a flexible protective film.
And forming the display panel with the vertical structure micro LED structure in single color, double color or full color through the 9 steps.
The present invention also provides a vertical structure micro led display panel, which comprises a bottom backplane 10, vertical micro diodes 20 disposed on the bottom backplane 10, a first electrode 11 for bonding the vertical micro diodes 20 to the bottom backplane 10, a filling layer 30 covering the vertical micro diodes 20 and the first electrode 11, a first conductive electrode 41 disposed on each vertical micro diode 20, a second conductive electrode 42 disposed on the filling layer 30 and having a distance from the first conductive electrode 41, the insulating layer 50 filled between the first and second conductive electrodes 41 and 42, the semiconductor layer 60 formed on the first and second conductive electrodes 41 and 42, the gate electrode 80 covering the semiconductor layer 60 and the gate insulating layer 70, on the gate insulating layer 70 and over the semiconductor layer, the adhesive layer 91 covering the gate electrode 80 and the gate insulating layer 70, and the encapsulation layer 92 on the adhesive layer 91.
According to the invention, the bonding process of the vertical micro diode 20 is performed before the manufacturing process of the bottom backboard 10, so that the high cost loss caused by the yield of the bonding process is reduced; the bonding process of the vertical micro diode 20 does not need the color conversion and material structure of the phosphor powder, and can directly realize full-color display.
The vertical structure micro light-emitting diode display panel forms the vertical type micro light-emitting diode through the bonding process, so that other film layer structures of the back plate are formed after the back plate is combined with the vertical type micro light-emitting diode, the actions of high temperature and high pressure are avoided, the characteristic influence and semiconductor adverse risks are solved, and the high cost loss of the back plate caused by the adverse effects is reduced.
Although the preferred embodiments of the present invention have been described in detail, the present invention is not limited to the details of the foregoing embodiments, and various equivalent changes (such as number, shape, position, etc.) may be made to the technical solution of the present invention within the technical spirit of the present invention, and these equivalent changes are all within the protection scope of the present invention.
Claims (10)
1. A manufacturing method of a display panel of a vertical structure micro light-emitting diode display panel is characterized by comprising the following steps:
S1: forming first electrodes distributed in an array on the bottom back plate;
s2: firstly, transferring the vertical micro diode on the bottom backboard and positioned on at least part of the first electrode, and then bonding the vertical micro diode on the first electrode of the bottom backboard through a bonding process;
s3: depositing a filling layer covering the vertical type micro diode on the basis of the step S2, wherein the thickness of the material of the filling layer is higher than the height of the vertical type micro diode;
s4: on the basis of step S3, first, the filling layer is exposed and developed to form an opening on the vertical micro diode; then depositing a first metal layer, patterning the first metal layer to form a first conducting electrode positioned in the opening and a second conducting electrode positioned between two adjacent first conducting electrodes, wherein the second conducting electrode is positioned on the filling layer;
the vertical micro diode is monochrome or red, green and blue.
2. The method of claim 1, wherein the bonding area between the vertical micro-diode and the bottom backplane is no greater than half of the bottom area of the vertical micro-diode.
3. The method of claim 1, wherein the bottom of the vertical micro-diode is square or circular, and the shape of the first electrode is the same or different from the shape of the bottom of the vertical micro-diode.
4. The method of claim 1, wherein the bottom panel of the vertical micro-diode is not smaller than the area of the first electrode, the first electrode is entirely covered by the vertical micro-diode, or half of the first electrode is covered by the vertical micro-diode, or the length of the side of the first electrode is the same as the length of the side of the vertical micro-diode.
5. The method for manufacturing a display panel of a vertical structure micro led display panel according to claim 1, wherein the step S2 further comprises the steps of: and detecting the vertical micro diode and repairing the damaged vertical micro diode.
6. The method as claimed in claim 1, wherein the filling layer is made of opaque material.
7. The method for manufacturing a display panel of a vertical structure micro light emitting diode display panel according to claim 1, further comprising the steps of:
s5: on the basis of step S4, an insulating layer is first deposited; then patterning the insulating layer so that at least part of the surface of the first conducting electrode and at least part of the surface of the second conducting electrode are not covered by the insulating layer;
s6: depositing a semiconductor material layer on the basis of the step S5, patterning the semiconductor material layer to form semiconductor layers each in contact with the first and second through electrodes;
s7: depositing a gate insulating layer on the basis of the step S6;
s8: depositing a second metal layer on the basis of the step S7, and patterning the second metal layer to form a gate;
s9: an adhesive layer and an encapsulation layer are deposited on the basis of step S8.
8. The method of claim 7, wherein step S6 is performed on the semiconductor layer located above the first conductive electrode and the second conductive electrode to form a first conductive semiconductor layer located on the first conductive electrode and a second conductive semiconductor layer located on the second conductive electrode, respectively, in addition to step S6.
9. A vertical structure micro light-emitting diode display panel is characterized by comprising a bottom backboard, vertical micro diodes positioned on the bottom backboard, first electrodes for bonding the vertical micro diodes on the bottom backboard, a filling layer for covering the vertical micro diodes, first conducting electrodes positioned on each vertical micro diode and second conducting electrodes positioned on the filling layer and having a distance with the first conducting electrodes, wherein the vertical micro diodes are single color or red, green and blue.
10. The vertical structure micro led display panel of claim 9, further comprising an insulating layer filled between the first and second conductive electrodes, a semiconductor layer formed on the first and second conductive electrodes, a gate insulating layer covering the semiconductor layer, a gate electrode on the gate insulating layer and above the semiconductor layer, an adhesive layer covering the gate electrode and the gate insulating layer, and an encapsulation layer on the adhesive layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010628913.3A CN111863729A (en) | 2020-06-29 | 2020-06-29 | Vertical structure micro light-emitting diode display panel and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010628913.3A CN111863729A (en) | 2020-06-29 | 2020-06-29 | Vertical structure micro light-emitting diode display panel and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111863729A true CN111863729A (en) | 2020-10-30 |
Family
ID=73151840
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010628913.3A Pending CN111863729A (en) | 2020-06-29 | 2020-06-29 | Vertical structure micro light-emitting diode display panel and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111863729A (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103855179A (en) * | 2012-12-03 | 2014-06-11 | 孙润光 | Inorganic light-emitting diode display device structure |
| CN108493209A (en) * | 2018-05-24 | 2018-09-04 | 京东方科技集团股份有限公司 | A kind of production method of display base plate, display device and display base plate |
| CN108886050A (en) * | 2017-01-24 | 2018-11-23 | 歌尔股份有限公司 | Micro- LED matrix, display equipment and micro- LED manufacturing method |
| CN111244017A (en) * | 2020-03-17 | 2020-06-05 | 南京中电熊猫平板显示科技有限公司 | Miniature light-emitting diode display back plate and manufacturing method thereof |
-
2020
- 2020-06-29 CN CN202010628913.3A patent/CN111863729A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103855179A (en) * | 2012-12-03 | 2014-06-11 | 孙润光 | Inorganic light-emitting diode display device structure |
| CN108886050A (en) * | 2017-01-24 | 2018-11-23 | 歌尔股份有限公司 | Micro- LED matrix, display equipment and micro- LED manufacturing method |
| CN108493209A (en) * | 2018-05-24 | 2018-09-04 | 京东方科技集团股份有限公司 | A kind of production method of display base plate, display device and display base plate |
| CN111244017A (en) * | 2020-03-17 | 2020-06-05 | 南京中电熊猫平板显示科技有限公司 | Miniature light-emitting diode display back plate and manufacturing method thereof |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI467528B (en) | Light emitting diode display panel and method of fabricating the same | |
| TWI679627B (en) | Display panel | |
| CN110190084B (en) | Display panel, manufacturing method thereof and display device | |
| US20220336423A1 (en) | Method for manufacturing display device, and substrate for manufacture of display device | |
| CN101728374B (en) | Dual panel type organic electroluminescent display device and method of fabricating the same | |
| CN111508989B (en) | Display substrate and preparation method thereof, display panel and preparation method thereof | |
| CN103824965A (en) | Organic light-emitting diode display panel and method for fabricating the same | |
| CN113748518B (en) | Display substrate, manufacturing method thereof and display device | |
| CN106663721A (en) | Display device using semiconductor light emitting device | |
| CN110265454A (en) | Display panel, manufacturing method thereof and display device | |
| CN107240356B (en) | Full-color LED display unit and preparation method thereof | |
| CN109671764B (en) | Display device and forming method thereof | |
| TWI661585B (en) | Light emitting diode package | |
| KR20180102424A (en) | Display device using semiconductor light emitting device and method for manufacturing | |
| US11961947B2 (en) | Substrate for manufacturing display device, display device and manufacturing method thereof | |
| CN114093902A (en) | Display panel and manufacturing method thereof | |
| CN110098227B (en) | OLED display panel and manufacturing method thereof | |
| CN109935612B (en) | Mini LED display screen and manufacturing method | |
| CN111863729A (en) | Vertical structure micro light-emitting diode display panel and manufacturing method thereof | |
| TW202009984A (en) | Flexible substrate and circuit structure and method of manufacturing the same | |
| WO2021189494A1 (en) | Display panel and display apparatus | |
| KR102645641B1 (en) | Pixel, display device including the same, and manufacturing method thereof | |
| CN108573660B (en) | Display device | |
| EP3703127B1 (en) | Electronic device and manufacturing method of electronic device | |
| US12132054B2 (en) | Electronic device, manufacturing method of electronic device, and method for attaching a light emitting element to a substrate |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20201030 |
|
| WD01 | Invention patent application deemed withdrawn after publication |