CN111863687A - Semiconductor TO encapsulation double-material-sheet rail device - Google Patents

Semiconductor TO encapsulation double-material-sheet rail device Download PDF

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Publication number
CN111863687A
CN111863687A CN202010886218.7A CN202010886218A CN111863687A CN 111863687 A CN111863687 A CN 111863687A CN 202010886218 A CN202010886218 A CN 202010886218A CN 111863687 A CN111863687 A CN 111863687A
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CN
China
Prior art keywords
rail
groove
cover plate
semiconductor
base
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Pending
Application number
CN202010886218.7A
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Chinese (zh)
Inventor
杜守明
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Hunan Aosairui Intelligent Technology Co Ltd
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Hunan Aosairui Intelligent Technology Co Ltd
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Priority to CN202010886218.7A priority Critical patent/CN111863687A/en
Publication of CN111863687A publication Critical patent/CN111863687A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67706Mechanical details, e.g. roller, belt
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75Apparatus for connecting with bump connectors or layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7565Means for transporting the components to be connected

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Packages (AREA)

Abstract

The invention discloses a semiconductor TO packaging double-material-sheet rail device which comprises a base, a sliding chute and a cover plate, wherein the base is provided with a plurality of through holes; the sliding chute is fixedly arranged on the upper end surface of the base; a first track and a second track which are parallel to each other are fixedly arranged in the sliding chute; the first rail and the second rail are respectively used for the sliding operation of the first material sheet and the second material sheet; the cover plate is connected with the base and covers the first rail and the second rail; a cavity is formed between the cover plate and the first rail and between the cover plate and the second rail; the upper end surface of the cover plate is provided with a drawing tin bath, the drawing tin bath comprises a first drawing tin bath and a second drawing tin bath, the first drawing tin bath corresponds to the first track, and the second drawing tin bath corresponds to the second track; the upper end face of the cover plate is further provided with a chip bonding groove which is arranged at the rear end of the drawing tin groove and comprises a first chip groove and a second chip groove, the first chip groove corresponds to the first rail, and the second chip groove corresponds to the second rail. Through setting up TO the double track, semiconductor TO encapsulation efficiency has been improved greatly.

Description

Semiconductor TO encapsulation double-material-sheet rail device
Technical Field
The invention relates TO the technical field of semiconductor packaging, in particular TO a semiconductor TO packaging double-material-sheet rail device.
Background
In the development of the soft solder bonding technology for packaging the semiconductor power device, a point tin pressing die is developed to a tin painting technology. In practical application, the two technologies are actually used, and the main reason is that the two technologies have respective advantages and disadvantages; the tin spot pressing die technology has the defects that tin forming is difficult, and the thickness of a tin layer is not easy to control, so that the tin spot pressing die technology has the advantage of high efficiency; the tin painting technology has the advantages of regular forming and controllable uniform thickness, but has the defect of low forming efficiency.
The reason that the tin drawing technology is low in efficiency is mainly that the existing TO packaging rail of the semiconductor is a single rail, and one set of device can only carry out packaging processing on a row of material sheets.
Disclosure of Invention
In view of this, the double-material-sheet rail device for semiconductor TO packaging is provided with double rails, and can simultaneously operate two rows of material sheets, so that the semiconductor TO packaging efficiency is greatly improved.
A semiconductor TO packaging double-material-sheet rail device comprises a base, a sliding chute and a cover plate;
the sliding chute is fixedly arranged on the upper end surface of the base;
a first rail and a second rail which are parallel to each other are fixedly arranged in the sliding groove; the first rail and the second rail are respectively used for the first material sheet and the second material sheet to slide;
the cover plate is connected with the base and covers the first rail and the second rail; a cavity is formed between the cover plate and the first rail and between the cover plate and the second rail;
the upper end surface of the cover plate is provided with a drawing tin groove, the drawing tin groove comprises a first drawing tin groove and a second drawing tin groove, the first drawing tin groove corresponds to the first track, and the second drawing tin groove corresponds to the second track;
the cover plate is characterized in that a chip bonding groove is further formed in the upper end face of the cover plate and is arranged at the rear end of the drawing tin groove, the chip bonding groove comprises a first chip groove and a second chip groove, the first chip groove corresponds to the first rail, and the second chip groove corresponds to the second rail.
Preferably, the first rail and the second rail are respectively provided with a positioning seat, and the positioning seats are used for positioning and limiting the first material sheet and the second material sheet.
Preferably, the side end face of the chute is further provided with a plurality of heating slots for placing heating rods, and the heating slots are arranged at intervals.
Preferably, the heating slots are evenly distributed at equal intervals.
Preferably, the upper end face of the sliding groove is provided with a plurality of nitrogen and hydrogen holes for nitrogen and hydrogen to pass through, and the nitrogen and hydrogen holes are communicated with the cavity.
Preferably, the nitrogen and hydrogen holes are uniformly distributed on the upper end face of the sliding chute at equal intervals.
Preferably, still include the base, the base sets up in the base lower extreme, base and base fixed connection, the base terminal surface is provided with the mounting hole.
Preferably, the tin soldering machine further comprises a first pressing plate, the first pressing plate is fixedly connected with the cover plate, the first pressing plate is connected with a first pressing rod, and the first pressing plate is arranged at the first tin soldering groove.
Preferably, the tin soldering machine further comprises a second pressing plate, the second pressing plate is fixedly connected with the cover plate, the second pressing plate is connected with a second pressing rod, and the second pressing plate is arranged at the second tin soldering tank.
Preferably, a second chip groove of the chip bonding groove and the first chip groove are arranged in parallel side by side, a third pressing rod is arranged on the cover plate at the chip bonding groove, and the third pressing rod is used for fixing the first material sheet and the second material sheet when the chip is attached.
The invention has the beneficial effects that: the semiconductor TO packaging rail device is provided with the double rails, so that two rows of soft material sheets can be packaged simultaneously, and the semiconductor TO packaging efficiency is greatly improved; the quality of TO encapsulation product has been improved, and drawing tin shaping is even level and smooth, and the shape is regular, and the chip is level and smooth, and tin coverage is high, and the void ratio is low.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a top down perspective view of a semiconductor TO package dual web track arrangement (including the web);
FIG. 2 is a top down perspective view of a semiconductor TO package dual web track arrangement (including the web);
FIG. 3 is a schematic top view of a semiconductor TO package dual web track arrangement (including the web);
FIG. 4 is a top down perspective view of a semiconductor TO package dual web track arrangement (no cover plate, web included);
FIG. 5 is a top down perspective view of a semiconductor TO package dual web track arrangement (no lid, no web);
fig. 6 is a top view of a semiconductor TO package dual-web track arrangement (no lid, no web).
Reference numerals
11 base 12 mounting hole
13 first web 14 second web
15 cover plate 16 third pressure lever
17 glue chip groove 18 first clamp plate
19 first drawing tin groove 20 second pressing plate
21 second drawing tin groove 22 chute
23 heating slot 24 base
25 first press rod 26 second press rod
27 nitrogen hydrogen hole 28 positioning seat
29 second track 30 first track
171 second chip groove 172 first chip groove
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
Referring TO fig. 1, 2, 3, 4, 5 and 6, a semiconductor TO package dual-web rail device includes a base 24, a chute 22 and a cover 15; the chute 22 is fixedly arranged on the upper end surface of the base 24; a first rail 30 and a second rail 29 which are parallel to each other are fixedly arranged in the chute 22; the first rail 30 and the second rail 29 are respectively used for the sliding running of the first material sheet 13 and the second material sheet 14; the cover plate 15 is connected with the base 24, and the cover plate 15 covers the first rail 30 and the second rail 29; the cover plate 15 forms a cavity with the first rail 30 and the second rail 29; the upper end surface of the cover plate 15 is provided with a drawing tin groove, the drawing tin groove comprises a first drawing tin groove 19 and a second drawing tin groove 21, the first drawing tin groove 19 corresponds to the first track 30, and the second drawing tin groove 21 corresponds to the second track 29; the upper end surface of the cover plate 15 is further provided with a chip bonding groove 17, the chip bonding groove 17 is arranged at the rear end of the tin drawing groove, the chip bonding groove 17 comprises a first chip groove 172 and a second chip groove 171, the first chip groove 172 corresponds to the first rail 30, and the second chip groove 171 corresponds to the second rail 29. When the semiconductor TO packaging double-material-sheet rail device works, two rows of material sheets are respectively placed on the first rail 30 and the second rail 29, and the first material sheet 13 and the second material sheet 14 respectively move forwards along the first rail 30 and the second rail 29; the first material sheet 13 is subjected to tin painting through a first tin painting groove 19 on the cover plate 15, and the second material sheet 14 is subjected to tin painting through a second tin painting groove 21 on the cover plate 15; after the tin is drawn, the chips are attached to the first web 13 and the second web 14 through the first chip groove 172 and the second chip groove 171 of the cover plate 15, respectively, and the chips are packaged. By arranging the double tracks, two rows of soft material sheets can be packaged simultaneously, so that the TO packaging efficiency of the semiconductor is greatly improved; the quality of TO encapsulation product has been improved, and drawing tin shaping is even level and smooth, and the shape is regular, and the chip is level and smooth, and tin coverage is high, and the void ratio is low.
Positioning seats 28 are respectively arranged on the first rail 30 and the second rail 29, and the positioning seats 28 are used for positioning and limiting the first material sheet 13 and the second material sheet 14; the first material sheet 13 and the second material sheet 14 are positioned, so that the proper machining angle of the material sheets during tin drawing and chip packaging can be ensured, and the adverse effect of insufficient tool precision on products is eliminated.
A plurality of heating slotted holes 23 for placing heating rods are also formed in the end face of the side of the sliding chute 22, and the heating slotted holes 23 are arranged at intervals. Since the chip is bonded and welded with the tin during packaging, enough temperature is ensured during chip bonding and packaging, and the temperature during the whole packaging is maintained by placing a heating rod in the heating slot hole 23; generally, the track is composed of 8 heating temperature zones, a heat preservation zone and a cooling temperature zone; and the normal operation of the chip packaging process is ensured. In order to ensure the chip is heated uniformly during packaging, the heating slots 23 are uniformly distributed at equal intervals.
In order to prevent the oxidation of the web, tin, and chips at high temperatures, the cavity between the cover plate 15 and the track is typically filled with an inert and reducing gas; therefore, a plurality of nitrogen and hydrogen holes 27 for nitrogen and hydrogen to pass through are formed on the upper end surface of the sliding chute 22, and the nitrogen and hydrogen holes 27 are communicated with the cavity. The nitrogen can protect the tablet, the tin and the chip from being oxidized at high temperature, and the oxidized tablet, tin and chip can be reduced through the hydrogen, so that the quality of the packaged product is ensured. In order to ensure the environment in the cavity is consistent, the nitrogen and hydrogen holes 27 are generally evenly distributed on the upper end surface of the chute 22 at equal intervals.
A base 11 is arranged at the lower end of the base 24, and the base 11 is fixedly connected with the base 24; the cross sectional area of the lower end face of the base 11 is large enough, so that the stability of the device can be ensured, and the device is not easy to topple over; in order to prevent the device from deviating during operation and affecting the packaging accuracy, a mounting hole 12 is generally formed in an end surface of the base 11, and the device is fixed by a bolt passing through the mounting hole 12.
In order to ensure that the first material sheet 13 can accurately draw tin when drawing tin, the first material sheet 13 is generally fixed, that is, a first pressing plate 18 is arranged on the cover plate 15 at the first tin drawing groove 19, the first pressing plate 18 is fixedly connected with the cover plate 15, and the first pressing plate 18 is connected with a first pressing rod 25, so that the first pressing plate 18 presses the first material sheet 13 by pressing against the first pressing rod 25, thereby preventing the first material sheet 13 from shifting when drawing tin. In order to ensure that the second material sheet 14 can accurately draw tin when drawing tin, the second material sheet 14 is generally fixed, that is, a second pressing plate 20 is arranged on the cover plate 15 at the second tin drawing groove 21, the second pressing plate 20 is fixedly connected with the cover plate 15, the second pressing plate 20 is connected with a second pressing rod 26, and the second pressing plate 20 presses the second material sheet 14 by pressing against the second pressing rod 26, so as to prevent the second material sheet 14 from shifting when drawing tin.
In order to improve efficiency and ensure chip bonding, two chips may be simultaneously bonded to the first web 13 and the second web 14, and the second chip grooves 171 of the chip bonding grooves 17 may be arranged in parallel with the first chip grooves 172. In order to ensure that the positions of the first material sheet 13 and the second material sheet 14 are not deviated when the chips are packaged on the first material sheet 13 and the second material sheet 14, the chips are attached to the positions where tin is drawn on the material sheets, and the packaging is complete; a third pressing rod 16 is arranged on the cover plate 15 at the chip bonding groove 17, and the third pressing rod 16 is used for fixing the first material sheet 13 and the second material sheet 14 when the chips are attached.
The embodiment of the invention can carry out sequence adjustment, combination and deletion according to actual needs.
The embodiments describe the present invention in detail, and the specific embodiments are applied to explain the structural principle and the implementation of the present invention, and the above embodiments are only used to help understand the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.

Claims (10)

1. A semiconductor TO packaging double-material-sheet rail device is characterized by comprising a base, a sliding chute and a cover plate;
the sliding chute is fixedly arranged on the upper end surface of the base;
a first rail and a second rail which are parallel to each other are fixedly arranged in the sliding groove; the first rail and the second rail are respectively used for the first material sheet and the second material sheet to slide;
the cover plate is connected with the base and covers the first rail and the second rail; a cavity is formed between the cover plate and the first rail and between the cover plate and the second rail;
the upper end surface of the cover plate is provided with a drawing tin groove, the drawing tin groove comprises a first drawing tin groove and a second drawing tin groove, the first drawing tin groove corresponds to the first track, and the second drawing tin groove corresponds to the second track;
the cover plate is characterized in that a chip bonding groove is further formed in the upper end face of the cover plate and is arranged at the rear end of the drawing tin groove, the chip bonding groove comprises a first chip groove and a second chip groove, the first chip groove corresponds to the first rail, and the second chip groove corresponds to the second rail.
2. The semiconductor TO package double-material-sheet rail device according TO claim 1, wherein positioning seats are respectively arranged on the first rail and the second rail, and the positioning seats are used for positioning and limiting the first material sheet and the second material sheet.
3. The semiconductor TO packaging double-tablet rail device as claimed in claim 1, wherein the chute side end face is further provided with a plurality of heating slots for placing heating rods, and the heating slots are arranged at intervals.
4. The semiconductor TO package dual-web track device of claim 3, wherein the heating slots are evenly distributed at equal intervals.
5. The semiconductor TO package double-material-sheet rail device according TO claim 1, wherein a plurality of nitrogen and hydrogen holes for nitrogen and hydrogen TO pass through are formed in the upper end face of the sliding chute, and the nitrogen and hydrogen holes are communicated with the cavity.
6. The semiconductor TO package double-material-sheet rail device according TO claim 5, wherein the nitrogen and hydrogen holes are uniformly distributed on the upper end face of the sliding chute at equal intervals.
7. The semiconductor TO package double-material-sheet rail device according TO claim 1, further comprising a base, wherein the base is arranged at the lower end of the base and fixedly connected with the base, and the end face of the base is provided with a mounting hole.
8. The semiconductor TO package double-tablet rail device according TO claim 1, further comprising a first pressing plate fixedly connected with the cover plate, wherein the first pressing plate is connected with a first pressing rod, and the first pressing plate is arranged at the first tin drawing groove.
9. The semiconductor TO package double-tablet rail device according TO claim 1, further comprising a second pressing plate fixedly connected with the cover plate, the second pressing plate connected with a second pressing rod, and the second pressing plate arranged at the second tin drawing groove.
10. The semiconductor TO package double-web rail device according TO claim 1, wherein a second chip slot of the chip bonding slots is arranged side by side in parallel with the first chip slot, and a third pressing rod is arranged on the cover plate at the chip bonding slots and used for fixing the first web and the second web when the chips are attached.
CN202010886218.7A 2020-08-28 2020-08-28 Semiconductor TO encapsulation double-material-sheet rail device Pending CN111863687A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010886218.7A CN111863687A (en) 2020-08-28 2020-08-28 Semiconductor TO encapsulation double-material-sheet rail device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010886218.7A CN111863687A (en) 2020-08-28 2020-08-28 Semiconductor TO encapsulation double-material-sheet rail device

Publications (1)

Publication Number Publication Date
CN111863687A true CN111863687A (en) 2020-10-30

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CN202010886218.7A Pending CN111863687A (en) 2020-08-28 2020-08-28 Semiconductor TO encapsulation double-material-sheet rail device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112786495A (en) * 2021-01-21 2021-05-11 无锡固电半导体股份有限公司 High-temperature track mechanism for packaging semiconductor high-power device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112786495A (en) * 2021-01-21 2021-05-11 无锡固电半导体股份有限公司 High-temperature track mechanism for packaging semiconductor high-power device

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