CN111863592A - Post-polish cleaning method and method for forming semiconductor structure - Google Patents
Post-polish cleaning method and method for forming semiconductor structure Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823431—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of transistors with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Cleaning Or Drying Semiconductors (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
A post-polish cleaning method and a method for forming a semiconductor structure, the post-polish cleaning method being suitable for cleaning a wafer after a polishing process to remove contaminant particles from a surface of the wafer, the post-polish cleaning method comprising: executing a first cleaning process on the wafer, wherein the first cleaning process comprises a first sub-cleaning process, and the first sub-cleaning process comprises the following steps: carrying out first washing treatment by adopting megasonic deionized water and a first chemical cleaning agent; the first chemical cleaning agent is suitable for increasing the hydrophilicity of pollutant particles and the electrical repulsive force between the pollutant particles and the surface of the wafer; and after the first cleaning process is executed, drying the wafer. The embodiment of the invention is beneficial to improving the cleaning effect of the wafer and effectively reducing the residual quantity of pollutant particles on the wafer.
Description
Technical Field
The embodiment of the invention relates to the field of semiconductor manufacturing, in particular to a cleaning method after grinding and a forming method of a semiconductor structure.
Background
In the fabrication of Integrated Circuit (IC) chips, a wafer cleaning process is often performed on semiconductor wafers (wafers) used to manufacture the ICs. The purpose of wafer cleaning is to remove contaminants (Contamination) such as organic residues (Residue), metal impurities or particles (particles) adhered to the surface of the wafer. The pollution of metal impurities can cause the phenomena of electric leakage of a PN junction interface, reduction of breakdown voltage of a grid oxide layer and the like; the adhesion of particles can affect the authenticity of the pattern transfer in the lithographic process and can even cause shorting of the circuit structures. Therefore, the wafer cleaning directly affects the yield of integrated circuit fabrication, and the most effective cleaning method for removing contaminants such as organic residues, metal impurities or particles is sought in the industry.
In the fabrication of integrated circuits, a planarization process is typically performed using a Chemical Mechanical Polishing (CMP) process. However, during the cmp process, the polishing particles and polishing byproducts are easily adsorbed on the wafer surface to form contaminant particles, which are easily defective in the subsequent process. Therefore, after the cmp process, the wafer is also required to be cleaned to remove the contaminant particles on the surface of the wafer to reduce defects.
Disclosure of Invention
Embodiments of the present invention provide a post-polishing cleaning method and a method for forming a semiconductor structure, which improve the cleaning effect on a wafer.
In order to solve the above problems, an embodiment of the present invention provides a method for cleaning a wafer after polishing, which is suitable for cleaning the wafer after polishing to remove contaminant particles on the surface of the wafer, and includes: executing a first cleaning process on the wafer, wherein the first cleaning process comprises a first sub-cleaning process, and the first sub-cleaning process comprises the following steps: carrying out first washing treatment by adopting megasonic deionized water and a first chemical cleaning agent; the first chemical cleaning agent is suitable for increasing the hydrophilicity of pollutant particles and the electrical repulsive force between the pollutant particles and the surface of the wafer; and after the first cleaning process is executed, drying the wafer.
Correspondingly, an embodiment of the present invention further provides a method for forming a semiconductor structure, including: providing a wafer, wherein the wafer comprises a substrate, a metal gate structure is formed on the substrate, an interlayer dielectric layer is formed on the substrate exposed out of the metal gate structure, the top of the interlayer dielectric layer is higher than the top of the metal gate structure, the top of the metal gate structure and the interlayer dielectric layer enclose a groove, a hard mask material layer is formed in the groove, and the hard mask material layer also covers the top of the interlayer dielectric layer; grinding the hard mask material layer, wherein the residual hard mask material layer after grinding is used as a hard mask layer; after the polishing process, the wafer is cleaned by the cleaning method.
Compared with the prior art, the technical scheme of the embodiment of the invention has the following advantages:
in an embodiment of the present invention, a first cleaning process is performed on the wafer, where the first cleaning process includes a first sub-cleaning process, and the first sub-cleaning process includes: carrying out first washing treatment by adopting megasonic deionized water and a first chemical cleaning agent; the first chemical cleaning agent is suitable for increasing the hydrophilicity of the pollutant particles and the electrical repulsive force of the pollutant particles and the surface of the wafer. The megasonic deionized water can realize high-frequency vibration, correspondingly increase the vibration frequency of pollutant particles, and reduce the physical contact and adsorption of the pollutant particles and the surface of the wafer, so that the megasonic deionized water can be matched with a first chemical cleaning agent to ensure that the pollutant particles are easy to separate from the surface of the wafer, thereby effectively reducing the residual quantity of the pollutant particles on the wafer, further improving the cleaning effect on the wafer, and correspondingly improving the performance and yield of the formed semiconductor structure.
In an alternative, the first cleaning process further includes a second sub-cleaning process after the first sub-cleaning process, and the second sub-cleaning process includes: carrying out second flushing treatment by using deionized water and a second chemical cleaning agent; the second chemical cleaning agent and the first chemical cleaning agent have the same components, and the mass percentage concentration of the second chemical cleaning agent is less than that of the first chemical cleaning agent; carry out first washing through adopting the higher first chemical cleaning agent of mass percent concentration to handle, make first chemical cleaning agent can show the hydrophilicity that improves pollutant particle surface and the electric repulsion force of increase pollutant particle and wafer surface, and carry out the second through adopting the lower second chemical cleaning agent of mass percent concentration and wash the processing, so as to improve the problem that is difficult to get rid of because of the concentration of chemical cleaning agent is too high, thereby when satisfying the requirement of washing, improve the remaining problem of chemical composition of chemical cleaning agent, and then further improve the cleaning performance to the wafer.
Drawings
FIG. 1 is a flow chart illustrating steps of a post-polishing cleaning method according to an embodiment of the present invention;
FIG. 2 is a flow chart corresponding to steps in the first cleaning process of FIG. 1;
FIG. 3 is a flow chart corresponding to steps in the first sub-cleaning process of FIG. 2;
FIG. 4 is a flow chart corresponding to steps in the second sub-cleaning process of FIG. 2;
FIG. 5 is a flow chart corresponding to steps in the second cleaning process of FIG. 1;
fig. 6 to 7 are schematic structural diagrams corresponding to steps in an embodiment of a method for forming a semiconductor structure according to the present invention.
Detailed Description
In the semiconductor field, a step of polishing a wafer is generally included. After the polishing process, contaminant particles such as polishing particles and organic contaminants are generally left on the wafer surface.
Therefore, after the polishing process, it is usually necessary to clean the wafer to remove the contaminant particles generated during the polishing process, so as to prevent defects in the subsequent process.
Current post-polish cleaning methods typically include performing at least one cleaning process, which typically includes the steps of: and brushing the wafer by using a chemical cleaning agent, wherein the chemical cleaning agent is suitable for increasing the hydrophilicity of pollutant particles and the electric repulsive force between the pollutant particles and the surface of the wafer.
However, in the polishing process, the wafer surface usually has a positive or negative Zeta potential, and the wafer surface is liable to adsorb contaminant particles having an opposite Zeta potential, and the contaminant particles and the wafer surface have a strong electrical adsorption force, and it is difficult to remove the contaminant particles by the aforementioned post-polishing cleaning method. Here, the Zeta potential refers to a potential generated on the surface of a particle when the particle exists in a liquid.
For example: in the semiconductor field, after forming a metal gate (metal gate) structure, the method generally further includes: and forming a hard mask layer on the top of the metal gate structure, wherein the hard mask layer is used for protecting the top of the metal gate structure in the subsequent etching process step for forming the source/drain contact hole, so that the self-alignment of the etching process is realized. Specifically, forming the hard mask layer generally includes a step of performing a grinding process to planarize a surface of the hard mask layer and to make a thickness of the hard mask layer meet process requirements.
The hard mask layer is made of silicon nitride generally, in the grinding treatment step, the Zeta potential of the silicon nitride material is generally positive, pollutant particles with the Zeta potential being negative electricity are easily adsorbed on the surface of the hard mask layer, the pollutant particles and the surface of the hard mask layer have strong adsorption force, and the pollutant particles are difficult to remove by adopting the cleaning method after grinding.
With the further reduction of process nodes, further requirements are provided for the size and the number of the pollutant particles on the surface of the wafer, the pollutant particles on the surface of the wafer are difficult to effectively remove by adopting the cleaning method after grinding, and the cleaning effect is difficult to meet the process requirements.
In order to solve the above technical problem, an embodiment of the present invention provides a method for cleaning a wafer after polishing, which is suitable for cleaning the wafer after polishing to remove contaminant particles on the surface of the wafer, and includes: executing a first cleaning process on the wafer, wherein the first cleaning process comprises a first sub-cleaning process, and the first sub-cleaning process comprises the following steps: carrying out first washing treatment by adopting megasonic deionized water and a first chemical cleaning agent; the first chemical cleaning agent is suitable for increasing the hydrophilicity of pollutant particles and the electrical repulsive force between the pollutant particles and the surface of the wafer; and after the first cleaning process is executed, drying the wafer.
In an embodiment of the present invention, the first sub-cleaning process includes: carrying out first washing treatment by adopting megasonic deionized water and a first chemical cleaning agent; the first chemical cleaning agent is suitable for increasing the hydrophilicity of the pollutant particles and the electrical repulsive force of the pollutant particles and the surface of the wafer. The megasonic deionized water can realize high-frequency vibration, correspondingly increase the vibration frequency of pollutant particles, and reduce the physical contact and adsorption of the pollutant particles and the surface of the wafer, so that the megasonic deionized water can be matched with a first chemical cleaning agent to ensure that the pollutant particles are easy to separate from the surface of the wafer, thereby effectively reducing the residual quantity of the pollutant particles on the wafer, further improving the cleaning effect on the wafer, and correspondingly improving the performance and yield of the formed semiconductor structure.
In order to make the aforementioned objects, features and advantages of the embodiments of the present invention comprehensible, specific embodiments accompanied with figures are described in detail below.
FIG. 1 is a flow chart illustrating steps of a post-polishing cleaning method according to an embodiment of the present invention.
The cleaning method is suitable for cleaning the ground wafer, and removing pollutant particles on the surface of the wafer, so that the cleaning effect meets the process requirement.
Referring to fig. 1 and fig. 2 in combination, fig. 2 is a flowchart corresponding to the steps in the first cleaning process in fig. 1, and step S1 is executed to perform a first cleaning process on the wafer, where the first cleaning process includes: step S11 is executed to perform a first sub-cleaning process on the wafer.
The first cleaning process is used to remove a large amount of larger contaminant particles (e.g., polishing agents and polishing byproducts) generated after polishing.
Specifically, referring to fig. 3 in combination, fig. 3 is a flowchart corresponding to steps in the first sub-cleaning process in fig. 2, wherein the steps of the first sub-cleaning process include: performing step S111, performing a first rinsing process using Megasonic (Megasonic) Deionized water (DIW) and a first chemical cleaning agent; the first chemical cleaning agent is suitable for increasing the hydrophilicity of the pollutant particles and the electrical repulsive force between the pollutant particles and the surface of the wafer.
Megasonic is a sonic with frequency higher than 1000000Hz, the megasonic deionized water can realize high-frequency vibration, correspondingly increase the vibration frequency of pollutant particles, reduce the physical contact and adsorption of the pollutant particles and the surface of the wafer, and therefore, the megasonic deionized water can be matched with a first chemical cleaning agent to realize the effect of removing a large number of pollutant particles, and the pollutant particles are easy to separate from the surface of the wafer, so that the residual quantity of the pollutant particles on the wafer is effectively reduced, the cleaning effect of the wafer is further improved, and the performance and the yield of the formed semiconductor structure are correspondingly improved.
The megasonic waves are high-frequency oscillation signals emitted by a megasonic generator, the high-frequency oscillation signals are converted into high-frequency mechanical oscillation signals through a transducer and are transmitted to a medium, the megasonic waves are radiated forwards at intervals in a solution to enable the liquid to flow to generate tens of thousands of micro bubbles, the micro bubbles (cavitation nuclei) in the liquid vibrate under the action of a sound field, when the sound pressure reaches a certain value, the bubbles grow rapidly and then are closed suddenly, shock waves are generated when the bubbles are closed, thousands of atmospheric pressure is generated around the bubbles, so that the accelerated motion and vibration of pollutant particles are forced, the physical contact and adsorption of the pollutant particles and the surface of a wafer are reduced, and the pollutant particles are separated from the surface of the wafer.
The chemical cleaning agent for cleaning after polishing usually contains a surfactant, a corrosion inhibitor, a PH adjuster, and the like. Wherein the surfactant is capable of altering the hydrophilicity or hydrophobicity, and electronegativity of the surface of the contaminant particle; the corrosion inhibitor is used for reducing the corrosion of the chemical cleaning agent to the surface of the wafer; the surface electrical properties of the pollutant particles under different pH values of the solution are different, and the pH value regulator is used for being matched with the surfactant, so that the electrical properties of the pollutant particles meet the process requirements.
In this embodiment, the surfactant in the first chemical cleaning agent can improve the hydrophilicity of the surface of the pollutant particles, so that the pollutant particles are easily removed under the scouring action of water power; the surfactant can also reduce the potential difference between the pollutant particles and the surface of the wafer and even make the pollutant particles have the same electrical property with the surface of the wafer, thereby increasing the electrical repulsive force of the pollutant particles and the surface of the wafer. In summary, the first chemical cleaning agent is beneficial to reducing the adhesion of the pollutant particles on the surface of the wafer, so that the pollutant particles are easy to wash away.
The megasonic power of the megasonic deionized water is not suitable to be too small. If the megasonic power is too low, the energy density of the megasonic and the vibration frequency of the megasonic deionized water are correspondingly too low, the megasonic deionized water is used for reducing the poor effect of physical contact and adsorption of pollutant particles and the surface of the wafer, so that the cleaning effect is reduced, and therefore, the megasonic power of the megasonic deionized water is at least 40 watts.
The higher the megasonic power is, the better the cleaning effect is correspondingly. However, if the megasonic power is too high, the uniformity of the energy density of the megasonic is easily lowered, and the pattern on the wafer surface is easily damaged. For this reason, in this embodiment, the megasonic power of the megasonic deionized water is 40 w to 200 w.
The higher the mass percentage concentration of the first chemical cleaning agent is, the higher the content of the surfactant in the first chemical cleaning agent is, so that the mass percentage concentration of the first chemical cleaning agent is not too low, otherwise, the effects of increasing the hydrophilicity of the surface of the pollutant particle and the electric repulsive force between the pollutant particle and the surface of the wafer are difficult to achieve. For this reason, in the present embodiment, the concentration of the first chemical cleaning agent is at least 5% by mass.
It should be noted that, compared with the chemical cleaning agent used in the conventional cleaning treatment after grinding, the first chemical cleaning agent of the present embodiment has a higher mass percentage concentration, so that the hydrophilicity of the surface of the contaminant particle can be significantly increased, and the electrical repulsive force between the contaminant particle and the surface of the wafer can be increased, and further, the first chemical cleaning agent is matched with the megasonic deionized water, so that the contaminant particle is more easily separated from the surface of the wafer, and the cleaning effect of removing a large amount of contaminant particles is achieved.
However, the mass percentage concentration of the first chemical cleaning agent cannot be too high, otherwise, the first chemical cleaning agent is difficult to remove subsequently, organic residue is easy to generate, and the process stability of the first rinsing treatment is easy to reduce. For this reason, in the present embodiment, the mass percentage concentration of the first chemical cleaning agent is 5% to 30%.
The treatment time of the first rinsing treatment should not be too short, nor too long. If the treatment time of the first rinsing treatment is too short, it is liable that the first rinsing treatment is less effective for removing a large amount of contaminant particles; if the processing time of the first rinsing treatment is too long, the waste of the process time is easily caused, and the production capacity is reduced. For this reason, in the present embodiment, the processing time of the first rinsing process is 5 seconds to 20 seconds.
In this embodiment, in the first rinsing step, various parameters are set reasonably and cooperate with each other, so that the manufacturing efficiency is improved and a better process effect is achieved.
With reference to fig. 3, in this embodiment, the step of the first sub-cleaning process further includes: after the first rinsing process is performed, step S112 is performed to perform a first brushing process using deionized water and the first chemical cleaning agent.
The first brushing process is used for further removing pollutant particles remained on the surface of the wafer.
Specifically, the first chemical cleaning agent is still used in the first brushing treatment, so that a larger repulsive force is still kept between the contaminant particles and the surface of the wafer, and the contaminant particles are easily brushed away from the surface of the wafer.
In this embodiment, the flow rate and the concentration of the first chemical cleaning agent in the first brushing treatment and the first rinsing treatment are the same, which is beneficial to maintaining the flow rate stability of the first chemical cleaning agent and reducing the complexity of the operation of the cleaning machine.
Specifically, in the first brushing treatment step, a soft brush (brush) is adopted to act on the surface of the wafer at a certain extrusion force and rotation speed to brush the surface of the wafer, so that the pollutant particles remained on the surface of the wafer are further removed through the physical action of the soft brush and the surface of the wafer and the hydraulic scouring action of deionized water.
With reference to fig. 3, in this embodiment, the step of the first sub-cleaning process further includes: after the first brushing treatment, step S113 is performed, and a second brushing treatment is performed using deionized water.
And in the step of the second brushing treatment, stopping the flushing of the first chemical cleaning agent, keeping the flushing of the deionized water, thereby removing the first chemical cleaning agent on the surface of the wafer, preventing the chemical components of the first chemical cleaning agent from remaining on the wafer and the brush to form organic residues, and simultaneously keeping the extrusion force and the rotating working state of the soft brush on the surface of the wafer, thereby brushing the remaining pollutant particles and the first chemical cleaning agent components from the surface of the wafer.
With reference to fig. 3, in this embodiment, the step of the first sub-cleaning process further includes: after the second brushing treatment, step S114 is performed, and a first washing treatment is performed with deionized water.
Specifically, the wafer surface is rinsed with deionized water.
In the second brushing process, contaminant particles may adhere to the soft brush, and therefore, in the first water washing process, the soft brush is stopped to prevent the contaminant particles adhering to the soft brush from adhering back to the wafer surface, and at the same time, the wafer surface is rinsed with deionized water to further rinse away the remaining contaminant particles and the remaining first chemical cleaning agent component.
With reference to fig. 2, in this embodiment, the step of the first cleaning process further includes: after the first sub-cleaning process is performed, step S12 is performed to perform a second sub-cleaning process on the wafer.
The second sub-cleaning process is used for further removing pollutant particles on the surface of the wafer after the first sub-cleaning process, so that the cleaning effect on the wafer is further improved.
Specifically, referring to fig. 4 in combination, fig. 4 is a flowchart corresponding to steps in the second sub-cleaning process in fig. 2, wherein the steps of the second sub-cleaning process include: step S121 is executed, and a second rinsing process is performed using deionized water and a second chemical cleaning agent. The second chemical cleaning agent and the first chemical cleaning agent have the same components, and the mass percentage concentration of the second chemical cleaning agent is smaller than that of the first chemical cleaning agent.
Carry out first washing through adopting the higher first chemical cleaning agent of mass percent concentration to handle, make first chemical cleaning agent can show the hydrophilicity that improves pollutant particle surface to and increase the electrical repulsion force on pollutant particle and wafer surface, and carry out the second through adopting the lower second chemical cleaning agent of mass percent concentration and wash the processing, so as to improve the problem that is difficult to get rid of because of the concentration of chemical cleaning agent is too high, thereby when satisfying the requirement of washing, improve the remaining problem of chemical composition of chemical cleaning agent, and then further improve the cleaning performance to the wafer.
In addition, a third brushing treatment is carried out, and the second rinsing treatment is also used as a pretreatment step to keep the hydrophilicity of the pollutant particles and the electrical repulsive force of the pollutant particles and the surface of the wafer so as to prepare for the third subsequent brushing treatment.
Therefore, the mass percentage concentration of the second chemical cleaning agent is not too low, and is not too high. If the mass percentage concentration of the second chemical cleaning agent is too low, in the step of the second flushing treatment, the change effect of the second chemical cleaning agent on the hydrophilicity and the electronegativity of the surfaces of the pollutant particles is not obvious, and the adhesive force of the pollutant particles on the surface of the wafer is difficult to reduce, so that the pollutant particles are difficult to remove under the scouring action of water power; if the mass percentage concentration of the second chemical cleaning agent is too high, even if the mass percentage concentration of the second chemical cleaning agent is less than the mass percentage concentration of the first chemical cleaning agent, the second chemical cleaning agent is difficult to completely remove, so that the problem of organic matter residue is easily generated. Therefore, in the present embodiment, the mass percentage concentration of the second chemical cleaning agent is 5% to 20% of the mass percentage concentration of the first chemical cleaning agent.
The treatment time of the second rinsing treatment should not be too short, nor too long. If the processing time of the second rinsing process is too short, the second rinsing process is difficult to increase the hydrophilicity of the surfaces of the pollutant particles and the electrical repulsive force between the pollutant particles and the surfaces of the wafers, so that the effect of removing the pollutant particles by the second rinsing process is poor, and the repulsive force between the pollutant particles and the surfaces of the wafers is insufficient when the third rinsing process is subsequently performed, so that the effect of the third rinsing process is poor; if the processing time of the second rinsing treatment is too long, the waste of the process time is easily caused, and the production capacity is reduced. For this reason, in the present embodiment, the processing time of the second rinsing process is 5 seconds to 20 seconds.
With reference to fig. 4, in this embodiment, the step of the second sub-cleaning process further includes: after the second rinsing process is performed, step S122 is performed, and a third rinsing process is performed by using deionized water and the second chemical cleaning agent.
And the third brushing treatment is used for further removing the residual pollutant particles on the surface of the wafer.
Specifically, the second chemical cleaning agent is still used in the third brushing treatment, so that the hydrophilicity of the pollutant particles is maintained, the larger repulsive force between the pollutant particles and the surface of the wafer is still maintained, and the pollutant particles are easily brushed away from the surface of the wafer.
In this embodiment, the flow and the concentration of the second chemical cleaning agent in the third brushing treatment and the second rinsing treatment are the same, which is beneficial to improving the flow stability of the second chemical cleaning agent and reducing the complexity of the machine operation.
Meanwhile, the soft brush is adopted to act on the surface of the wafer at a certain extrusion force and a certain rotation speed to scrub the surface of the wafer, so that pollutant particles remained on the surface of the wafer are further removed through the physical action of the soft brush and the surface of the wafer.
With reference to fig. 4, in this embodiment, the step of the second sub-cleaning process further includes: after the third brushing treatment, step S123 is performed, and a fourth brushing treatment is performed with deionized water.
In the fourth brushing treatment step, the second chemical cleaning agent is stopped being flushed, deionized water is adopted for flushing, so that the second chemical cleaning agent on the surface of the wafer is removed, the problem that components of the second chemical cleaning agent are remained on the wafer and the soft brush to form organic residues is solved, meanwhile, the extrusion force and the rotating working state of the soft brush on the surface of the wafer are kept, and the residual pollutant particles and the components of the second chemical cleaning agent are brushed off the surface of the wafer under the physical action of the soft brush and the surface of the wafer.
With reference to fig. 4, in this embodiment, the step of the second sub-cleaning process further includes: after the fourth brushing process, step S124 is performed, and a third washing process is performed with deionized water.
In the fourth brushing process step, pollutant particles may adhere to the soft brush, and therefore, in the third washing process step, the soft brush is stopped, so that the pollutant particles adhering to the soft brush are prevented from adhering to the surface of the wafer, and at the same time, the surface of the wafer is rinsed with deionized water, so that residual pollutant particles and residual chemical cleaning agent components are further removed under the rinsing action of the water flow.
With reference to fig. 1, after the first cleaning process is performed, step S3 is performed to dry the wafer.
The drying treatment is used for removing the moisture on the surface of the wafer to realize the drying of the surface of the wafer, thereby preparing for the subsequent process.
In this embodiment, the drying process includes: the wafer is dried using an IPA (iso-Propyl alcohol) solution and an inert gas.
The IPA solution can improve the hydrophobicity of the surface of the wafer, so that the water on the surface of the wafer is changed into a water film, and the water film can be blown away from the surface of the wafer through inert gas, so that the surface of the wafer is dried.
In this embodiment, the inert gas may be nitrogen. The nitrogen is inert gas commonly used in the semiconductor process, is easy to obtain, and is beneficial to saving the cost and improving the process compatibility.
In other embodiments, other suitable drying processes may be used to dry the surface of the wafer according to actual process requirements.
In this embodiment, with reference to fig. 1, after the first cleaning process is performed and before the drying process is performed, the method further includes: step S2 is executed to perform a second cleaning process on the wafer.
Referring to fig. 5 in combination, fig. 5 is a flowchart corresponding to steps of the second cleaning process in fig. 1, wherein the steps of the second cleaning process include: step 21 is executed, a third chemical cleaning agent is adopted to carry out pre-washing treatment on the surface of the wafer, the third chemical cleaning agent has the same components as the first chemical cleaning agent, and the mass percentage concentration of the third chemical cleaning agent is smaller than that of the first chemical cleaning agent; and after the pre-rinsing treatment, executing step S22, and performing a scraping treatment on the surface of the wafer by using the third chemical cleaning agent.
The pre-rinsing treatment is used for keeping the hydrophilicity and the surface electrical property of the pollutant particles, so that the pollutant particles are easy to remove under the action of hydraulic flushing, the electrical repulsive force between the pollutant particles and the surface of the wafer is increased, the residual pollutant particles after the second sub-cleaning process is prevented from being adhered to the surface of the wafer, and meanwhile, preparation is also made for the subsequent scraping treatment.
Moreover, the mass percentage concentration of the third chemical cleaning agent is less than that of the first chemical cleaning agent, so that the problem that the chemical cleaning agent is difficult to remove due to too high concentration of the chemical cleaning agent is solved, the problem of chemical component residue of the chemical cleaning agent is solved, and the cleaning effect on the wafer is further improved.
Specifically, the mass percentage concentration of the third chemical cleaning agent may be the same as the mass percentage concentration of the second chemical cleaning agent.
And the scraping treatment is used for further removing the residual tiny pollutant particles on the surface of the wafer after the second sub-cleaning process is executed.
The step of the scraping treatment comprises: scraping and washing the wafer edge from the center of the wafer at a preset moving speed by using a pencil sponge brush (pencil sponge), wherein the preset moving speed of the pencil sponge brush is gradually reduced along the direction of the center of the wafer pointing to the edge of the wafer.
Wherein, the pencil sponge brush is the sponge brush of pencil form, compares with aforementioned soft brush, the material of pencil sponge brush is softer in the step of scraping and washing processing, the pencil sponge brush is right the wafer surface has certain extrusion force, is favorable to getting rid of with the comparatively inseparable pollutant granule of wafer surface adsorption, and is less to the influence of wafer surface structure and figure simultaneously.
In the foregoing step and the step of the scraping and washing process, the wafer is always kept in a rotating state, so that the linear velocity at the center of the wafer is minimum, the pollutant particles at the center of the wafer are correspondingly difficult to be removed, and the linear velocity of the wafer gradually increases along the direction from the center of the wafer to the edge of the wafer, the adhesion force of the pollutant particles on the wafer is gradually reduced, that is, the difficulty of removing the pollutant particles is also gradually reduced, and the number of the pollutant particles is correspondingly reduced.
Therefore, in this embodiment, the preset moving speed of the pencil sponge brush is decreased gradually along the direction from the center of the wafer to the edge of the wafer, so that the pencil sponge brush can be matched with the linear speed of the wafer at different positions on the wafer to scrape and wash pollutant particles from the center of the wafer to the edge of the wafer, and finally the pollutant particles are removed under the washing action of the water flow and are thrown off the surface of the wafer under the rotation of the wafer.
In this embodiment, in the step of the scraping process, the pencil sponge brush has a preset rotation speed.
The rotating pencil sponge brush can bring the pollutant particles which are tightly adsorbed with the wafer away from the surface of the wafer, so that the residual pollutant particles are removed under the scouring action of water power; meanwhile, the pencil sponge brush is used for scraping and washing from the center of the wafer to the edge of the wafer, so that pollutant particles are taken away from the center of the wafer to the edge of the wafer and are removed under the action of hydraulic washing and the rotary swing of the wafer.
The rotating speed of the pencil sponge brush is not suitable to be too small or too large. If the rotating speed of the pencil sponge brush is too low, the pencil sponge brush is difficult to bring pollutant particles out of the surface of the wafer; if the rotating speed of the pencil sponge brush is too high, the wafer surface is easily scratched (scratch). For this reason, in the present embodiment, the rotating speed of the pencil sponge brush is 200RPM (Revolutions Per Minute) to 300 RPM.
It should be noted that, in order to keep the contaminant particles and the wafer surface having a large electrical repulsive force and make the contaminant particles easily washed away by the water flow, the third chemical cleaning agent is continuously washed during the step of the scraping process. And the components, the concentrations and the flow rates of the third chemical cleaning agent adopted in the scraping treatment and the pre-washing treatment are the same.
With reference to fig. 5, in this embodiment, the step of the second cleaning process further includes: after the scrub processing, step S23 is executed to perform a gas cleaning process on the wafer.
Through the gas cleaning treatment, the micro pollutant particles remained at the concave position of the surface of the wafer can be further removed.
The density and the quality of gas are all less, through adopting the mode that gaseous cleaning handled, can be with great speed to wafer surface jet gas to further get rid of the small pollutant particle that will remain and be difficult to get rid of in wafer surface depression, be favorable to improving cleaning performance, simultaneously, the damage to the structure on wafer surface and figure is less.
In this implementation, after the scraping and washing treatment, the gas cleaning treatment is performed, so that tiny pollutant particles are prevented from remaining in the concave part of the surface of the wafer after the scraping and washing treatment, and the cleaning effect on the wafer is further improved.
Specifically, the gas cleaning treatment is performed using a mixed gas of an inert gas and carbon dioxide.
The carbon dioxide is easy to generate bubbles, so that the carbon dioxide is easy to atomize and can be carried by inert gas to be sprayed to the surface of the wafer. Moreover, carbon dioxide gas is easy to obtain, which is beneficial to saving cost and improving compatibility.
In this embodiment, the inert gas is nitrogen. The nitrogen is inert gas commonly used in the semiconductor process, which is beneficial to saving the cost and improving the process compatibility.
The step of performing the gas cleaning process includes: the method comprises the steps of adopting a mixed gas of nitrogen and carbon dioxide in a certain proportion, carrying out atomization (mist) treatment, and then flushing the surface of a wafer at a high speed along the direction of the center of the wafer pointing to the edge of the wafer.
Therefore, the mixed gas used in the gas cleaning process further includes water vapor. The water vapor is beneficial to keeping the pollutant particles on the surface of the wafer in a wet state, so that the residual pollutant particles are easily removed under the action of hydraulic scouring in the subsequent steps.
The total flow rate of the gas used in the gas cleaning treatment should not be too small or too large. If the total flow rate is too small, the cleaning effect of the gas cleaning treatment is easily reduced; if the total flow is too high, damage may also be caused to the wafer surface. For this reason, in the present embodiment, the total flow rate of the gas used in the gas cleaning process is 200 standard liters per minute to 300 standard liters per minute.
In this embodiment, the case where the primary scrub processing and the gas purge processing are performed will be described as an example.
In other embodiments, the wafer cleaning effect can be improved by alternately performing the scraping and gas cleaning processes for a plurality of times according to the actual process requirements. It should be noted that, in this embodiment, the last step is a gas cleaning process, so as to prevent the minute contaminant particles remaining in the recesses on the wafer surface after the cleaning process from being completely removed.
With reference to fig. 5, in this embodiment, the step of the second cleaning process further includes: after the gas cleaning treatment, performing step S24, and performing a third rinsing treatment using deionized water and the third chemical cleaning agent; after the third rinsing process, step S25 is performed to perform a second rinsing process with deionized water.
Through the third washing treatment, the hydrophilicity of pollutant particles and the electric repulsive force with the surfaces of the pollutant particle wafers are kept, and residual tiny pollutant particles after being cleaned by the gas cleaning treatment are prevented from being adhered to the surfaces of the wafers.
In this embodiment, the third chemical cleaning agent used for the third rinsing and the third chemical cleaning agent used for the scraping treatment have the same mass percentage concentration and flow rate, which is beneficial to maintaining the flow rate stability of the third chemical cleaning agent and reducing the complexity of the machine operation.
For the detailed description of the third rinsing process, reference may be made to the foregoing description of the second rinsing process, and details are not repeated here.
The second water washing treatment is used for removing the third chemical cleaning agent in the third washing treatment step.
For the specific description of the second water washing treatment, reference may be made to the foregoing detailed description of the first water washing treatment, which is not repeated herein.
Correspondingly, the invention also provides a forming method of the semiconductor structure. Referring to fig. 6 to 7, schematic structural diagrams corresponding to steps in an embodiment of a method for forming a semiconductor structure of the present invention are shown.
Referring to fig. 6, a wafer (not labeled) is provided, where the wafer includes a substrate (not labeled), a metal gate structure 123 is formed on the substrate, an interlayer dielectric layer 122 is formed on the substrate where the metal gate structure 123 is exposed, the top of the interlayer dielectric layer 122 is higher than the top of the metal gate structure 123, a groove (not labeled) is formed by the top of the metal gate structure 123 and the interlayer dielectric layer 122, a hard mask material layer 124 is formed in the groove, and the hard mask material layer 124 further covers the top of the interlayer dielectric layer 122.
In the present embodiment, taking the formed semiconductor structure as a fin field effect transistor (FinFET) as an example, the base includes a substrate 100 and a fin 110 protruding from the substrate 100. In other embodiments, when the semiconductor structure formed is a planar field effect transistor, the base may comprise only the substrate.
The substrate 100 is used to provide a process platform for a process.
In this embodiment, the substrate 100 is a silicon substrate. In other embodiments, the material of the substrate may also be germanium, silicon carbide, gallium arsenide, indium gallium arsenide, or other materials.
In this embodiment, the fin 110 and the substrate 100 are made of the same material, and the fin 110 is made of silicon. In other embodiments, the material of the fin may also be germanium, silicon carbide, gallium arsenide, or indium gallium arsenide.
In this embodiment, an isolation layer 111 is formed on the substrate 100 where the fin portion 110 is exposed, and the isolation layer 111 covers a portion of the sidewall of the fin portion 110. The isolation layer 111 is used to electrically isolate adjacent devices.
In this embodiment, the isolation layer 111 is made of silicon oxide. In other embodiments, the material of the isolation structure may also be an insulating material such as silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride, or silicon oxycarbonitride.
The metal gate structure 123 is used to control the on/off of the conductive channel when the semiconductor structure is in operation. Specifically, the metal gate structure 123 spans across a portion of the top and a portion of the sidewalls of the fin 110.
The metal gate structure 123 includes a high-k dielectric layer (not shown), and a gate electrode layer (not shown) on the high-k dielectric layer.
The high-k gate dielectric layer is made of a high-k gate dielectric material, wherein the high-k gate dielectric material refers to a gate dielectric material with a relative dielectric constant larger than that of silicon oxide, and the high-k gate dielectric material can be HfO2、HfSiO、HfSiON、HfTaO、HfTiO、HfZrO、ZrO2Or Al2O3. In this embodiment, the material of the high-k gate dielectric layer is HfO2。
The gate electrode layer is made of Al, Cu, Ag, Au, Pt, Ni, Ti or W. In this embodiment, the material of the gate electrode layer is W.
In this embodiment, a sidewall 115 is further formed on the sidewall of the metal gate structure 123. The sidewall spacers 115 are used for protecting the sidewalls of the metal gate structures 123, and the sidewall spacers 115 are further used for defining the formation regions of the source-drain doping layers.
In this embodiment, the sidewall spacers 115 have a stacked structure, and the sidewall spacers 115 correspondingly include a first sidewall spacer (not shown) located on the sidewall of the metal gate structure 123, a second sidewall spacer (not shown) located on the sidewall of the first sidewall spacer, and a third sidewall spacer (not shown) located on the sidewall of the second sidewall spacer. In other embodiments, the sidewall spacer may also have a single-layer structure.
In this embodiment, the first side wall and the third side wall are made of silicon oxide, and the second side wall is made of silicon nitride.
In this embodiment, the metal gate structure 123 is formed by a process of forming a high-k gate dielectric layer and then forming a metal gate (high-k metal gate) and before forming the metal gate structure 123, the adopted dummy gate structure is a stacked structure, so that a dummy gate oxide layer 112 is further formed between the sidewall 115 and the fin portion 110. In the process of removing the dummy gate structure to form the metal gate structure 123, the dummy gate oxide layer 112 between the sidewall 115 and the fin 110 is retained under the protection of the sidewall 115.
In this embodiment, the material of the dummy gate oxide layer 112 is silicon oxide. In other embodiments, the material of the dummy gate oxide layer may also be silicon oxynitride.
In this embodiment, a source-drain doping layer 120 is further formed in the fin portion 110 on two sides of the metal gate structure 123.
When an NMOS transistor is formed, the source-drain doped layer 120 comprises a stress layer doped with N-type ions, the material of the stress layer is Si or SiC, the stress layer provides a tensile stress effect for a channel region of the NMOS transistor, and therefore carrier mobility of the NMOS transistor is improved, wherein the N-type ions are P ions, As ions or Sb ions; when a PMOS transistor is formed, the source-drain doped layer 120 includes a stress layer doped with P-type ions, the stress layer is made of Si or SiGe, and the stress layer provides a compressive stress effect for a channel region of the PMOS transistor, so as to improve carrier mobility of the PMOS transistor, wherein the P-type ions are B ions, Ga ions, or In ions.
The interlayer dielectric layer 122 is used for isolating adjacent devices, and the interlayer dielectric layer 122 is also used for providing a process platform for forming the metal gate structure 123.
Therefore, the material of the interlayer dielectric layer 122 is an insulating material, such as one or more of silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride and silicon oxycarbonitride. In this embodiment, the interlayer dielectric layer 122 has a single-layer structure, and the interlayer dielectric layer 122 is made of silicon oxide.
The hard mask material layer 124 is used for forming a hard mask layer in a subsequent manner, so that self-alignment of an etching process for forming source and drain contact holes in a subsequent manner is realized.
In this embodiment, the hard mask material layer 124 is made of silicon nitride.
Referring to fig. 7, the hard mask material layer 124 is polished, and the remaining hard mask material layer 124 after the polishing process is used as a hard mask layer 125.
The hard mask layer 125 is used to protect the top of the metal gate structure 124, and in the subsequent etching process for forming the source/drain contact hole, the hard mask layer 125 is also used to achieve self-alignment of the etching process, thereby preventing bridging (bridge) between the subsequent contact hole plug and the metal gate structure 124.
Specifically, the polishing treatment is performed by a chemical mechanical polishing process.
In this embodiment, the hard mask material layer 124 is made of silicon nitride, and during the polishing process of the hard mask material layer 124, the surface of the hard mask material layer 124 is positively charged in the environment of the polishing slurry, so that the negatively charged contaminant particles are easily adsorbed.
Therefore, in this embodiment, after the polishing process is performed, the wafer is cleaned by the cleaning method in the foregoing embodiment.
According to the embodiment, the cleaning method has a good cleaning effect, and can effectively reduce the residual quantity of pollutant particles on the wafer, so that the cleaning effect meets the process requirement.
In the subsequent process, other functional layers covering the hard mask layer 125 are formed, so that the probability of generating defects such as bump (bump) is low by reducing the residual quantity of pollutant particles on the wafer, and the performance and yield of the semiconductor structure are improved.
The semiconductor structure may be formed by the formation method described in the foregoing embodiment, or may be formed by another formation method. For a detailed description of the semiconductor structure in this embodiment, reference may be made to the corresponding description in the foregoing embodiments, and details of this embodiment are not repeated herein.
Although the present invention is disclosed above, the present invention is not limited thereto. Various changes and modifications may be effected therein by one skilled in the art without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (20)
1. A cleaning method after grinding is suitable for cleaning a wafer after grinding treatment to remove pollutant particles on the surface of the wafer, and is characterized by comprising the following steps:
executing a first cleaning process on the wafer, wherein the first cleaning process comprises a first sub-cleaning process, and the first sub-cleaning process comprises the following steps: carrying out first washing treatment by adopting megasonic deionized water and a first chemical cleaning agent; the first chemical cleaning agent is suitable for increasing the hydrophilicity of pollutant particles and the electrical repulsive force between the pollutant particles and the surface of the wafer;
and after the first cleaning process is executed, drying the wafer.
2. The post-polish cleaning method of claim 1, wherein the first cleaning process further comprises a second sub-cleaning process after the first sub-cleaning process, the second sub-cleaning process comprising: carrying out second flushing treatment by using deionized water and a second chemical cleaning agent;
The second chemical cleaning agent and the first chemical cleaning agent have the same components, and the mass percentage concentration of the second chemical cleaning agent is smaller than that of the first chemical cleaning agent.
3. The post-polishing cleaning method according to claim 1, wherein the first chemical cleaning agent is at least 5% by weight.
4. The post-polishing cleaning method according to claim 1, wherein the first chemical cleaning agent is present in a concentration of 5 to 30% by mass.
5. The post-polish cleaning method according to claim 2, wherein the concentration of the second chemical cleaner is 5 to 20% by mass of the concentration of the first chemical cleaner.
6. The post-polish cleaning method according to claim 1, wherein in the step of the first sub-cleaning process, the treatment time of the first rinsing treatment is 5 seconds to 20 seconds.
7. The post-polish cleaning method according to claim 2, wherein in the step of the second sub-cleaning process, the treatment time of the second rinsing treatment is 5 seconds to 20 seconds.
8. The post-polish cleaning method of claim 1, wherein in the first sub-cleaning step, the megasonic deionized water has a megasonic power of at least 40 w.
9. The post-polish cleaning method of claim 1, wherein in the first sub-cleaning step, the megasonic deionized water has a megasonic power of 40 w to 200 w.
10. The post-polish cleaning method of claim 1, wherein the first sub-cleaning process further comprises: and after the first washing treatment, carrying out first brushing treatment by adopting deionized water and the first chemical cleaning agent.
11. The post-polish cleaning method of claim 10, wherein the first sub-cleaning process further comprises: and after the first brushing treatment, adopting deionized water to carry out second brushing treatment.
12. The post-polish cleaning method of claim 11, wherein the first sub-cleaning process further comprises: and after the second brushing treatment, carrying out first washing treatment by using deionized water.
13. The post-polish cleaning method of claim 2, wherein the second sub-cleaning process further comprises: and after the second flushing treatment, carrying out third flushing treatment by adopting deionized water and the second chemical cleaning agent.
14. The method of claim 1, wherein after performing the first cleaning process and before performing the drying process, further comprising: performing a second cleaning process on the wafer, the second cleaning process comprising: carrying out pre-washing treatment on the surface of the wafer by using a third chemical cleaning agent, wherein the third chemical cleaning agent has the same components as the first chemical cleaning agent, and the mass percentage concentration of the third chemical cleaning agent is less than that of the first chemical cleaning agent;
and after the pre-washing treatment, adopting the third chemical cleaning agent to scrape and wash the surface of the wafer.
15. The post-mill cleaning method according to claim 14, wherein the step of scraping treatment comprises: and scraping and washing the wafer edge from the center of the wafer at a preset moving speed by using a pencil sponge brush, wherein the preset moving speed of the pencil sponge brush is gradually reduced along the direction in which the center of the wafer points to the edge of the wafer.
16. The post-grind cleaning method according to claim 15, wherein the pencil sponge brush has a preset rotation speed in the step of the scraping process, and the preset rotation speed of the pencil sponge brush is 200RPM to 300 RPM.
17. The post-polish cleaning method of claim 14, wherein the second cleaning process further comprises: and after the scraping and washing treatment, carrying out gas cleaning treatment on the wafer.
18. The post-mill cleaning method according to claim 17, wherein the total flow rate of the gas used in the gas cleaning process is 200 standard liters per minute to 300 standard liters per minute.
19. A method of forming a semiconductor structure, comprising:
providing a wafer, wherein the wafer comprises a substrate, a metal gate structure is formed on the substrate, an interlayer dielectric layer is formed on the substrate exposed out of the metal gate structure, the top of the interlayer dielectric layer is higher than the top of the metal gate structure, the top of the metal gate structure and the interlayer dielectric layer enclose a groove, a hard mask material layer is formed in the groove, and the hard mask material layer also covers the top of the interlayer dielectric layer;
grinding the hard mask material layer, wherein the residual hard mask material layer after grinding is used as a hard mask layer;
after the grinding process, cleaning the wafer using the cleaning method as claimed in claims 1 to 18.
20. The method of claim 19, wherein the hard mask layer is formed of silicon nitride.
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| CN114405908B (en) * | 2021-12-31 | 2023-07-25 | 至微半导体(上海)有限公司 | Cleaning method suitable for wafer chemicals after etching |
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