CN111857311A - Dual-system device - Google Patents

Dual-system device Download PDF

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Publication number
CN111857311A
CN111857311A CN202010878542.4A CN202010878542A CN111857311A CN 111857311 A CN111857311 A CN 111857311A CN 202010878542 A CN202010878542 A CN 202010878542A CN 111857311 A CN111857311 A CN 111857311A
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China
Prior art keywords
processor
module
resistor
power
controllable switch
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CN202010878542.4A
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Chinese (zh)
Inventor
李政军
陈娅芳
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Hunan New Cloudnet Technology Co ltd
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Hunan New Cloudnet Technology Co ltd
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Priority to CN202010878542.4A priority Critical patent/CN111857311A/en
Publication of CN111857311A publication Critical patent/CN111857311A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/266Arrangements to supply power to external peripherals either directly from the computer or under computer control, e.g. supply of power through the communication port, computer controlled power-strips
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24Resetting means
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/65Updates

Abstract

The invention discloses a dual-system device which comprises a first power supply module, a second power supply module, a first processor and a second processor. The first power module supplies power to the first processor, the second power module supplies power to the second processor, the first processor and the second processor have different functions, the first processor executes operation corresponding to the second instruction when receiving the second instruction sent by the second processor, and the second processor executes operation corresponding to the first instruction when receiving the first instruction sent by the first processor. On one hand, the dual-system device provided by the application can complete different functions corresponding to the two processors respectively, and data interaction can be performed between the first processor and the second processor, so that the application range is enlarged, and the functions which can be realized are increased; on the other hand, the two processors are powered by two different power supply modules, when one power supply module is out of power, the other power supply module and the corresponding processor can continue to work, and the use by a user is facilitated.

Description

Dual-system device
Technical Field
The invention relates to the field of double systems, in particular to a double-system device.
Background
The common intelligent terminal only has one processor, the intelligent terminal only has one processor with relatively less functions and relatively less application field, and when the power supply of the processor is dead, the intelligent terminal where the processor is located can not work, so that the use of a user is influenced.
Disclosure of Invention
The invention aims to provide a dual-system device, which can complete different functions corresponding to two processors respectively, and the first processor and the second processor can carry out data interaction, thereby enlarging the application range and increasing the functions which can be realized; on the other hand, the two processors are powered by two different power supply modules, when one power supply module is out of power, the other power supply module and the corresponding processor can continue to work, and the use by a user is facilitated.
To solve the above technical problem, the present invention provides a dual system apparatus, comprising:
the first power supply module is connected with the first processor and used for supplying power to the first processor;
the second power supply module is connected with the second processor and used for supplying power to the second processor;
the first processor which is connected with the second processor and is different from the second processor is used for receiving a second instruction, executing the operation corresponding to the second instruction and sending a first instruction to the second processor;
the second processor is used for receiving the first instruction, executing the operation corresponding to the first instruction and sending the second instruction to the first processor.
Preferably, the power supply voltage of the first power supply module is different from the power supply voltage of the second power supply module, and further includes:
the first isolation module is used for isolating the power supply, and one end of the first isolation module is connected with the receiving end of the first processor, and the other end of the first isolation module is connected with the sending end of the second processor;
and the second isolation module is used for isolating the power supply, and one end of the second isolation module is connected with the sending end of the first processor, and the other end of the second isolation module is connected with the receiving end of the second processor.
Preferably, the power supply voltage of the first power supply module is smaller than the power supply voltage of the second power supply module, and the first isolation module includes a diode, a first resistor and a second resistor;
the anode of the diode is connected with the first end of the first resistor and the receiving end of the first processor respectively, the second end of the first resistor is connected with the output end of the first power module, the cathode of the diode is connected with the first end of the second resistor and the sending end of the second processor respectively, and the second end of the second resistor is connected with the output end of the second power module.
Preferably, the second isolation module includes a first controllable switch, a third resistor, a fourth resistor, and a fifth resistor;
a first end of the first controllable switch is connected to a first end of the third resistor and a sending end of the first processor, a control end of the first controllable switch is connected to a second end of the third resistor and a first end of the fourth resistor, a second end of the fourth resistor is connected to an output end of the first power module, a second end of the first controllable switch is connected to a first end of the fifth resistor and a receiving end of the second processor, and a second end of the fifth resistor is connected to an output end of the second power module;
when the transmitting end of the first processor outputs a high level, the first controllable switch is turned off, and when the transmitting end of the first processor outputs a low level, the first controllable switch is turned on.
Preferably, the reset control terminal of the first processor is connected with the reset terminal of the second processor;
the first processor is specifically configured to, when receiving an upgrade instruction sent by the second processor, download an upgrade package of the second processor from a cloud of the first processor, and send a reset instruction and the upgrade package of the second processor to the second processor;
the second processor is specifically configured to, after receiving the reset instruction, perform upgrading based on the received upgrade package.
Preferably, the power supply voltage of the first power supply module is different from the power supply voltage of the second power supply module, and further includes:
and the third isolation module is used for isolating the power supply, and one end of the third isolation module is connected with the reset control end of the first processor, and the other end of the third isolation module is connected with the reset end of the second processor.
Preferably, the third isolation module includes a second controllable switch, a sixth resistor, a seventh resistor, and an eighth resistor;
a first end of the second controllable switch is connected to a first end of the sixth resistor and a reset control end of the first processor, a control end of the second controllable switch is connected to a second end of the sixth resistor and a first end of the seventh resistor, a second end of the seventh resistor is connected to an output end of the first power module, a second end of the second controllable switch is connected to a first end of the eighth resistor and a reset end of the second processor, and a second end of the eighth resistor is connected to an output end of the second power module;
when the reset control end of the first processor outputs a high level, the second controllable switch is turned off, and when the reset control end of the first processor outputs a low level, the second controllable switch is turned on.
Preferably, the method further comprises the following steps:
the first wireless module is respectively connected with the first processor and the output end of the first power supply module and is used for the communication between the first processor and an external network through the first wireless module;
and the second wireless module is respectively connected with the second processor and the output end of the second power supply module and is used for the second processor to communicate with an external network through the second wireless module.
Preferably, the method further comprises the following steps:
the first display device is respectively connected with the first processor and the output end of the first power supply module and is used for displaying the content to be displayed, which is sent by the first processor;
and the second display device is respectively connected with the second processor and the output end of the second power supply module and is used for displaying the content to be displayed, which is sent by the second processor.
Preferably, the first display device is a touch display device, the second display device is a non-touch display device, and the touch display device further comprises a key input module connected with the second processor.
The application provides a dual-system device, which comprises a first power supply module, a second power supply module, a first processor and a second processor. The first power module supplies power to the first processor, the second power module supplies power to the second processor, the first processor and the second processor have different functions, the first processor executes operation corresponding to the second instruction when receiving the second instruction sent by the second processor, and the second processor executes operation corresponding to the first instruction when receiving the first instruction sent by the first processor. On one hand, the dual-system device provided by the application can complete different functions corresponding to the two processors respectively, and data interaction can be performed between the first processor and the second processor, so that the application range is enlarged, and the functions which can be realized are increased; on the other hand, the two processors are powered by two different power supply modules, when one power supply module is out of power, the other power supply module and the corresponding processor can continue to work, and the use by a user is facilitated.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic structural diagram of a dual system apparatus according to the present invention;
FIG. 2 is a schematic structural diagram of another dual-system apparatus provided in the present invention;
FIG. 3 is a schematic circuit diagram of an isolation module according to the present invention;
fig. 4 is a circuit diagram of another isolation module provided in the present invention.
Detailed Description
The core of the invention is to provide a dual-system device, on one hand, different functions corresponding to two processors can be completed, and data interaction can be carried out between a first processor and a second processor, so that the use range is enlarged, and the functions which can be realized are increased; on the other hand, the two processors are powered by two different power supply modules, when one power supply module is out of power, the other power supply module and the corresponding processor can continue to work, and the use by a user is facilitated.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a dual-system device provided in the present invention, including:
the first power supply module 1 is connected with the first processor 3 and used for supplying power to the first processor 3;
the second power supply module 2 is connected with the second processor 4 and is used for supplying power to the second processor 4;
the first processor 3, which is connected with the second processor 4 and is different from the second processor 4, is used for receiving a second instruction, executing an operation corresponding to the second instruction and sending a first instruction to the second processor 4;
the second processor 4 is configured to receive the first instruction, execute an operation corresponding to the first instruction, and send the second instruction to the first processor 3.
Considering that when only one processor is provided, the intelligent terminal where the processor is located has fewer functions, and when the power supply module of the processor is out of power, the intelligent terminal cannot work, the use of the user is affected,
in order to solve the above problems, the present application provides two power modules and two processors, where the first power module 1 supplies power to the first processor 3, the second power module 2 supplies power to the second processor 4, and the first processor 3 and the second processor 4 may perform data interaction, that is, the first processor 3 may send a first instruction to the second processor 4, the second processor 4 executes an operation corresponding to the first instruction, the second processor 4 may send a second instruction to the first processor 3, and the first processor 3 executes an operation corresponding to the second instruction. In addition, the first processor 3 and the second processor 4 have different functions, so that the use range is enlarged, the functions which can be realized are increased, and the first processor and the second processor are respectively supplied with power by different power supply modules, so that the cruising ability of the dual-system device is improved.
Specifically, assuming that the first processor 3 can implement the first type of function, the second processor 4 can implement the second type of function, the first processor 3 is powered by the first power module 1, and the second processor 4 is powered by the second power module 2, when both the first power module 1 and the second power module 2 are powered, the apparatus can implement the first type of function and the second type of function. If the energy consumption of the function that can be realized by the first processor 3 is large and the energy consumption of the function that can be realized by the second processor 4 is small, when the first power module 1 is not powered (i.e., the first processor 3 does not work) and the second power module 2 is powered, the first type of function cannot be realized, but the second processor 4 can still realize the second type of function. In practice, some basic functions may be provided in the second processor 4, so that when the first power supply module 1 is dead, a user can use the device to implement some basic functions.
The intelligent terminal with dual systems includes: smart watches, smart school badges, watch cards, electronic student certificates, etc., hereinafter, description will be given taking a smart school badge with a dual system as an example. The first processor 3 is assumed to be a processor based on an android operating system and has the functions of video call, voice call, online watching and learning video, electronic map and the like; the second processor 4 is assumed to be a single-chip processor and has the functions of card-swiping consumption, sign-in, online answering and the like. When the first power supply module 1 and the second power supply module 2 are powered on, the intelligent school sign can complete all functions of a processor based on an android operating system and a single chip processor; however, because the processor based on the android operating system has relatively large energy consumption, when the processor based on the android operating system does not work (namely, the first power module 1 is out of power), the single chip processor can still execute the corresponding function of the single chip processor, so that a series of basic functions of card swiping consumption, class attendance or online answering and the like of students in schools can be realized, and the teaching arrangement is prevented from being influenced.
In summary, the dual-system apparatus provided in the present application, on one hand, can complete different functions corresponding to the two processors, and the first processor 3 and the second processor 4 can perform data interaction, thereby increasing the application range and increasing the functions that can be realized; on the other hand, the two processors are powered by two different power supply modules, when one power supply module is out of power, the other power supply module and the corresponding processor can continue to work, and the use by a user is facilitated.
On the basis of the above-described embodiment:
referring to fig. 2, fig. 2 is a schematic structural diagram of another dual-system apparatus provided in the present invention.
As a preferred embodiment, the first power module 1 has a supply voltage different from that of the second power module 2, and further includes:
the first isolation module 5 is connected with the receiving end of the first processor 3 at one end and connected with the sending end of the second processor 4 at the other end, and is used for power isolation;
and the second isolation module 6 is connected with one end of the first processor 3 and the other end of the second processor 4, and is used for power isolation.
Considering that data interaction needs to be performed between the first processor 3 and the second processor 4, that is, the first processor 3 and the second processor 4 need to be connected, if the supply voltage of the first power module 1 is the same as the supply voltage of the second power module 2, the first processor 3 and the second processor 4 may be directly connected by a wire without isolation; however, when the supply voltage of the first power module 1 is different from the supply voltage of the second power module 2, there may be a situation where the current flows backward, which may damage the processor connected to the power module having a smaller supply voltage.
In order to solve the above problem, in the present application, when the supply voltage of the first power module 1 is different from the supply voltage of the second power module 2, the first isolation module 5 is provided between the receiving end of the first processor 3 and the transmitting end of the second processor 4, and the second isolation module 6 is provided between the transmitting end of the first processor 3 and the receiving end of the second processor 4, so as to isolate the power supply and prevent the device from being damaged.
Referring to fig. 3, fig. 3 is a circuit schematic diagram of an isolation module according to the present invention.
As a preferred embodiment, the supply voltage of the first power module 1 is less than the supply voltage of the second power module 2, and the first isolation module 5 includes a diode D, a first resistor R1, and a second resistor R2;
an anode of the diode D is connected to the first end of the first resistor R1 and the receiving end of the first processor 3, a second end of the first resistor R1 is connected to the output end of the first power module 1, a cathode of the diode D is connected to the first end of the second resistor R2 and the transmitting end of the second processor 4, and a second end of the second resistor R2 is connected to the output end of the second power module 2.
In this embodiment, when the supply voltage of the first power module 1 is less than the supply voltage of the second power module 2, the first isolation module 5 may include a diode D, a first resistor R1, and a second resistor R2.
Specifically, it is assumed that the supply voltage of the first power supply module 1 is 1.8V. The power supply voltage of the second power module 2 is 3.3V, when the sending end of the second processor 4 outputs a low level, since the anode of the diode D is connected to the output end (i.e. 1.8V) of the first power module 1 through the first resistor R1, that is, the anode voltage of the diode D is greater than the cathode voltage of the diode D, the diode D is turned on, and the level of the receiving end of the first processor 3 is pulled low; when the transmitting end of the second processor 4 outputs a high level, since the anode of the diode D is connected to the output end (i.e., 1.8V) of the first power module 1 through the first resistor R1, and the cathode of the diode D is connected to the output end (i.e., 3.3V) of the second power module 2 through the second resistor R2, that is, the cathode voltage of the diode D is greater than the anode voltage of the diode D, the diode D is turned off, and the current cannot flow back to the first processor 3, thereby effectively preventing the first processor 3 from being damaged.
Of course, the first isolation module 5 in the present application may also be other devices having an isolation function, such as a triode, a PMOS (P-Channel Metal Oxide Semiconductor field effect transistor), a first optical coupler E1, or a first isolation transformer, which is not limited herein.
If the first isolation module 5 is the first optocoupler E1, please refer to fig. 4, and fig. 4 is a circuit schematic diagram of another isolation module provided in the present application. The collector of the first optical coupler E1 is connected with the output end (also 1.8V) of the first power module 1, the emitter of the first optical coupler E1 is connected with the receiving end of the first processor 3, the anode of the first optical coupler E1 is connected with the output end (also 3.3V) of the second power module 2, and the cathode of the first optical coupler E1 is connected with the transmitting end of the second processor 4. Specifically, when the transmitting end of the second processor 4 outputs a low level, the first optical coupler E1 is turned on, and the receiving end of the first processor 3 is pulled low to a low level; when the output of the transmitting end of the second processor 4 is a high level, the first optical coupler E1 is cut off, the receiving end of the first processor 3 is clamped to a high level, and the power supply voltage of the first power module 1 is lower than the power supply voltage of the second power module 2, but because the first optical coupler E1 is turned off, the current cannot flow backward to the first processor 3, so that the first processor 3 is prevented from being damaged.
As a preferred embodiment, the second isolation module 6 includes a first controllable switch, a third resistor R3, a fourth resistor R4, and a fifth resistor R5;
a first end of the first controllable switch is connected to a first end of the third resistor R3 and a transmitting end of the first processor 3, a control end of the first controllable switch is connected to a second end of the third resistor R3 and a first end of the fourth resistor R4, a second end of the fourth resistor R4 is connected to an output end of the first power module 1, a second end of the first controllable switch is connected to a first end of the fifth resistor R5 and a receiving end of the second processor 4, and a second end of the fifth resistor R5 is connected to an output end of the second power module 2;
when the transmitting end of the first processor 3 outputs a high level, the first controllable switch is turned off, and when the transmitting end of the first processor 3 outputs a low level, the first controllable switch is turned on.
In this embodiment, the second isolation module 6 may include a first controllable switch, a third resistor R3, a fourth resistor R4, and a fifth resistor R5, wherein the supply voltage of the first power module 1 is less than the supply voltage of the second power module 2.
Specifically, it is assumed that the supply voltage of the first power supply module 1 is 1.8V. The power supply voltage of the second power module 2 is 3.3V, when the sending end of the first processor 3 outputs a low level, the first controllable switch is turned on, that is, the first end and the second end of the first controllable switch are turned on, and the level of the receiving end of the second processor 4 is pulled down to a low level; when the transmitting end of the first processor 3 outputs a high level, the first controllable switch is turned off, that is, the first end and the second end of the first controllable switch are turned off, the receiving end of the second processor 4 is connected to the output end (that is, 3.3V) of the second power module 2 through the fifth resistor R5, the receiving end of the second processor 4 is clamped to the high level, and the high level of the receiving end of the second processor 4 is higher than that of the receiving end of the first processor 3, but because the first controllable switch is turned off, the current cannot flow back to the first processor 3, and the first processor 3 is effectively prevented from being damaged. The third resistor R3 is connected to the control terminal and the first terminal of the first controllable switch, and is used to increase the driving capability of the first controllable switch.
The first controllable switch may be a first NPN (Negative-Positive-Negative) transistor Q1, specifically, a base of the first NPN transistor Q1 serves as a control end of the first controllable switch, an emitter of the first NPN transistor Q1 serves as a first end of the first controllable switch, and a collector of the first NPN transistor Q1 serves as a second end of the first controllable switch. In addition, the first controllable switch may also be a PMOS or other controllable switch, which is not described herein again.
Of course, the second isolation module 6 in this application may also be other devices having an isolation function, such as the second optical coupler E2 or a second isolation transformer, and this application is not limited herein.
If the second isolation module 6 is the second optical coupler E2, the anode of the second optical coupler E2 is connected to the output end (also 1.8V) of the first power module 1, the cathode of the second optical coupler E2 is connected to the transmitting end of the first processor 3, the collector of the second optical coupler E2 is connected to the output end (also 3.3V) of the second power module 2, and the emitter of the second optical coupler E2 is connected to the receiving end of the second processor 4. Specifically, when the transmitting end of the first processor 3 outputs a low level, the second optical coupler E2 is turned on, and the receiving end of the second processor 4 is pulled low to a low level; when the transmitting end of first treater 3 outputs high level, second opto-coupler E2 cuts off, and the receiving terminal of second treater 4 is clamped to the high level, and the high level of the receiving terminal of second treater 4 is higher than the high level of first treater 3 transmitting end, nevertheless because second opto-coupler E2 cuts off to the electric current can not flow backward to first treater 3, and effectual first treater 3 that prevents is damaged.
As a preferred embodiment, the reset control terminal of the first processor 3 is connected with the reset terminal of the second processor 4;
the first processor 3 is specifically configured to, when receiving an upgrade instruction sent by the second processor 4, download an upgrade package of the second processor 4 from a cloud of the first processor 3, and send the reset instruction and the upgrade package of the second processor 4 to the second processor 4;
the second processor 4 is specifically configured to perform upgrading based on the received upgrade package after receiving the reset instruction.
In consideration of the fact that in practical application, the second processor 4 may not have a cloud end and cannot be upgraded, the second processor 4 needs to be upgraded by an external burning device, and the upgrading of the second processor 4 by the external burning device is complicated, and a data line is needed to be used, which wastes manpower and material resources.
For solving above problem, this application downloads the upgrading package of second treater 4 through the high in the clouds of first treater 3, sends the upgrading package to second treater 4, and second treater 4 is based on this upgrading package and upgrades self, the material resources of using manpower sparingly. .
Specifically, when the second processor 4 needs to be upgraded, an upgrade instruction is sent to the first processor 3, the first processor 3 downloads an upgrade package of the second processor 4 from the cloud of the first processor 3 based on the upgrade instruction, and sends a reset instruction to the second processor 4, the second processor 4 resets itself based on the reset instruction to prepare for upgrading, the first upgrade package sends the downloaded upgrade package to the second processor 4, and the second processor 4 upgrades based on the upgrade package.
Therefore, the second processor 4 is upgraded more conveniently and quickly in the application, and an external burning device is not needed.
As a preferred embodiment, the first power module 1 has a supply voltage different from that of the second power module 2, and further includes:
and the third isolation module 7 is connected with the reset control end of the first processor 3 at one end and the reset end of the second processor 4 at the other end, and is used for power isolation.
In consideration of the fact that in practical application, the power supply voltage of the first power module 1 is the same as the power supply voltage of the second power module 2, the reset control terminal of the first processor 3 and the reset terminal of the second processor 4 may be directly connected by a wire, but when the power supply voltage of the first power module 1 is different from the power supply voltage of the second power module 2, if the reset control terminal of the first processor 3 and the control terminal of the second processor 4 are directly connected by a wire, the current may flow backwards, and the processor connected to the power module with the lower power supply voltage may be damaged.
In order to solve the above problem, the third isolation module 7 is arranged between the reset control end of the first processor 3 and the reset end of the second processor 4, so that power isolation is performed, and the processor connected with the power module with smaller power supply voltage is prevented from being damaged.
As a preferred embodiment, the third isolation module 7 includes a second controllable switch, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8;
a first end of the second controllable switch is connected to a first end of the sixth resistor R6 and the reset control end of the first processor 3, a control end of the second controllable switch is connected to a second end of the sixth resistor R6 and a first end of the seventh resistor R7, a second end of the seventh resistor R7 is connected to the output end of the first power module 1, a second end of the second controllable switch is connected to a first end of the eighth resistor R8 and the reset end of the second processor 4, and a second end of the eighth resistor R8 is connected to the output end of the second power module 2;
when the reset control terminal of the first processor 3 outputs a high level, the second controllable switch is turned off, and when the reset control terminal of the first processor 3 outputs a low level, the second controllable switch is turned on.
In this embodiment, the third isolation module 7 may include a second controllable switch, a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8. The power supply voltage of the first power module 1 is less than the power supply voltage of the second power module 2.
Specifically, it is assumed that the supply voltage of the first power supply module 1 is 1.8V. The power supply voltage of the second power module 2 is 3.3V, when the reset control end of the first processor 3 outputs a low level, the second controllable switch is turned on, that is, the first end and the second end of the second controllable switch are turned on, the level of the reset end of the second processor 4 is pulled down to a low level, and at this time, the second processor 4 is reset to prepare for upgrading; when the reset control terminal of the first processor 3 outputs a high level, the second controllable switch is turned off, that is, the first terminal and the second terminal of the second controllable switch are turned off, the reset terminal of the second processor 4 is connected to the output terminal (that is, 3.3V) of the second power module 2 through the eighth resistor R8, the reset terminal of the second processor 4 is clamped to a high level, and the high level of the reset terminal of the second processor 4 is higher than that of the reset control terminal of the first processor 3, but since the second controllable switch is turned off, the current cannot flow back to the first processor 3, thereby effectively preventing the first processor 3 from being damaged. The sixth resistor R6 is connected to the control terminal and the first terminal of the second controllable switch, and is used to increase the driving capability of the second controllable switch.
The second controllable switch may be a second NPN transistor Q2, and specifically, a base of the second NPN transistor Q2 serves as a control terminal of the second controllable switch, an emitter of the second NPN transistor Q2 serves as a first terminal of the second controllable switch, and a collector of the second NPN transistor Q2 serves as a second terminal of the second controllable switch. In addition, the second controllable switch may also be a PMOS or other controllable switch, which is not described herein again.
In addition, the third isolation module 7 in the present application may also be other devices having an isolation function, such as a third optocoupler E3 or a third isolation transformer, and the present application is not limited specifically herein.
If the third isolation module 7 is a third optical coupler E3, an anode of the third optical coupler E3 is connected to an output end (also referred to as 1.8V) of the first power module 1, a cathode of the third optical coupler E3 is connected to a reset control end of the first processor 3, a collector of the third optical coupler E3 is connected to an output end (also referred to as 3.3V) of the second power module 2, and an emitter of the third optical coupler E3 is connected to a reset end of the second processor 4. Specifically, when the reset control end of the first processor 3 outputs a low level, the third optocoupler E3 is turned on, the level of the reset end of the second processor 4 is pulled down to a low level, and at this time, the second processor 4 is reset to prepare for upgrading; when the reset control end of the first processor 3 outputs a high level, the third optical coupler E3 is cut off, the reset end of the second processor 4 is clamped to be a high level, and the high level of the reset end of the second processor 4 is higher than that of the reset control end of the first processor 3, but because the third optical coupler E3 is turned off, the current cannot flow backward to the first processor 3, so that the first processor 3 is effectively prevented from being damaged.
As a preferred embodiment, the method further comprises the following steps:
the first wireless module 8 is respectively connected with the first processor 3 and the output end of the first power supply module 1 and is used for the first processor 3 to communicate with an external network through the first wireless module;
and the second wireless module 9 is respectively connected with the second processor 4 and the output end of the second power supply module 2 and is used for the second processor 4 to communicate with an external network through the second wireless module.
Considering that the processor in the present application can communicate with an external network, the functions of the device can be more complete, and the user can use the device more conveniently. The first wireless module 8 is arranged and connected with the first processor 3, and the first processor 3 can communicate with an external network through the first wireless module 8; a second wireless module 9 is provided and connected to the second processor 4, and the second processor 4 can communicate with an external network through the second wireless module 9.
Specifically, for example, the intelligent school badge with dual systems is connected to a network (e.g., a campus network) through the first wireless module 8, so that functions such as browsing network information, watching learning videos online, performing voice calls, performing video calls, or downloading upgrade packages from the cloud of the first processor 3 can be realized. The second processor 4 is connected to a network (e.g., campus network) through the second wireless module 9, and can implement functions such as card consumption, card-swiping and signing-in, or on-line answering.
As a preferred embodiment, the method further comprises the following steps:
the first display device 10 is respectively connected with the first processor 3 and the output end of the first power module 1, and is used for displaying the content to be displayed sent by the first processor 3;
and the second display device 11 is respectively connected with the second processor 4 and the output end of the second power module 2, and is used for displaying the content to be displayed, which is sent by the second processor 4.
In order to make the user clearly understand the tasks being performed by the first processor 3 and the second processor 4, the present application provides the first display device 10 and the second display device 11 for displaying the content to be displayed sent by the first processor 3 and the content to be displayed sent by the second processor 4, respectively.
Specifically, for example, the first display device 10 displays the upgrade package type in the cloud of the first processor 3, the browsed network information, or the online-viewed learning video; the second display device 11 displays the balance consumed by swiping a card or the question of answering on line. It can be seen that the tasks performed by the first processor 3 and the second processor 4 can be clearly understood by the user through the first display device 10 and the second display device 11, which is convenient for the user to use.
In addition, the first display device 10 and the second display device 11 in the present application may be both touch display devices or non-touch display devices. In addition, according to the requirements of the user and the settings of the device, the first display device 10 and the second display device 11 in the present application may also display other information, which is not described herein again.
As a preferred embodiment, the first display device 10 is a touch display device, the second display device 11 is a non-touch display device, and the first display device further includes a key input module 12 connected to the second processor 4.
Considering that the first processor 3 has relatively many functions and complex contents to be displayed, the first display device 10 may be configured as a touch display device, and a user may directly input through the second display device 11; the functions that the second processor 4 needs to implement are relatively simple, the contents that need to be displayed are relatively simple, and in order to reduce the energy consumption of the second display device 11, the second display device 11 may be configured as a non-touch display device, and the input is performed through the key input module 12.
For example, if an application scenario of the second processor 4 in the intelligent school badge is online answering, the key input module 12 may include an option key (option such as A, B, C, D), a correct key, an incorrect key, a confirm key, or a cancel key, and the specific key types and numbers may be set according to requirements. Specifically, for example, the second processor 4 obtains questions from the campus network through the second wireless module 9, displays the questions on the second display device 11, and the student selects and inputs answers corresponding to the questions through the key input module 12 of the intelligent school badge and submits the confirmed answers to the campus network.
When the second display device 11 is a non-touch display device, the key input module 12 is arranged, so that the energy consumption of the second processor 4 is reduced, and the cruising ability of the second processor 4 is improved.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It is further noted that, in the present specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. A dual system apparatus, comprising:
the first power supply module is connected with the first processor and used for supplying power to the first processor;
the second power supply module is connected with the second processor and used for supplying power to the second processor;
the first processor which is connected with the second processor and is different from the second processor is used for receiving a second instruction, executing the operation corresponding to the second instruction and sending a first instruction to the second processor;
the second processor is used for receiving the first instruction, executing the operation corresponding to the first instruction and sending the second instruction to the first processor.
2. The dual-system apparatus of claim 1, wherein a supply voltage of the first power module is different from a supply voltage of the second power module, further comprising:
the first isolation module is used for isolating the power supply, and one end of the first isolation module is connected with the receiving end of the first processor, and the other end of the first isolation module is connected with the sending end of the second processor;
and the second isolation module is used for isolating the power supply, and one end of the second isolation module is connected with the sending end of the first processor, and the other end of the second isolation module is connected with the receiving end of the second processor.
3. The dual-system device of claim 2, wherein a supply voltage of the first power module is less than a supply voltage of the second power module, the first isolation module comprising a diode, a first resistor, and a second resistor;
the anode of the diode is connected with the first end of the first resistor and the receiving end of the first processor respectively, the second end of the first resistor is connected with the output end of the first power module, the cathode of the diode is connected with the first end of the second resistor and the sending end of the second processor respectively, and the second end of the second resistor is connected with the output end of the second power module.
4. The dual-system apparatus of claim 2, wherein the second isolation module comprises a first controllable switch, a third resistor, a fourth resistor, and a fifth resistor;
a first end of the first controllable switch is connected to a first end of the third resistor and a sending end of the first processor, a control end of the first controllable switch is connected to a second end of the third resistor and a first end of the fourth resistor, a second end of the fourth resistor is connected to an output end of the first power module, a second end of the first controllable switch is connected to a first end of the fifth resistor and a receiving end of the second processor, and a second end of the fifth resistor is connected to an output end of the second power module;
when the transmitting end of the first processor outputs a high level, the first controllable switch is turned off, and when the transmitting end of the first processor outputs a low level, the first controllable switch is turned on.
5. The dual-system apparatus of claim 1, wherein the reset control terminal of the first processor is connected to the reset terminal of the second processor;
the first processor is specifically configured to, when receiving an upgrade instruction sent by the second processor, download an upgrade package of the second processor from a cloud of the first processor, and send a reset instruction and the upgrade package of the second processor to the second processor;
the second processor is specifically configured to, after receiving the reset instruction, perform upgrading based on the received upgrade package.
6. The dual-system apparatus of claim 5, wherein a supply voltage of the first power module is different from a supply voltage of the second power module, further comprising:
and the third isolation module is used for isolating the power supply, and one end of the third isolation module is connected with the reset control end of the first processor, and the other end of the third isolation module is connected with the reset end of the second processor.
7. The dual-system apparatus of claim 6, wherein the third isolation module comprises a second controllable switch, a sixth resistor, a seventh resistor, and an eighth resistor;
a first end of the second controllable switch is connected to a first end of the sixth resistor and a reset control end of the first processor, a control end of the second controllable switch is connected to a second end of the sixth resistor and a first end of the seventh resistor, a second end of the seventh resistor is connected to an output end of the first power module, a second end of the second controllable switch is connected to a first end of the eighth resistor and a reset end of the second processor, and a second end of the eighth resistor is connected to an output end of the second power module;
when the reset control end of the first processor outputs a high level, the second controllable switch is turned off, and when the reset control end of the first processor outputs a low level, the second controllable switch is turned on.
8. The dual-system apparatus as claimed in any one of claims 1 to 7, further comprising:
the first wireless module is respectively connected with the first processor and the output end of the first power supply module and is used for the communication between the first processor and an external network through the first wireless module;
and the second wireless module is respectively connected with the second processor and the output end of the second power supply module and is used for the second processor to communicate with an external network through the second wireless module.
9. The dual-system apparatus as claimed in any one of claims 1 to 7, further comprising:
the first display device is respectively connected with the first processor and the output end of the first power supply module and is used for displaying the content to be displayed, which is sent by the first processor;
and the second display device is respectively connected with the second processor and the output end of the first power supply module and is used for displaying the content to be displayed, which is sent by the second processor.
10. The dual-system device as claimed in claim 9, wherein the first display device is a touch display device and the second display device is a non-touch display device, further comprising a key input module connected to the second processor.
CN202010878542.4A 2020-08-27 2020-08-27 Dual-system device Pending CN111857311A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112328175A (en) * 2020-11-03 2021-02-05 中电科特种飞机系统工程有限公司 Device for reading flight control data
CN114363728A (en) * 2021-12-30 2022-04-15 锐捷网络股份有限公司 Electronic equipment and method for preventing current from flowing backwards

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112328175A (en) * 2020-11-03 2021-02-05 中电科特种飞机系统工程有限公司 Device for reading flight control data
CN114363728A (en) * 2021-12-30 2022-04-15 锐捷网络股份有限公司 Electronic equipment and method for preventing current from flowing backwards

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