CN114363728A - Electronic equipment and method for preventing current from flowing backwards - Google Patents

Electronic equipment and method for preventing current from flowing backwards Download PDF

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Publication number
CN114363728A
CN114363728A CN202111647761.2A CN202111647761A CN114363728A CN 114363728 A CN114363728 A CN 114363728A CN 202111647761 A CN202111647761 A CN 202111647761A CN 114363728 A CN114363728 A CN 114363728A
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module
power supply
gate
level signal
communication channel
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CN202111647761.2A
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Chinese (zh)
Inventor
江楠
赖国洪
刘伟
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Ruijie Networks Co Ltd
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Ruijie Networks Co Ltd
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Priority to CN202111647761.2A priority Critical patent/CN114363728A/en
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Abstract

The invention discloses electronic equipment and a method for preventing current from flowing backwards, wherein the electronic equipment comprises a first module, a second module, a first power supply and a second power supply; the first power supply is used for supplying power to the first module; the second power supply is used for supplying power to the second module; and the first module is used for controlling the voltage of a communication channel between the first module and the second module to be a second level signal when the voltage of the communication channel is determined to be a first level signal after the second module is determined to be powered off. Because the first module can control the voltage of the communication channel to be the second level signal after the second module is determined to be powered off, the current can be prevented from flowing into the second module and the second power supply from the first module, so that the risk of backward flowing of the current can be reduced, the risk of damage to devices can be reduced, and the service life of the electronic equipment can be prolonged.

Description

Electronic equipment and method for preventing current from flowing backwards
Technical Field
The invention relates to the technical field of electronic design, in particular to electronic equipment and a method for preventing current from flowing backwards.
Background
With the development of switches, after an X86 system is adopted, the modular process of the switch continues to advance, and currently, a high-end switch in a data center generally includes a Central Processing Unit (CPU) module, a Baseboard Management Controller (BMC) module, a Media Access Control (MAC) module, an optical module, and other modules. The CPU module can realize the control management of the service card, the network protocol control management and the data maintenance of each service module, and the like; the BMC module can realize intelligent monitoring, power-on and power-off control, power and temperature state monitoring and the like of the whole machine; the MAC module can realize network interaction and forwarding; the optical module can realize photoelectric conversion.
Similarly, with the demand of switch modularization and energy saving, the switch can control some of the modules to be powered down independently or in a dormant state, but because many signals are communicated among the modules, if a certain module is powered down, current may flow backwards, so that the chip is in an abnormal mode.
Disclosure of Invention
The invention provides electronic equipment and a method for preventing current from flowing backwards, which are used for solving the problem of current flowing backwards caused by independent power-off of a module in the prior art.
In a first aspect, an embodiment of the present invention provides an electronic device, including a first module, a second module, a first power supply, and a second power supply;
the first power supply is used for supplying power to the first module;
the second power supply is used for supplying power to the second module;
the first module is used for controlling the voltage of a communication channel between the first module and the second module to be a second level signal when the voltage of the communication channel is determined to be a first level signal after the second module is determined to be powered off;
the first module is a module with a control function.
In one possible embodiment, the first module comprises a CPLD;
the first module is specifically configured to:
and the first module controls the voltage of the communication channel to be a second level signal through the CPLD.
In one possible embodiment, the CPLD includes an OD gate;
and the output end of the OD gate is connected with one end of the communication channel and is used for outputting the second level signal, the first power supply end of the OD gate is connected with the first power supply, and the second power supply end of the OD gate is connected with the second power supply.
In one possible implementation, the device further comprises a pull-up resistor;
the pull-up resistor is connected between the communication path and the second power source.
In one possible implementation, the system further comprises a third power supply and a third module;
the third power supply is used for supplying power to the third module;
the third module is connected to an output of the OD gate.
In one possible embodiment, the communication path between the third module and the output of the OD gate is in a high impedance state.
In a second aspect, an embodiment of the present invention provides a method for preventing current from flowing backwards, where the method is applied to an electronic device according to any one of the first aspect, and the method includes:
after determining that a second module is powered off, a first module determines that the voltage of a communication channel connected with the first module and the second module is a first level signal;
the first module controls the voltage of the communication channel to be a second level signal;
the first module is a module with a control function.
In one possible embodiment, the first module comprises a CPLD;
the first module controls the voltage of the communication channel to be a second level signal, and comprises:
the first module controls one end of the first module, which is connected with the communication channel, to output a second level signal through the CPLD, so that the voltage of the communication channel is the second level signal.
In one possible embodiment, the first module comprises a CPLD comprising an OD gate, an output of the OD gate of the CPLD being connected to one end of the communication path, a first power supply terminal of the OD gate of the CPLD being connected to the first power supply, a second power supply terminal of the OD gate of the CPLD being connected to the second power supply;
the first module controls the voltage of the communication channel to be a second level signal, and comprises:
and the output end of the OD gate outputs a second level signal.
The invention has the following beneficial effects:
the invention discloses electronic equipment and a method for preventing current from flowing backwards, wherein the electronic equipment comprises a first module, a second module, a first power supply and a second power supply; the first power supply is used for supplying power to the first module; the second power supply is used for supplying power to the second module; and the first module is used for controlling the voltage of a communication channel between the first module and the second module to be a second level signal when the voltage of the communication channel is determined to be a first level signal after the second module is determined to be powered off. Because the first module can control the voltage of the communication channel to be the second level signal after the second module is determined to be powered off, the current can be prevented from flowing into the second module and the second power supply from the first module, so that the risk of backward flowing of the current can be reduced, the risk of damage to devices can be reduced, and the service life of the electronic equipment can be prolonged.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
FIG. 1 is a diagram of a hardware architecture in the related art;
FIG. 2 is a schematic diagram of a modular power supply design according to the related art;
FIG. 3 is a schematic diagram of a module in the related art powering down independently;
fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present invention;
fig. 5a is a schematic diagram of a module independent power down according to an embodiment of the present invention;
FIG. 5b is a schematic diagram of another module according to an embodiment of the present invention being powered down independently;
FIG. 6 is a schematic diagram of an OD gate according to an embodiment of the present invention;
FIG. 7 is a schematic diagram of another module according to an embodiment of the present invention being powered down independently;
fig. 8 is a flowchart of a method for preventing current from flowing backward according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the present invention will be described in further detail with reference to the accompanying drawings, and it is apparent that the described embodiments are only a part of the embodiments of the present invention, not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
With the development of the switch, after the X86 system is adopted, the modularization process of the switch continues to advance, as shown in fig. 1, which is a hardware architecture diagram of a switch in the related art, and includes modules such as a CPU module 101, a BMC module 102, a MAC module 103, an optical module 104, and a substrate 105. The CPU module 101 can implement control management of the service card, network protocol control management and data maintenance of each service module, and the like; the BMC module 102 can realize intelligent monitoring, power-on and power-off control, power and temperature state monitoring and the like of the whole machine; the MAC module 103 may implement network interaction and forwarding; the optical module 104 can implement photoelectric conversion.
As shown in fig. 2, a schematic structural diagram of a modular power supply design in the related art includes a power supply module 201 and a Direct Current to Direct Current (DC-DC) unit 202, and as can be seen from fig. 2, each module or substrate corresponds to one DC-DC unit 202, that is, the power supply of each module is designed independently, and for a module or chip with separate power-on and power-off requirements, the corresponding power supply part can control the power supply to power-on and power-off independently.
As shown in fig. 3, which is a schematic diagram of independent power down of a module in the related art, in fig. 3, an optical module power supply 301 supplies power to an optical module 104, that is, the optical module power supply 301 can control the optical module 104 to be independently powered down or in a sleep state. After the optical module 104 is powered off, the optical module power supply 301 and the optical module 104 maintain a low level, but the powered-on MAC module 103 continues to maintain a high level output, which may cause a current to flow back into the optical module power supply 301 through the pull-up resistor R, that is, in a current direction indicated by a dotted line in the figure, the optical module power supply 301 inputs the backward current into the powered-off optical module 104, thereby possibly causing the optical module 104 to be in an abnormal operating state.
Based on the above problems, embodiments of the present invention provide an electronic device and a method for preventing current from flowing backward, so as to solve the problem of current flowing backward caused by independent power down of a module in the prior art.
In the following, the electronic device and the method for preventing current from flowing backwards provided by the exemplary embodiments of the present application are described with reference to the accompanying drawings in combination with the application scenarios described above, it should be noted that the application scenarios described above are only illustrated for the convenience of understanding the spirit and principles of the present application, and the embodiments of the present application are not limited in any way in this respect.
As shown in fig. 4, a schematic structural diagram of an electronic device according to an embodiment of the present invention includes a first module 401, a second module 402, a first power source 403, and a second power source 404;
the first power supply 403 is configured to supply power to the first module 401;
the second power source 404 is configured to supply power to the second module 402;
the first module 401 is configured to determine, after determining that the second module 402 is powered off, that a voltage of a communication path connected between the first module and the second module is a first level signal, and control a voltage of the communication path L to be a second level signal;
the first module is a module with a control function.
In the embodiment of the invention, the first module is a module with a control function, and when the first module determines that the second module is powered off and determines that the voltage of a communication channel between the first module and the second module is a first level signal, the voltage of the communication channel is controlled to be a second level signal. Because the first module can control the voltage of the communication channel to be the second level signal after the second module is determined to be powered off, the current can be prevented from flowing into the second module and the second power supply from the first module, so that the risk of backward flowing of the current can be reduced, the risk of damage to devices can be reduced, and the service life of the electronic equipment can be prolonged.
The first module in the embodiment of the present invention may be a CPU module, a BMC module, a substrate, an MAC module, or other modules, and all modules having a control function are suitable for the embodiment of the present invention.
The second module 402 is powered off, that is, the second power supply stops supplying power to the second module 402, and may be controlled by the first module 401 or controlled by another module. The first module 401 determines the operating state of the second module 402, and may determine the operating state by detecting the power input terminal of the second module 402, for example, if the power input terminal of the second module 402 is detected to be at a high level, it is determined that the second module 402 is normally powered on, and if the power input terminal of the second module 402 is detected to be at a low level, it is determined that the second module 402 is powered off.
The mode of determining the state of the module in the embodiment of the present invention is not limited, and any mode of determining the state of the module is applicable to the embodiment of the present invention.
The electronic device in the embodiment of the present invention may be a switch, a server, or other electronic devices, which is not limited in this respect.
In a specific implementation, the first level signal may be a high level, the second level signal is a low level, and the complex programmable logic device CPLD in the first module 401 controls the voltage of the communication channel L to be the second level signal.
The control of the voltage of the communication path to a low level by the first module will be described in detail below.
As shown in fig. 5a, for a schematic structural diagram of an electronic device according to an embodiment of the present invention, the electronic device may further include a pull-up resistor R, where the pull-up resistor R is connected between the communication path L and the second power supply 404. The first module 401 includes a CPLD 501;
in addition, if the bus is for a two-wire serial bus (I)2C) Then, pull-up resistors R need to be respectively provided for the two communication paths L, and each pull-up resistor R is connected between a corresponding one of the communication paths L and the second power source 404.
At the moment when the first module 401 controls the second module 402 to be powered down independently or to enter a sleep state, the second power source 404 and the second module 402 keep outputting at a low level, and the first power source 403 and the first module 401 in a normal working state keep outputting at a high level, so that the voltage of the communication path L is still at a high level, and at this time, there is a risk that the current flows through the pull-up resistor R and then flows back into the second power source 404 and then flows back into the second module 402 through the second power source 404.
For the first module 401 connected to the CPLD501, when the first module 401 is in a normal operating state, the second module 402 is powered off, and the voltage of the communication path L is at a high level, the electronic device provided by the invention can control the pin of the first module 401 connected to the communication path L to output a low level through the CPLD 501.
The pin of the first module 401 connected to the communication path L is controlled by the CPLD501 to output a low level, that is, controlled by software in the CPLD501, and the pin of the first module 401 connected to the communication path L outputs a low level, that is, the level on the communication link L is a low level, so that no current flows to the second module 402 and the second power supply 404.
In one embodiment, the CPLD501 may include an OD gate 502, as shown in fig. 5b, where an output terminal of the OD gate 502 is connected to one end of the communication path L, a first power terminal of the OD gate 502 is connected to the first power source 403, and a second power terminal of the OD gate 502 is connected to the second power source 404.
As can be seen from fig. 5b, the pull-up resistor R is not connected to the second power source 404 and the first module, and when the first module 401 is in the normal operating state, the second module 402 is powered down, and the voltage of the communication path L is at a high level, a current flows between the first module 401 and the second module 402 and flows back into the second module 402 along the communication path L.
The first power supply terminal of the OD gate 502 remains powered, the second power supply terminal of the OD gate 502 stops powering, and the output terminal of the OD gate outputs a low level according to the characteristics of the OD gate.
The OD gate is described in detail below.
As shown in fig. 6, which is an application schematic diagram of an OD gate circuit according to an embodiment of the present invention, the OD gate 502 includes an Input terminal Input, an Output terminal Output, a first power source terminal Vcc1, a second power source terminal Vcc2, a first transistor M1, a second transistor M2, a first resistor R1, a second resistor R2, and a third resistor R3;
an Input terminal of the OD gate 502 is connected to the controller 405, the controller 405 is configured to control the first transistor M1 to be turned on or off, an Output terminal Output of the OD gate 502 is connected to one end of the communication path L, a first power source terminal Vcc1 of the OD gate 502 is connected to the first power source 403, and a second power source terminal Vcc2 of the OD gate 502 is connected to the second power source 404.
When the first module 401 is in a normal operating state, the second module 402 is powered down, and the voltage of the communication path L is at a high level, the first power supply 403 inputs a high level to the first power supply terminal Vcc1, and the second power supply 404 inputs a low level to the second power supply terminal Vcc2, so that the Output terminal Output of the OD gate 502 outputs a low level.
In addition, if the communication path L is bidirectional communication, when the second module 402 outputs a communication signal to the first module 401, the CPLD502 does not need to process the communication signal because the first module 401 is an input terminal.
As described above, the low level output of the communication channel L can be realized by software in the CPLD501, or can be realized by an OD gate in the CPLD501, that is, by hardware.
The communication channel L outputs low level through hardware, so that software programs and program writing can be reduced, and the related cost is reduced.
In a possible implementation manner, as shown in fig. 7, for a schematic structural diagram of another electronic device provided in the embodiment of the present invention, the electronic device may further include a third module 701 and a third power source 702, where the third power source 702 is configured to supply power to the third module 701; the third module 701 is connected to the output end of the OD gate 502 of the first module 401, the third module 701 is an interconnection undefined module with respect to the first module 401, that is, the third module 701 does not communicate with the first module 401, and the path L2 between the third module 701 and the first module 401 is set to a high impedance state, so that the influence of the CPLD501 on the interconnection undefined module can be avoided by the above design.
Based on the same inventive concept, the embodiment of the invention also provides a method for preventing current from flowing backwards, and the implementation of the method can refer to the implementation of electronic equipment, and repeated parts are not described again.
As shown in fig. 8, a flowchart of a method for preventing current from flowing backward according to an embodiment of the present invention includes:
step 801, after a first module determines that a second module is powered off, determining that the voltage of a communication channel connected with the first module and the second module is a first level signal;
step 802, the first module controls the voltage of the communication channel to be a second level voltage;
the first module is a module with a control function.
Optionally, the first module includes a CPLD;
the first module controls the voltage of the communication channel to be a second level signal, and comprises:
the first module controls one end of the first module, which is connected with the communication channel, to output a second level signal through the CPLD, so that the voltage of the communication channel is the second level signal.
Optionally, the first module includes a CPLD including an OD gate, an output end of the OD gate of the CPLD is connected to one end of the communication path, a first power end of the OD gate of the CPLD is connected to the first power supply, and a second power end of the OD gate of the CPLD is connected to the second power supply;
the first module controls the voltage of the communication channel to be a second level signal, and comprises:
and the output end of the OD gate outputs a second level signal.
The embodiment of the invention discloses electronic equipment and a method for preventing current from flowing backwards, wherein the electronic equipment comprises a first module, a second module, a first power supply and a second power supply; the first power supply is used for supplying power to the first module; the second power supply is used for supplying power to the second module; after the first module determines that the second module is powered off, the first module determines that the voltage of a communication channel connected with the first module and the second module is a first level signal and controls the voltage of the communication channel to be a second level signal. Because the first module can control the voltage of the communication channel to be the second level signal after the second module is determined to be powered off, the current can be prevented from flowing into the second module and the second power supply from the first module, so that the risk of backward flowing of the current can be reduced, the risk of damage to devices can be reduced, and the service life of the electronic equipment can be prolonged.
The present application is described above with reference to block diagrams and/or flowchart illustrations of methods, apparatus (systems) and/or computer program products according to embodiments of the application. It will be understood that one block of the block diagrams and/or flowchart illustrations, and combinations of blocks in the block diagrams and/or flowchart illustrations, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, and/or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer and/or other programmable data processing apparatus, create means for implementing the functions/acts specified in the block diagrams and/or flowchart block or blocks.
Accordingly, the subject application may also be embodied in hardware and/or in software (including firmware, resident software, micro-code, etc.). Furthermore, the present application may take the form of a computer program product on a computer-usable or computer-readable storage medium having computer-usable or computer-readable program code embodied in the medium for use by or in connection with an instruction execution system. In the context of this application, a computer-usable or computer-readable medium may be any medium that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.

Claims (9)

1. An electronic device comprising a first module, a second module, a first power source and a second power source;
the first power supply is used for supplying power to the first module;
the second power supply is used for supplying power to the second module;
the first module is used for determining that the voltage of a communication channel connected with the first module and the second module is a first level signal and controlling the voltage of the communication channel to be a second level signal after determining that the second module is powered off;
the first module is a module with a control function.
2. The electronic device of claim 1, wherein the first module comprises a CPLD;
the first module is specifically configured to:
and the first module controls the voltage of the communication channel to be a second level signal through the CPLD.
3. The electronic device of claim 2, wherein the CPLD includes an OD gate;
and the output end of the OD gate is connected with one end of the communication channel and is used for outputting the second level signal, the first power supply end of the OD gate is connected with the first power supply, and the second power supply end of the OD gate of the CPLD is connected with the second power supply.
4. The electronic device of claim 3, further comprising a pull-up resistor;
the pull-up resistor is connected between the communication path and the second power source.
5. The electronic device of claim 3, further comprising a third power supply and a third module;
the third power supply is used for supplying power to the third module;
the third module is connected to an output of the OD gate.
6. The electronic device of claim 5, wherein a communication path between the third module and an output of the OD gate is in a high impedance state.
7. A method for preventing current from flowing backward, which is applied to the electronic device as claimed in any one of claims 1-6, the method comprising:
after determining that a second module is powered off, a first module determines that the voltage of a communication channel connected with the first module and the second module is a first level signal;
the first module controls the voltage of the communication channel to be a second level signal;
the first module is a module with a control function.
8. The method of claim 7, wherein the first module comprises a CPLD;
the first module controls the voltage of the communication channel to be a second level signal, and comprises:
the first module controls one end of the first module, which is connected with the communication channel, to output a second level signal through the CPLD, so that the voltage of the communication channel is the second level signal.
9. The method of claim 7, wherein the first module comprises a CPLD including an OD gate, an output of the OD gate of the CPLD being connected to one end of the communication path, a first power supply terminal of the OD gate of the CPLD being connected to the first power supply, a second power supply terminal of the OD gate of the CPLD being connected to the second power supply;
the first module controls the voltage of the communication channel to be a second level signal, and comprises:
and the output end of the OD gate outputs the second level signal.
CN202111647761.2A 2021-12-30 2021-12-30 Electronic equipment and method for preventing current from flowing backwards Pending CN114363728A (en)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
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