CN111825055A - Etching method of gold - Google Patents
Etching method of gold Download PDFInfo
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- CN111825055A CN111825055A CN201910302063.5A CN201910302063A CN111825055A CN 111825055 A CN111825055 A CN 111825055A CN 201910302063 A CN201910302063 A CN 201910302063A CN 111825055 A CN111825055 A CN 111825055A
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- Prior art keywords
- gold
- hard mask
- metal hard
- etching
- layer
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 title claims abstract description 96
- 239000010931 gold Substances 0.000 title claims abstract description 96
- 229910052737 gold Inorganic materials 0.000 title claims abstract description 96
- 238000000034 method Methods 0.000 title claims abstract description 43
- 238000005530 etching Methods 0.000 title claims abstract description 42
- 229910052751 metal Inorganic materials 0.000 claims abstract description 79
- 239000002184 metal Substances 0.000 claims abstract description 79
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 238000001312 dry etching Methods 0.000 claims abstract description 23
- 239000006227 byproduct Substances 0.000 claims abstract description 22
- 238000001039 wet etching Methods 0.000 claims abstract description 14
- 238000000151 deposition Methods 0.000 claims abstract description 8
- 239000000463 material Substances 0.000 claims description 12
- 239000000243 solution Substances 0.000 claims description 12
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 10
- 229910052710 silicon Inorganic materials 0.000 claims description 10
- 239000010703 silicon Substances 0.000 claims description 10
- 229910052782 aluminium Inorganic materials 0.000 claims description 8
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 7
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 claims description 6
- 238000004544 sputter deposition Methods 0.000 claims description 6
- 238000004140 cleaning Methods 0.000 claims description 4
- 238000001259 photo etching Methods 0.000 claims description 4
- VHUUQVKOLVNVRT-UHFFFAOYSA-N Ammonium hydroxide Chemical compound [NH4+].[OH-] VHUUQVKOLVNVRT-UHFFFAOYSA-N 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 235000011114 ammonium hydroxide Nutrition 0.000 claims description 3
- 239000011259 mixed solution Substances 0.000 claims description 3
- 230000003647 oxidation Effects 0.000 claims description 3
- 238000007254 oxidation reaction Methods 0.000 claims description 3
- 239000010936 titanium Substances 0.000 claims description 3
- 229910052719 titanium Inorganic materials 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000001755 magnetron sputter deposition Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- 229910002601 GaN Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 1
- -1 aluminum compound Chemical class 0.000 description 1
- 238000004380 ashing Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229920005570 flexible polymer Polymers 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010849 ion bombardment Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00388—Etch mask forming
- B81C1/00396—Mask characterised by its composition, e.g. multilayer masks
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00436—Shaping materials, i.e. techniques for structuring the substrate or the layers on the substrate
- B81C1/00523—Etching material
- B81C1/00531—Dry etching
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00841—Cleaning during or after manufacture
- B81C1/00849—Cleaning during or after manufacture during manufacture
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02041—Cleaning
- H01L21/02057—Cleaning during device manufacture
- H01L21/02068—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers
- H01L21/02071—Cleaning during device manufacture during, before or after processing of conductive layers, e.g. polysilicon or amorphous silicon layers the processing being a delineation, e.g. RIE, of conductive layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
Abstract
The invention provides a gold etching method, which comprises the following steps: 1) providing a substrate; 2) depositing a gold layer on the substrate; 3) forming a patterned metal hard mask on the gold layer; 4) performing dry etching on the gold layer based on the patterned metal hard mask to form a patterned gold layer; 5) and removing the graphic metal hard mask on the surface of the graphic gold layer by wet etching, and simultaneously removing by-products generated by the gold layer on the side wall surface of the graphic metal hard mask by dry etching. According to the invention, the metal hard mask process is added during the dry etching of gold, so that the residual gold by-product can be removed completely while the metal hard mask is removed, the device performance can be effectively improved, and the yield is improved.
Description
Technical Field
The invention belongs to the field of semiconductor integrated circuit manufacturing, and particularly relates to a gold etching method.
Background
Gold has found very widespread use in semiconductor wafer fabrication processes, particularly in micro-electromechanical systems (MEMS) wafer fabrication. However, gold is very stable in chemical properties and cannot be etched by dry chemical reaction, and the current dry etching of gold is directly removed by ion bombardment. However, if a conventional photoresist is used as a gold etching mask, after gold etching, the remaining gold 101 has a surface with residual etching byproducts 102 bombarded during the etching process, and these etching byproducts 102 mainly comprise gold, which is very difficult to remove due to stable chemical properties in subsequent wet cleaning, so that the residual etching byproducts 102 affect the device performance, as shown in fig. 1.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, the present invention aims to provide a gold etching method for solving the problem that etching byproducts which are difficult to remove are easily generated in the gold etching process in the prior art.
In order to achieve the above and other related objects, the present invention provides a gold etching method, including: 1) providing a substrate; 2) depositing a gold layer on the substrate; 3) forming a patterned metal hard mask on the gold layer; 4) Performing dry etching on the gold layer based on the patterned metal hard mask to form a patterned gold layer; 5) and removing the graphic metal hard mask on the surface of the graphic gold layer by wet etching, and simultaneously removing by-products generated by the gold layer on the side wall surface of the graphic metal hard mask by dry etching.
Optionally, the step 3) of forming a patterned metal hard mask on the gold layer includes: 3-1) depositing a metal hard mask on the gold layer; 3-2) forming a photoetching material pattern layer on the metal hard mask; 3-3) dry etching the metal hard mask to form a graphic metal hard mask; 3-4) removing the photoetching material pattern layer; 3-5) wet cleaning to remove by-products generated during the dry etching of the metal hard mask.
Optionally, a metal sputtering process is used to deposit the metal hard mask on the gold layer.
Optionally, the etching solution used for removing the patterned metal hard mask by wet etching in the step 5) does not react with gold.
Optionally, the material of the metal hard mask includes aluminum, and the etching solution used in the step 5) of removing the patterned metal hard mask by wet etching includes an aluminum wet etching solution.
Optionally, the metal hard mask is made of titanium, and the etching solution used for removing the patterned metal hard mask by wet etching in step 5) comprises a mixed solution of ammonia water and hydrogen peroxide.
Optionally, the base includes a silicon substrate, the silicon substrate has an oxide layer thereon, and the gold layer is deposited on a surface of the oxide layer.
Optionally, the gold layer is deposited on the substrate using a metal sputtering process.
Optionally, the thickness of the gold layer ranges from 1 nm to 10000 nm.
Optionally, the thickness of the metal hard mask layer ranges from 2 nm to 10000 nm.
As described above, the gold etching method of the present invention has the following beneficial effects:
the invention adds the metal hard mask process during the dry etching of the gold, and can remove the residual gold by-product while removing the metal hard mask.
The dry etching process of gold can avoid the residue of gold etching by-products, effectively improve the performance of devices and improve the yield.
Drawings
Fig. 1 is a schematic diagram illustrating that a byproduct residue is easily generated in a gold etching method in the prior art.
Fig. 2 to 9 are schematic structural diagrams showing steps of the gold etching method of the present invention.
Description of the element reference numerals
201 silicon substrate
202 oxide layer
203 gold layer
204 metal hard mask
205 patterned layer of photolithographic material
206 pattern metal hard mask
207 patterned gold layer
208 by-product
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
Example 1
As shown in fig. 2 to 9, this embodiment provides a gold etching method, in particular, a gold dry etching method, where the gold dry etching method includes the following steps:
as shown in fig. 2, step 1) is performed first to provide a substrate.
The base may be a semiconductor substrate, such as a silicon substrate, a Ge substrate, a SiGe substrate, an SOI substrate, a GOI substrate, or the like, may also be an insulating substrate, such as a silicon nitride, a silicon dioxide, a silicon oxynitride, a flexible polymer substrate, a glass substrate, a sapphire substrate, a silicon carbide substrate, or the like, may also be a iii-v substrate, such as a gallium nitride substrate, a gallium arsenide substrate, or the like, and may select a suitable semiconductor material as the base according to actual requirements of devices, which is not limited herein. In this specific embodiment, the base is a silicon substrate 201, the surface of the silicon substrate 201 has an oxide layer 202, and the oxide layer 202 may be formed on the surface of the silicon substrate 201 by a thermal oxidation method or a deposition method.
As shown in fig. 3, step 2) is then performed to deposit a gold layer 203 on the substrate.
For example, the gold layer 203 may be deposited on the substrate (in this embodiment, on the oxide layer 202) by a metal sputtering process, such as a magnetron sputtering process. The thickness of the gold layer 203 may range from 1 nm to 10000 nm, for example, the thickness of the gold layer 203 may be 5 nm, 10 nm, 20 nm, 30 nm, 500 nm, 800 nm, and the like, and is not limited to the examples listed herein.
As shown in fig. 4-7, 3) a patterned metal hard mask 206 is formed on the gold layer 203.
For example, the metal hard mask 204 may be deposited on the gold layer 203 using a metal sputtering process, such as a magnetron sputtering process. The thickness of the metal hard mask 204 layer may range from 2 nm to 10000 nm, for example, the thickness of the metal hard mask 204 may be 10 nm, 20 nm, 30 nm, 50 nm, 800 nm, 1200 nm, and the like, and is not limited to the examples listed herein.
The pattern of the patterned metal mask may be in the form of metal islands, metal gates, metal interconnect lines, etc., and is not limited to the examples listed herein, and the pattern is subsequently transferred into the gold layer 203.
Specifically, forming the patterned metal hard mask 206 on the gold layer 203 includes:
as shown in fig. 4, step 3-1) is performed to deposit a metal hard mask 204 on the gold layer 203.
As shown in fig. 5, step 3-2) is performed, and a patterned layer 205 of photolithographic material is formed on the metal hard mask 204 by spin coating, exposure, and development.
As shown in fig. 6, step 3-3) is performed to dry etch the metal hard mask 204 to form a patterned metal hard mask 206. During the dry etching of the metal hard mask 204, some byproducts may be generated, which have a major cost of the metal material or its compound in the metal hard mask 204.
As shown in fig. 7, step 3-4) is performed to remove the patterned layer of photolithographic material 205.
For example, the patterned layer of photoresist material 205 may be removed using, for example, an ashing process.
And 3-5) performing wet cleaning to remove by-products generated during the dry etching of the metal hard mask 204.
As shown in fig. 8, step 4) is performed, the gold layer 203 is dry etched based on the patterned metal hard mask 206 to form a patterned gold layer 207, during which the sidewall surface of the patterned metal hard mask 206 may cover a by-product 208 generated by the dry etching of the gold layer 203, and the by-product 208 mainly contains gold or a compound of gold, etc.
As shown in fig. 9, step 5) is finally performed, the patterned metal hard mask 206 on the surface of the patterned gold layer 207 is removed by wet etching, and by-products 208 generated by dry etching of the gold layer 203 covering the sidewall surface of the patterned metal hard mask 206 are simultaneously removed.
The etching solution used by the wet etch to remove the patterned metal hard mask 206 does not react with gold.
For example, in the present embodiment, the material of the metal hard mask 204 includes aluminum, and the etching solution used in the step 5) wet etching to remove the patterned metal hard mask 206 includes an aluminum wet etching solution, which reacts only with aluminum or aluminum compound without corroding the gold layer 203.
In the embodiment, the metal hard mask 204 is added during the dry etching of gold, so that the residual gold by-product can be removed completely while the metal hard mask 204 is removed, the device performance can be effectively improved, and the yield can be improved.
Example 2
The present embodiment provides a gold etching method, which includes the basic steps as in embodiment 1, wherein the difference from embodiment 1 is that: the metal hard mask 204 is made of titanium, and the etching solution used for removing the patterned metal hard mask 206 by wet etching in the step 5) comprises a mixed solution of ammonia water and hydrogen peroxide.
As described above, the gold etching method of the present invention has the following beneficial effects:
the invention adds the metal hard mask process during the dry etching of the gold, and can remove the residual gold by-product while removing the metal hard mask.
The dry etching process of gold can avoid the residue of gold etching by-products, effectively improve the performance of devices and improve the yield.
Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A gold etching method is characterized by comprising the following steps:
1) providing a substrate;
2) depositing a gold layer on the substrate;
3) forming a patterned metal hard mask on the gold layer;
4) performing dry etching on the gold layer based on the patterned metal hard mask to form a patterned gold layer;
5) and removing the graphic metal hard mask on the surface of the graphic gold layer by wet etching, and simultaneously removing by-products generated by the gold layer on the side wall surface of the graphic metal hard mask by dry etching.
2. The gold etching method according to claim 1, characterized in that: step 3) forming a patterned metal hard mask on the gold layer comprises:
3-1) depositing a metal hard mask on the gold layer;
3-2) forming a photoetching material pattern layer on the metal hard mask;
3-3) dry etching the metal hard mask to form a graphic metal hard mask;
3-4) removing the photoetching material pattern layer;
3-5) wet cleaning to remove by-products generated during the dry etching of the metal hard mask.
3. The gold etching method according to claim 2, characterized in that: and depositing the metal hard mask on the gold layer by adopting a metal sputtering process.
4. The gold etching method according to claim 1, characterized in that: and 5) etching by a wet method to remove the etching solution used by the graphic metal hard mask without reacting with gold.
5. The gold etching method according to claim 1, characterized in that: the material of the metal hard mask comprises aluminum, and the etching solution used for removing the graphic metal hard mask by wet etching in the step 5) comprises aluminum wet etching solution.
6. The gold etching method according to claim 1, characterized in that: the metal hard mask is made of titanium, and the etching solution used for removing the graphic metal hard mask by wet etching in the step 5) comprises a mixed solution of ammonia water and hydrogen peroxide.
7. The gold etching method according to claim 1, characterized in that: the base comprises a silicon substrate, an oxidation layer is arranged on the silicon substrate, and the gold layer is deposited on the surface of the oxidation layer.
8. The gold etching method according to claim 1, characterized in that: and depositing the gold layer on the substrate by adopting a metal sputtering process.
9. The gold etching method according to claim 1, characterized in that: the thickness range of the gold layer is between 1 nanometer and 10000 nanometers.
10. The gold etching method according to claim 1, characterized in that: the thickness range of the metal hard mask layer is between 2 nanometers and 10000 nanometers.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN201910302063.5A CN111825055B (en) | 2019-04-16 | Gold etching method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201910302063.5A CN111825055B (en) | 2019-04-16 | Gold etching method |
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CN111825055A true CN111825055A (en) | 2020-10-27 |
CN111825055B CN111825055B (en) | 2024-06-25 |
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CN101431019A (en) * | 2007-11-08 | 2009-05-13 | 中芯国际集成电路制造(上海)有限公司 | Production method of metal silicide |
CN102376567A (en) * | 2010-08-12 | 2012-03-14 | 中芯国际集成电路制造(上海)有限公司 | Method for etching metal |
CN102915911A (en) * | 2012-09-24 | 2013-02-06 | 中国电子科技集团公司第五十五研究所 | Etching method for improving bottom of silicon carbide table board |
JP2014179366A (en) * | 2013-03-13 | 2014-09-25 | Sharp Corp | Semiconductor device manufacturing method |
CN104465369A (en) * | 2014-12-30 | 2015-03-25 | 上海华虹宏力半导体制造有限公司 | Germanium etching method |
CN106328513A (en) * | 2015-07-02 | 2017-01-11 | 中芯国际集成电路制造(上海)有限公司 | Method of forming semiconductor structure |
CN108155144A (en) * | 2016-12-02 | 2018-06-12 | 中芯国际集成电路制造(上海)有限公司 | A kind of production method of semiconductor devices |
Patent Citations (7)
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CN101431019A (en) * | 2007-11-08 | 2009-05-13 | 中芯国际集成电路制造(上海)有限公司 | Production method of metal silicide |
CN102376567A (en) * | 2010-08-12 | 2012-03-14 | 中芯国际集成电路制造(上海)有限公司 | Method for etching metal |
CN102915911A (en) * | 2012-09-24 | 2013-02-06 | 中国电子科技集团公司第五十五研究所 | Etching method for improving bottom of silicon carbide table board |
JP2014179366A (en) * | 2013-03-13 | 2014-09-25 | Sharp Corp | Semiconductor device manufacturing method |
CN104465369A (en) * | 2014-12-30 | 2015-03-25 | 上海华虹宏力半导体制造有限公司 | Germanium etching method |
CN106328513A (en) * | 2015-07-02 | 2017-01-11 | 中芯国际集成电路制造(上海)有限公司 | Method of forming semiconductor structure |
CN108155144A (en) * | 2016-12-02 | 2018-06-12 | 中芯国际集成电路制造(上海)有限公司 | A kind of production method of semiconductor devices |
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