CN111813599B - Solid-state storage device, server main board and control method - Google Patents
Solid-state storage device, server main board and control method Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1415—Saving, restoring, recovering or retrying at system level
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4406—Loading of operating system
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Abstract
The application provides a solid-state storage device, a server main board and a control method, and relates to the technical field of integrated circuits, wherein the solid-state storage device comprises an NVMe module, a SATA module and a first multiplexing interface connected with the NVMe module and the SATA module; the NVMe module is provided with a first operating system, and the SATA module is provided with a second operating system; the first multiplexing interface is used for being connected with the server mainboard and receiving a first PCIe signal or SATA signal sent by a CPU of the server mainboard; the first multiplexing interface is specifically configured to send a first PCIe signal to the NVMe module when the first PCIe signal is received, where the first PCIe signal is used to trigger the first operating system to start; the first multiplexing interface is specifically further configured to send a SATA signal to the SATA module when the SATA signal is received, where the SATA signal is used to trigger the second operating system to be started. According to the application, the main system and the standby system are arranged in the solid-state storage device, so that the system reliability is improved.
Description
Technical Field
The application belongs to the technical field of computers, and particularly relates to solid-state storage equipment, a server main board and a control method.
Background
With the rapid development of computer technology and storage technology, the application of solid state disk is becoming more and more popular. The computer may configure the solid state disk to enhance performance. For example, an operating system is usually installed in the solid state disk, and when the computer is started, a server in the computer loads the operating system in the solid state disk through an input/output system (Basic Input Output System, BIOS) program and starts the operating system. This greatly increases the processing speed of the computer.
However, in the process of adopting the solid state disk, the loading failure of the operating system in the solid state disk may occur, and the operating system cannot be started, so that the computer cannot be used normally.
Disclosure of Invention
The embodiment of the application provides solid-state storage equipment, a server main board and a control method, which can solve the problem that a computer cannot be normally used due to loading failure of an operating system in a solid-state disk in the related technology.
In order to solve the technical problems, the application adopts the following technical scheme:
In a first aspect, embodiments of the present application provide a solid state storage device including a fast Non-volatile storage (Non-Volatile Memory Express, NVMe) module, a serial advanced technology attachment (SERIAL ADVANCED Technology Attachment, SATA) module, and a first multiplexing interface connected to the NVMe module and the SATA module; the NVMe module is provided with a first operating system, and the SATA module is provided with a second operating system;
The first multiplexing interface is used for being connected with a server main board and receiving a first peripheral component interconnect express (PERIPHERAL COMPONENT INTERCONNECT EXPRESS, PCIe) signal or a SATA signal sent by a Central Processing Unit (CPU) of the server main board;
The first multiplexing interface is specifically configured to send the first PCIe signal to the NVMe module when the first PCIe signal is received, where the first PCIe signal is used to trigger the first operating system to start up; the first multiplexing interface is specifically further configured to send the SATA signal to the SATA module when the SATA signal is received, where the SATA signal is used to trigger the second operating system to be started.
In a possible implementation manner of the first aspect, the NVMe module includes an NVMe controller and a first storage unit, the first operating system is installed in the first storage unit, and the NVMe controller is configured to control, when receiving the first PCIe signal, the first operating system to be started according to the first PCIe signal;
The SATA module comprises a SATA controller and a second storage unit, wherein the second operating system is installed in the second storage unit, and the SATA controller is used for controlling the second operating system to start according to the SATA signal under the condition that the SATA signal is received.
In a possible implementation manner of the first aspect, the solid-state storage device further includes a first PCIe interface connected to the NVMe module;
The first PCIe interface is used for receiving a second PCIe signal and sending the second PCIe signal to the NVMe module, and the second PCIe signal is used for triggering the first operating system to start.
In a possible implementation manner of the first aspect, the SATA module further stores verification information set for read/write protection of the NVMe module.
In a second aspect, an embodiment of the present application provides a server motherboard, where the server motherboard includes a central processing unit CPU, a signal switching module, and a second multiplexing interface, where the signal switching module is disposed between the CPU and the second multiplexing interface;
The CPU is used for sending a first peripheral component interconnect express PCIe signal, a serial advanced technology attachment SATA signal and a switching control signal to the signal switching module;
the signal switching module is used for switchably transmitting the first PCIe signal or the SATA signal to the second multiplexing interface according to the received switching control signal;
The second multiplexing interface is used for being connected with a solid-state storage device and transmitting the first PCIe signal or the SATA signal transmitted by the signal switching module to the solid-state storage device.
In a possible implementation manner of the second aspect, the first PCIe signal is used to trigger a first operating system installed in the solid-state storage device to boot, and the SATA signal is used to trigger a second operating system installed in the solid-state storage device to boot.
In a possible implementation manner of the second aspect, the server motherboard further includes a first data channel disposed between the signal switching module and the CPU, and a second data channel disposed between the signal switching module and the second multiplexing interface;
The first data channel comprises a first PCIe channel and a SATA channel, wherein the first PCIe channel is used for transmitting the first PCIe signal, and the SATA channel is used for transmitting the SATA signal; the second data channel is used for transmitting the first PCIe signal or the SATA signal.
In a possible implementation manner of the second aspect, the server motherboard further includes a second PCIe interface and a second PCIe channel disposed between the CPU and the second PCIe interface;
The second PCIe channel is used for transmitting a second PCIe signal sent by the CPU to the second PCIe interface;
The second PCIe interface is used for being connected with the solid-state storage device and transmitting the received second PCIe signal to the solid-state storage device.
In one possible implementation manner of the second aspect, the number of lanes of the second PCIe lane is greater than or equal to the number of lanes of the first PCIe lane.
In a third aspect, an embodiment of the present application provides a control method applied to a server motherboard connected to a solid state storage device, where the solid state storage device includes a fast nonvolatile storage NVMe module, a serial advanced technology attachment SATA module, and a first multiplexing interface; a first operating system is installed in the NVMe module, and a second operating system is installed in the SATA module; the server main board comprises a Central Processing Unit (CPU), a signal switching module and a second multiplexing interface, the server main board and the solid-state storage equipment are mutually communicated through the first multiplexing interface and the second multiplexing interface, and the method comprises the following steps:
The CPU sends a first peripheral component interconnect express (PCI) signal to the NVMe module, and controls the first operating system to start according to the first PCIe signal;
And under the condition that the first operating system is failed to start, the CPU sends a first SATA signal to the SATA module and controls the second operating system to start according to the first SATA signal.
In a possible implementation manner of the third aspect, before the CPU sends a first PCIe signal to the NVMe module and controls the first operating system to start according to the first PCIe signal, the method further includes:
The CPU acquires verification information stored in the SATA module, wherein the verification information is information set for read-write protection of the NVMe module;
The CPU sends a first PCIe signal to the NVMe module, controls the first operating system to start according to the first PCIe signal, and comprises the following steps:
The CPU sends the first PCIe signal to the NVMe module, wherein the first PCIe signal comprises the check information and system start indication information;
And under the condition that the verification information is matched with preset information, the CPU controls the first operating system to start according to the system start indication information.
In a possible implementation manner of the third aspect, the method further includes:
the CPU sends the first PCIe signal, the SATA signal and a switching control signal to the signal switching module;
And controlling the signal switching module to switchably transmit the first PCIE signal or the SATA signal according to the switching control signal.
In a fourth aspect, an embodiment of the present application provides an electronic device including a processor, a memory, and a computer program stored on the memory and executable on the processor, the computer program implementing the steps of the control method in the first aspect when executed by the processor.
In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the control method in the first aspect described above.
In a sixth aspect, an embodiment of the present application provides a computer program product, which, when run on a terminal device, causes the terminal device to perform the control method according to any one of the first aspects above.
It will be appreciated that the advantages of the second to sixth aspects may be found in the relevant description of the first aspect, and are not described here again.
Compared with the related art, the embodiment of the application has the beneficial effects that:
According to the technical scheme provided by the embodiment of the application, the two modules, namely the NVMe module and the SATA module, are arranged in the solid-state storage device and are respectively used for storing the first operating system and the second operating system, one operating system can be selectively started when the server is started according to actual use requirements, for example, the first operating system in the NVMe module is started by default, and the second operating system in the SATA module can be switched and started under the condition that the loading of the first operating system fails, so that the stability and the reliability of the system can be improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of a solid state storage device according to an embodiment of the present application;
FIG. 2 is a schematic diagram of a solid state storage device according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a solid state storage device according to an embodiment of the present application;
Fig. 4 is a schematic structural diagram of a server motherboard according to an embodiment of the present application;
fig. 5 is a schematic structural diagram of a server motherboard according to another embodiment of the present application;
FIG. 6 is a flow chart of a control method according to an embodiment of the present application;
FIG. 7 is a flow chart of a control method according to another embodiment of the present application;
Fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It should also be understood that the term "and/or" as used in the present specification and the appended claims refers to any and all possible combinations of one or more of the associated listed items, and includes such combinations.
As used in the present description and the appended claims, the term "if" may be interpreted as "when..once" or "in response to a determination" or "in response to detection" depending on the context.
Furthermore, the terms "first," "second," "third," and the like in the description of the present specification and in the appended claims, are used for distinguishing between descriptions and not necessarily for indicating or implying a relative importance.
Reference in the specification to "one embodiment" or "some embodiments" or the like means that a particular feature, structure, or characteristic described in connection with the embodiment is included in one or more embodiments of the application. Thus, appearances of the phrases "in one embodiment," "in some embodiments," "in other embodiments," and the like in the specification are not necessarily all referring to the same embodiment, but mean "one or more but not all embodiments" unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise.
The embodiment of the application provides a solid-state storage device, a server main board and a control method, wherein the solid-state storage device comprises an NVMe module, a SATA module and a first multiplexing interface connected with the NVMe module and the SATA module; the NVMe module is provided with a first operating system, and the SATA module is provided with a second operating system; the first multiplexing interface is used for being connected with the server mainboard and receiving a first PCIe signal or SATA signal sent by a CPU of the server mainboard; the first multiplexing interface is specifically configured to send a first PCIe signal to the NVMe module when the first PCIe signal is received, where the first PCIe signal is used to trigger the first operating system to start; the first multiplexing interface is specifically further configured to send a SATA signal to the SATA module when the SATA signal is received, where the SATA signal is used to trigger the second operating system to be started. In the embodiment of the application, by arranging two modules, namely the NVMe module and the SATA module, in the solid-state storage device, the two modules are respectively used for storing the first operating system and the second operating system, one of the operating systems can be selectively started when the server is started according to actual use requirements, for example, the first operating system in the NVMe module is started by default, and the second operating system in the SATA module can be switched and started under the condition that the loading of the first operating system fails, so that the stability and the reliability of the system can be improved.
The solid state storage device provided by the embodiments of the present application is described below with reference to the accompanying drawings.
Fig. 1 shows a schematic structural diagram of a solid-state storage device according to an embodiment of the present application. As shown in fig. 1, the solid-state storage device 1 includes an NVMe module 10, a SATA module 11, and a first multiplexing interface 12 connected to the NVMe module and the SATA module; the NVMe module 10 is provided with a first operating system, and the SATA module 11 is provided with a second operating system. The first operating system and the second operating system may be the same or different, and may be specifically determined according to actual use requirements, which is not limited by the embodiment of the present application.
The first operating system may be a primary operating system and the second operating system may be a backup operating system, for example. Typically, by default, the first operating system is started; or if special conditions (such as the start failure of the first operating system, etc.) are met, the second operating system is started, so that the reliability and the stability of the system can be ensured.
It should be noted that, the first PCIe signal is a signal that is transmitted through a PCIe channel and conforms to an NVMe protocol. SATA signals are signals transmitted over SATA channels conforming to the advanced host controller interface (Advanced Host Controller Interface, AHCI) protocol.
The first multiplexing interface 12 is configured to connect to the server motherboard and receive a first PCIe signal or SATA signal sent by a central processing unit CPU of the server motherboard. That is, the solid-state storage device 1 is connected to a server motherboard (e.g., server motherboard 2 described below) through the first multiplexing interface 12, and the first multiplexing interface 12 transmits the first PCIe signal or SATA signal to a corresponding module in the solid-state storage device 1 when receiving the first PCIe signal or SATA signal transmitted by the central processing unit CPU of the server motherboard. In this way, the first multiplexing interface 12 can transmit signals of different protocols, thereby improving the compatibility of the solid-state storage device.
The first multiplexing interface 12 is specifically configured to send a first PCIe signal to the NVMe module 10 when receiving the first PCIe signal, where the first PCIe signal is used to trigger the first operating system to start. The first multiplexing interface 12 is specifically further configured to send a SATA signal to the SATA module 11 when receiving the SATA signal, where the SATA signal is used to trigger the second operating system to be started. Therefore, one of the operating systems can be selectively started when the server is started according to actual use requirements.
For example, assuming that the first operating system is started by default, if the server is started under the condition that the solid-state storage device is connected with the server main board, the CPU of the server main board sends a first PCIe signal to the solid-state storage device, and instructs the solid-state storage device to start the first operating system; correspondingly, after the solid-state storage device receives the first PCIe signal through the first multiplexing interface, the solid-state storage device may perform read-write operation on the NVMe module, and further may start the first operating system in the NVMe module according to indication information of the first PCIe signal.
For another example, in the case of a failure in starting the first operating system, the CPU of the server motherboard sends a SATA signal to the solid storage device, instructing the solid storage device to start the second operating system; correspondingly, after receiving the SATA signal through the first multiplexing interface, the solid storage device may perform read/write operation on the SATA module, and further may start a second operating system in the SATA module according to the indication information of the SATA signal.
Therefore, under the condition that the starting of the main operating system fails, the standby operating system can be switched and started without influencing the use of the system, so that the reliability and the stability of the system can be ensured.
It should be noted that the Solid state storage device may be a Solid state disk (Solid STATE DISK, SSD), or may be any other possible storage device, which may be specifically determined according to actual use requirements, and the embodiment of the present application is not limited.
According to the solid-state storage device provided by the embodiment of the application, the two modules, namely the NVMe module and the SATA module, are arranged in the solid-state storage device and are respectively used for storing the first operating system and the second operating system, one operating system can be selectively started when the server is started according to actual use requirements, for example, the first operating system in the NVMe module is started by default, and the second operating system in the SATA module can be switched and started under the condition that the loading of the first operating system fails, so that the stability and the reliability of the system can be improved.
Alternatively, referring to fig. 1, as shown in fig. 2, the NVMe module 10 includes an NVMe controller 101 and a first storage unit 102, and the first operating system is installed in the first storage unit 102. The NVMe controller 101 is connected to the first multiplexing interface 12, and the NVMe controller 101 is configured to control, when receiving the first PCIe signal, the first operating system to be started according to the first PCIe signal.
As shown in fig. 2, SATA module 11 includes SATA controller 111 and second storage unit 112, and the second operating system is installed in second storage unit 112. The SATA controller 111 is connected to the first multiplexing interface 12, and the SATA controller 111 is configured to control the start of the second operating system according to the SATA signal when the SATA signal is received.
The first storage unit and the second storage unit may be storage particles having a certain storage capacity.
Optionally, in conjunction with fig. 1, as shown in fig. 3, the solid-state storage device 1 further includes a first PCIe interface 13 connected to the NVMe module 10. The first PCIe interface 13 is configured to receive a second PCIe signal, and send the second PCIe signal to the NVMe module, where the second PCIe signal is used to trigger the first operating system to start.
It should be noted that, PCIe signals supported by the first PCIe interface may be the same as or different from PCIe signals supported by the first multiplexing interface.
Illustratively, the PCIe signal supported by the first multiplexing interface may be a PCIe signal transmitted through a pcie×1 bus, and the PCIe signal supported by the first PCIe interface may be a PCIe signal transmitted through a pcie×3 bus.
It should be further noted that, the first PCIe interface and the first multiplexing interface may be integrated, or may be independently provided, and may specifically be determined according to actual use requirements, which is not limited by the embodiment of the present application.
Therefore, the solid-state storage device can be compatible with PCIe signals transmitted through different PCIe buses by setting different interfaces, and the compatibility of the solid-state storage device can be improved.
Optionally, the SATA module further stores verification information set for performing read/write protection on the NVMe module. The verification information may be a password, identification information, or any other information meeting the actual use requirement, and specifically may be determined according to the actual use requirement, which is not limited by the embodiment of the present application.
For example, in the case of implementing read-write protection (e.g. encryption) on the NVMe module, the verification information may be invoked and verified, and in the case of successful verification, the read-write protection on the NVMe module may be released, i.e. the read-write operation may be performed on the NVMe module.
In the embodiment of the application, in the solid-state storage device, each of the NVME controller and the SATA controller has respective storage particles, so that the storage space is divided and utilized. By physically partitioning the storage space, the verification information and the backup information can be more safely protected from being destroyed and stolen. In this way, system security may be improved.
Based on the above solid-state storage device, the embodiment of the present application further provides a server motherboard applied in combination with the solid-state storage device, and the structure and the function of the server motherboard are exemplarily described below with reference to the accompanying drawings. For convenience of explanation, only portions relevant to the embodiments of the present application are shown.
Fig. 4 shows a schematic structural diagram of a server motherboard according to an embodiment of the present application. As shown in fig. 4, the server main board 2 includes a central processing unit CPU 20, a signal switching module 21, and a second multiplexing interface 22, the signal switching module 21 being disposed between the CPU 20 and the second multiplexing interface 22.
The CPU 20 is configured to send a first peripheral component interconnect express PCIe signal, a serial advanced technology attachment SATA signal, and a switch control signal to the signal switching module 21.
The switching control signal may be a level signal or an indication information, and may be specifically determined according to actual use requirements, which is not limited by the embodiment of the present application. For example, the switch control signal may be a 0 signal or a1 signal, where the 0 signal is used to indicate that the SATA signal is output, and the 1 signal is used to indicate that the first PCIe signal is output. It should be noted that the switching control signal may be transmitted through a General-purpose input/output (GPIO) interface.
The signal switching module 21 is configured to switchably transmit the first PCIe signal or SATA signal to the second multiplexing interface 22 according to the received switching control signal.
The signal switching module can be a high-speed switch, and can switch signals according to the received switching control signals. For example, if the signal switching module receives a 0 signal, outputting a SATA signal; and if the signal switching module receives the 1 signal, outputting a first PCIe signal.
The second multiplexing interface 22 is configured to connect to the solid-state storage device 1, and transmit the first PCIe signal or SATA signal transmitted by the signal switching module 21 to the solid-state storage device 1.
As shown in fig. 4, in the case where the second multiplexing interface 22 is connected to the first multiplexing interface 12, the server main board 2 and the solid-state storage device 1 can communicate with each other.
Optionally, the second multiplexing interface may be an m.2 interface. Because the m.2 interface has the advantages of compatibility with various communication protocols, small volume, high transmission rate and the like, the existing server main board generally designs the m.2 interface to expand the storage performance, and the related art discloses that the server main board designs two m.2 interfaces to expand the storage performance. Compared with the related art, the second multiplexing interface in the embodiment of the application can support the signals conforming to the AHCI protocol and the signals conforming to the NVMe protocol, thereby improving the compatibility.
Optionally, the first PCIe signal is used to trigger a first operating system installed in the solid-state storage device to boot, and the SATA signal is used to trigger a second operating system installed in the solid-state storage device to boot.
Optionally, the server motherboard further includes a first data channel disposed between the signal switching module and the CPU, and a second data channel disposed between the signal switching module and the second multiplexing interface.
As shown in fig. 4, the first data channel includes a first PCIe channel for transmitting first PCIe signals and a SATA channel for transmitting SATA signals. The second data channel is used to transmit the first PCIe signal or SATA signal.
Optionally, referring to fig. 3 and fig. 4, as shown in fig. 5, the server motherboard 2 further includes a second PCIe interface 23 and a second PCIe channel disposed between the CPU 20 and the second PCIe interface 23. The second PCIe channel is configured to transmit a second PCIe signal sent by the CPU 20 to the second PCIe interface 23.
As shown in fig. 5, the second PCIe interface 23 is configured to connect with the first PCIe interface 13 of the solid-state storage device 1, and transmit the received second PCIe signal to the solid-state storage device 1.
It should be noted that, the second PCIe interface 23 and the second multiplexing interface 22 may be integrated, or may be independently provided, and may specifically be determined according to actual use requirements, which is not limited by the embodiment of the present application.
Optionally, the number of lanes of the second PCIe lane is greater than or equal to the number of lanes of the first PCIe lane.
Illustratively, the number of lanes of the second PCIe lane is 12 (corresponding to PCIe 3) and the number of lanes of the first PCIe lane is 4 (corresponding to PCIe 1).
In the embodiment of the application, the first PCIe signal and the SATA signal are multiplexed into the same interface (namely the second multiplexing interface), and the second PCIe signal is transmitted through the second PCIe interface, so that signals with different protocols can be transmitted through different interfaces, PCIe signals with different numbers of PCIe buses can be transmitted, and the structure of the server main board provided by the embodiment of the application can improve the compatibility of solid-state storage equipment.
Optionally, a conversion module for converting PCIe signals into SATA signals may be further disposed between the CPU and the high-speed switch. Under the condition that no SATA signal is output, the CPU can output PCIe signals to the conversion module, and the conversion module converts the PCIe signals into SATA signals, so that the generation of the SATA signals can be ensured.
The above embodiments of the present application describe a solid state storage device and a server motherboard. The solid-state storage device comprises an NVMe module, a SATA module and a first multiplexing interface, wherein a first operating system is installed in the NVMe module, and a second operating system is installed in the SATA module. The server main board comprises a Central Processing Unit (CPU), a signal switching module and a second multiplexing interface, and is communicated with the solid-state storage device through the first multiplexing interface and the second multiplexing interface. Based on the server motherboard and the solid-state storage device provided in the foregoing embodiments, the embodiment of the present application further provides a method for controlling the solid-state storage device by the server motherboard, and the control method is described in an exemplary manner with reference to the accompanying drawings.
Fig. 6 shows a flow chart of a control method according to an embodiment of the present application. As shown in fig. 6, the method includes steps S301 and S302 described below.
S301, the CPU sends a first PCIe signal to the NVMe module, and the first operating system is controlled to be started according to the first PCIe signal.
S301, under the condition that the first operating system is started up and fails, the CPU sends a first SATA signal to the SATA module, and controls the second operating system to be started up according to the first SATA signal.
In the embodiment of the application, the first operating system is assumed to be started by default, and then if the server is started under the condition that the solid-state storage device is connected with the server main board, the CPU of the server main board sends a first PCIe signal to the solid-state storage device to instruct the solid-state storage device to start the first operating system; correspondingly, after receiving the first PCIe signal, the solid-state storage device may perform read-write operations on the NVMe module, and further may start the first operating system in the NVMe module according to the indication information of the first PCIe signal.
Under the condition that the first operating system fails to start, a CPU of a server main board sends a SATA signal to the solid-state storage device to instruct the solid-state storage device to start a second operating system; correspondingly, after receiving the SATA signal, the solid storage device may perform read/write operation on the SATA module, and further may start a second operating system in the SATA module according to the indication information of the SATA signal.
Therefore, under the condition that the starting of the main operating system fails, the standby operating system can be switched and started without influencing the use of the system, so that the reliability and the stability of the system can be ensured.
Optionally, in conjunction with fig. 6, as shown in fig. 7, before step S301, the control method provided in the embodiment of the present application further includes the following step S303.
S303, the CPU acquires the verification information stored in the SATA module.
The verification information is information set for read-write protection of the NVMe module. For example, the verification information may be a password set for read-write protection for the NVMe module.
Further, in combination with the step S303, the step S301 may specifically include steps S301A and S301B described below.
S301A, CPU sends a first PCIe signal to the NVMe module, wherein the first PCIe signal comprises verification information and system start indication information.
The system start indication information is used for indicating to start the first operating system.
For example, when the SSD installs the initial operating system, the operating system may be installed on the NVME module, and the cryptographically protecting NVME module reads and writes, e.g., generates a corresponding password, and saves (e.g., dispersedly saves) the password in the SATA module. Therefore, the method can effectively prevent illegal personnel from stealing the information in the SSD after acquiring the SSD, and can ensure the safety and reliability of the SSD to a great extent.
And S301B, controlling the first operating system to start according to the system start instruction information by the CPU under the condition that the verification information is matched with the preset information.
In the embodiment of the application, after the acquired verification information is verified, if the verification is successful, the CPU controls the first operating system to start according to the system start indication information.
Optionally, the control method provided by the embodiment of the present application further includes the following steps S304 and S305.
S304, the CPU sends a first PCIe signal, a SATA signal and a switching control signal to the signal switching module.
S305, according to the switching control signal, the signal switching module is controlled to switchably transmit the first PCIE signal or the SATA signal.
For a specific description of the switch control module and how to switch signals through the switch control module, reference may be made to the detailed description of the switch control module in the embodiment of the server motherboard, which is not repeated herein.
For example, the server motherboard may be a basic input output system (Basic Input Output System, BIOS) chip, and accordingly, the control method may be performed by a BIOS program set for the BIOS chip.
It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present application.
It should be noted that, because the content of information interaction and execution process between the above devices/units is based on the same concept as the method embodiment of the present application, specific functions and technical effects thereof may be referred to in the method embodiment section, and will not be described herein.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-described division of the functional units and modules is illustrated, and in practical application, the above-described functional distribution may be performed by different functional units and modules according to needs, i.e. the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-described functions. The functional units and modules in the embodiment may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit, where the integrated units may be implemented in a form of hardware or a form of a software functional unit. In addition, the specific names of the functional units and modules are only for distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working process of the units and modules in the above system may refer to the corresponding process in the foregoing method embodiment, which is not described herein again.
As shown in fig. 8, an embodiment of the present application further provides an electronic device, including: at least one processor 60, a memory 61 and a computer program 62 stored in the memory 61 and executable on the at least one processor 60, the processor 60 implementing the steps of any of the various method embodiments described above when executing the computer program 62.
Embodiments of the present application also provide a computer readable storage medium storing a computer program which, when executed by a processor, implements steps for implementing the various method embodiments described above.
Embodiments of the present application provide a computer program product which, when run on an electronic device, causes the electronic device to perform steps that may be carried out in the various method embodiments described above.
The integrated units described above, if implemented in the form of software functional units and sold or used as stand-alone products, may be stored in a computer readable storage medium. Based on such understanding, the present application may implement all or part of the flow of the method of the above-described embodiments, and may be implemented by a computer program to instruct related hardware, where the computer program may be stored in a computer readable storage medium, and when the computer program is executed by a processor, the computer program may implement the steps of the method embodiments described above. Wherein the computer program comprises computer program code which may be in the form of source code, object code, executable files or in some intermediate form, etc. The computer readable medium may include at least: any entity or device capable of carrying computer program code to a photographing device/terminal apparatus, recording medium, computer Memory, read-Only Memory (ROM), random access Memory (RAM, random Access Memory), electrical carrier signals, telecommunications signals, and software distribution media. Such as a U-disk, removable hard disk, magnetic or optical disk, etc. In some jurisdictions, computer readable media may not be electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and in part, not described or illustrated in any particular embodiment, reference is made to the related descriptions of other embodiments.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus/electronic device and method may be implemented in other manners. For example, the apparatus/electronic device embodiments described above are merely illustrative, e.g., the division of modules or units described above is merely a logical functional division, and there may be additional divisions in actual implementation, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. Alternatively, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection via interfaces, devices or units, which may be in electrical, mechanical or other forms.
The units described above as separate components may or may not be physically separate, and components shown as units may or may not be physical units, may be located in one place, or may be distributed over a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
The above embodiments are only for illustrating the technical solution of the present application, and are not limiting; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present application, and are intended to be included in the scope of the present application.
Claims (13)
1. A solid state storage device comprising a fast nonvolatile storage NVMe module, a serial advanced technology attachment SATA module, and a first multiplexing interface connected to the NVMe module and the SATA module; the NVMe module is provided with a first operating system, and the SATA module is provided with a second operating system;
the first multiplexing interface is used for being connected with a server main board and receiving a first peripheral component interconnect express PCIe signal or a SATA signal sent by a central processing unit CPU of the server main board;
The first multiplexing interface is specifically configured to send the first PCIe signal to the NVMe module when the first PCIe signal is received, where the first PCIe signal is used to trigger the first operating system to start up; the first multiplexing interface is specifically further configured to send the SATA signal to the SATA module when the SATA signal is received, where the SATA signal is used to trigger the second operating system to be started.
2. The solid state storage device of claim 1, wherein the NVMe module comprises an NVMe controller and a first storage unit, the first operating system is installed in the first storage unit, and the NVMe controller is configured to control the first operating system to start according to the first PCIe signal if the first PCIe signal is received;
The SATA module comprises a SATA controller and a second storage unit, wherein the second operating system is installed in the second storage unit, and the SATA controller is used for controlling the second operating system to start according to the SATA signal under the condition that the SATA signal is received.
3. The solid state storage device of claim 1 or 2, further comprising a first PCIe interface connected to the NVMe module;
The first PCIe interface is used for receiving a second PCIe signal and sending the second PCIe signal to the NVMe module, and the second PCIe signal is used for triggering the first operating system to start.
4. The solid state storage device of claim 1 or 2, wherein the SATA module further stores verification information set for read/write protection of the NVMe module.
5. The server main board is characterized by comprising a Central Processing Unit (CPU), a signal switching module and a second multiplexing interface, wherein the signal switching module is arranged between the CPU and the second multiplexing interface;
The CPU is used for sending a first peripheral component interconnect express PCIe signal, a serial advanced technology attachment SATA signal and a switching control signal to the signal switching module;
the signal switching module is used for switchably transmitting the first PCIe signal or the SATA signal to the second multiplexing interface according to the received switching control signal;
the second multiplexing interface is used for being connected with the solid-state storage device and transmitting the first PCIe signal or the SATA signal transmitted by the signal switching module to the solid-state storage device;
The first PCIe signal is used for triggering the start-up of a first operating system installed in the solid-state storage device, and the SATA signal is used for triggering the start-up of a second operating system installed in the solid-state storage device.
6. The server motherboard of claim 5, further comprising a first data channel disposed between said signal switching module and said CPU, and a second data channel disposed between said signal switching module and said second multiplexing interface;
The first data channel comprises a first PCIe channel and a SATA channel, wherein the first PCIe channel is used for transmitting the first PCIe signal, and the SATA channel is used for transmitting the SATA signal; the second data channel is used for transmitting the first PCIe signal or the SATA signal.
7. The server motherboard of claim 5 or 6, further comprising a second PCIe interface and a second PCIe lane disposed between the CPU and the second PCIe interface;
The second PCIe channel is used for transmitting a second PCIe signal sent by the CPU to the second PCIe interface;
The second PCIe interface is used for being connected with the solid-state storage device and transmitting the received second PCIe signal to the solid-state storage device.
8. The server motherboard of claim 7, wherein the number of lanes of the second PCIe lane is greater than or equal to the number of lanes of the first PCIe lane.
9. The control method is applied to a server main board connected with solid-state storage equipment, and is characterized in that the solid-state storage equipment comprises a rapid nonvolatile storage NVMe module, a serial advanced technology attachment SATA module and a first multiplexing interface; a first operating system is installed in the NVMe module, and a second operating system is installed in the SATA module; the server main board comprises a Central Processing Unit (CPU), a signal switching module and a second multiplexing interface, the server main board and the solid-state storage equipment are mutually communicated through the first multiplexing interface and the second multiplexing interface, and the method comprises the following steps:
The CPU sends a first peripheral component interconnect express (PCI) signal to the NVMe module, and controls the first operating system to start according to the first PCIe signal;
And under the condition that the first operating system is failed to start, the CPU sends a first SATA signal to the SATA module and controls the second operating system to start according to the first SATA signal.
10. The method of claim 9, wherein before the CPU sends a first PCIe signal to the NVMe module, controlling the first operating system to boot according to the first PCIe signal, the method further comprises:
The CPU acquires verification information stored in the SATA module, wherein the verification information is information set for read-write protection of the NVMe module;
The CPU sends a first PCIe signal to the NVMe module, controls the first operating system to start according to the first PCIe signal, and comprises the following steps:
The CPU sends the first PCIe signal to the NVMe module, wherein the first PCIe signal comprises the check information and system start indication information;
And under the condition that the verification information is matched with preset information, the CPU controls the first operating system to start according to the system start indication information.
11. The method according to claim 9 or 10, characterized in that the method further comprises:
the CPU sends the first PCIe signal, the SATA signal and a switching control signal to the signal switching module;
And controlling the signal switching module to switchably transmit the first PCIE signal or the SATA signal according to the switching control signal.
12. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the method according to any of claims 9 to 11 when executing the computer program.
13. A computer readable storage medium storing a computer program, characterized in that the computer program when executed by a processor implements the method according to any one of claims 9 to 11.
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| CN113342727A (en) * | 2021-06-28 | 2021-09-03 | 深圳市商汤科技有限公司 | Signal transmission device, method, computer equipment and storage medium |
| CN114385527B (en) * | 2021-12-31 | 2024-07-02 | 南京微智新科技有限公司 | Control method and main board of hard disk compatible platform |
| CN114780468B (en) * | 2022-04-28 | 2023-08-11 | 北京百度网讯科技有限公司 | Server carrier plate, data communication method, server main board, system and medium |
| CN115951942B (en) * | 2023-03-09 | 2023-05-12 | 湖南博匠信息科技有限公司 | Method and system for improving operation efficiency of Loongson platform system disk |
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