CN111796199B - Power supply network uniformity and power consumption testing method - Google Patents
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Abstract
Description
技术领域technical field
本发明涉及一种电源网络均匀性及功耗测试方法。The invention relates to a method for testing the uniformity and power consumption of a power supply network.
背景技术Background technique
芯片签核(signoff)时不仅静态时序分析(STA)要满足设计要求,电压降(IRdrop)也要满足设计要求。由于实际的系统电源要经过印刷电路板(PCB)以及封装而至芯片表面的凸块(bump)后,再经由与凸块接触的焊垫以及芯片内部的电源网络(power mesh)才能为芯片内部的电路供电,在这一系列电源分配网络上会产生系统电源平面噪声以及导通电压降。因此,芯片签核包括了电压降的签核,但不同电路设计厂商的电压降的标准可能会有差异。During chip signoff, not only static timing analysis (STA) must meet the design requirements, but also the voltage drop (IRdrop) must also meet the design requirements. Since the actual system power supply goes through the printed circuit board (PCB) and the package to the bumps on the chip surface, and then through the pads in contact with the bumps and the power mesh inside the chip to supply power to the chip. The circuit power supply of the system will generate system power plane noise and conduction voltage drop on this series of power distribution networks. Therefore, the chip signoff includes the signoff of the voltage drop, but the voltage drop standards of different circuit design manufacturers may be different.
经过电压降后,芯片上各处一般电路单元所接收的电压会产生较大的差异,进而导致一般电路单元的延迟时间与硅前验证(pre-silicon)的结果出现差异,而使整体电路无法达到预期效能。因此,我们有必要预先对电源网络的均匀性以及电源网络的最大承载功耗进行测试,以更好地设计出合格的电源网络。After the voltage drop, the voltage received by the general circuit units on the chip will have a large difference, which will lead to the difference between the delay time of the general circuit unit and the result of the pre-silicon verification (pre-silicon), so that the overall circuit cannot achieve expected performance. Therefore, it is necessary for us to test the uniformity of the power network and the maximum load power consumption of the power network in advance, so as to better design a qualified power network.
发明内容Contents of the invention
本发明提出了一种电源网络均匀性及功耗测试方法,能够确认电源网络是否均匀,并有效的测试设计的电源网络是否足以承载设计的功率损耗。The invention proposes a method for testing the uniformity and power consumption of a power supply network, which can confirm whether the power supply network is uniform, and effectively test whether the designed power supply network is sufficient to bear the designed power loss.
有鉴于此,本发明提出一种电源网络均匀性及功耗测试测试方法,包括利用多个一般电路单元布满测试电路;利用电源网络对每一所述一般电路单元提供供应电压;指定每一所述一般电路单元的功耗;计算所述测试电路的功耗密度以及所述一般电路单元的功耗密度;以及判断所述测试电路的功耗密度与所述一般电路单元的功耗密度是否相同,其中当所述测试电路的功耗密度与所述一般电路单元的功耗密度相同时,判断所述电源网络是否均匀,当所述测试电路的功耗密度与所述一般电路单元的功耗密度不同时,代表运行所述测试方法的工具发生故障。In view of this, the present invention proposes a test method for power network uniformity and power consumption, including using a plurality of general circuit units to fill the test circuit; using the power network to provide a supply voltage for each of the general circuit units; specifying each The power consumption of the general circuit unit; calculating the power consumption density of the test circuit and the power consumption density of the general circuit unit; and judging whether the power consumption density of the test circuit and the power consumption density of the general circuit unit are same, wherein when the power consumption density of the test circuit is the same as that of the general circuit unit, it is judged whether the power supply network is uniform; Different consumption densities indicate a failure of the tool running the test method.
附图说明Description of drawings
图1为本发明一实施例所述的测试电路100的示意图;FIG. 1 is a schematic diagram of a
图2A为本发明一实施例所述的电源网络200的示意图;FIG. 2A is a schematic diagram of a
图2B为图2A的区块210的立体示意图;FIG. 2B is a three-dimensional schematic diagram of the
图3为本发明一实施例所述的测试方法300的流程图;FIG. 3 is a flowchart of a
图4为本发明一实施例所述的判断电源网络是否均匀的方法400的流程图;FIG. 4 is a flowchart of a
图5为本发明另一实施例所述的判断电源网络是否均匀的方法500的流程图;FIG. 5 is a flowchart of a
图6为本发明一实施例所述的判断一般电路单元的电源电压降是否均匀的方法600的流程图;以及FIG. 6 is a flowchart of a
图7为本发明另一实施例所述的判断一般电路单元的电源电压降是否均匀的方法700的流程图。FIG. 7 is a flowchart of a
具体实施方式detailed description
以下说明为本发明的实施例。其目的是要举例说明本发明一般性的原则,不应视为本发明的限制,本发明的范围当以权利要求书所界定者为准。The following descriptions are examples of the present invention. Its purpose is to illustrate the general principle of the present invention and should not be regarded as a limitation of the present invention. The scope of the present invention should be defined by the claims.
能理解的是,虽然在此可使用用语“第一”、“第二”、“第三”等来叙述各种组件、组成成分、区域、层、和/或部分,这些组件、组成成分、区域、层、和/或部分不应被这些用语限定,且这些用语仅是用来区别不同的组件、组成成分、区域、层、和/或部分。因此,以下讨论的一第一组件、组成成分、区域、层、和/或部分可在不偏离本公开一些实施例的教示的情况下被称为一第二组件、组成成分、区域、层、和/或部分。It can be understood that although the terms "first", "second", "third" and the like may be used herein to describe various components, components, regions, layers, and/or sections, these components, components, Regions, layers, and/or sections should not be limited by these terms, and these terms are only used to distinguish different components, components, regions, layers, and/or sections. Thus, a first component, component, region, layer, and/or section discussed below could be termed a second component, component, region, layer, or section without departing from the teachings of some embodiments of the present disclosure. and/or sections.
值得注意的是,以下所公开的内容可提供多个用以实践本发明的不同特点的实施例或范例。以下所述的特殊的组件范例与安排仅用以简单扼要地阐述本发明的精神,并非用以限定本发明的范围。此外,以下说明书可能在多个范例中重复使用相同的组件符号或文字。然而,重复使用的目的仅为了提供简化并清楚的说明,并非用以限定多个以下所讨论的实施例和/或配置之间的关系。此外,以下说明书所述之一个特征连接至、耦接至和/或形成于另一特征之上等的描述,实际可包含多个不同的实施例,包括该等特征直接接触,或者包含其它额外的特征形成于该等特征之间等等,使得该等特征并非直接接触。It is worth noting that the following disclosure may provide multiple embodiments or examples for practicing different features of the present invention. The specific component examples and arrangements described below are only used to briefly illustrate the spirit of the present invention, and are not intended to limit the scope of the present invention. In addition, the following description may reuse the same component symbols or words in multiple examples. However, the purpose of repeated use is only to provide simplified and clear description, not to limit the relationship between the various embodiments and/or configurations discussed below. Furthermore, descriptions of one feature described in the following specification as being connected to, coupled to, and/or formed on another feature, etc., may actually include many different embodiments, including those features being in direct contact, or including other additional features. The features are formed between the features, etc., such that the features are not in direct contact.
图1为本发明一实施例所述的测试电路100的示意图。如图1所示,测试电路100的面积为X*Y且包括多个一般电路单元120-1、120-2、…、120-N,其中,N为正整数。根据本发明一实施例,以测试电路100耦接电源网络以对电源网络的均匀性及最大承载功耗进行测试,测试电路100中一般电路单元的放置密度(placement density)为100%,放置密度为100%意味着已经布满一般电路单元的测试电路100所在区域(亦即面积为X*Y的区域)再也放不下任何一般电路单元。一般而言,实际电路中,一般电路单元的放置密度约为70%,由于测试电路100的一般电路单元的放置密度较实际应用时耦接电源网络(power mesh)的电路的放置密度更高,因此藉由测试电路100估计的电源网络的最大承载功耗足以支持对实际电路的供电。FIG. 1 is a schematic diagram of a
根据本发明一实施例,测试电路100所包括的一般电路单元120-1~120-N为至少一种,每种一般电路单元是依据功耗确定其面积,也就是说,一般电路单元的功耗越大,则面积越大。每种一般电路单元的面积是一系数与一种虚拟电路单元(基准电路单元)的面积的积,而该种一般电路单元的功耗也是该种基准电路单元的功耗与该系数的积。因而,无论一般电路单元120-1~120-N是否为同一种,单位面积(例如每一基准电路单元的面积)的一般电路单元的功耗值是一样的,而使测试电路100的功耗密度均匀,其中,功耗密度是指单位面积的一般电路单元的功耗。According to an embodiment of the present invention, the
根据本发明一实施例,电路单元可分为一般电路单元以及填充单元(filler),一般电路单元120-1~120-N可为反相器、缓冲器、触发器以及逻辑门等非填充单元的电路单元。由于填充单元不消耗任何功耗,因此可以只使用一般电路单元来布满电路区域110-N,其中,布满是指使一般电路单元的放置密度(placement density)为100%。根据本发明另一实施例,使用一般电路单元来布满电路区域110-N后,也可以再使用填充单元来填满电路区域110-N的缝隙。According to an embodiment of the present invention, the circuit units can be divided into general circuit units and fillers, and the general circuit units 120-1 to 120-N can be non-fillers such as inverters, buffers, flip-flops, and logic gates. circuit unit. Since the filling units do not consume any power consumption, only common circuit units can be used to fill the circuit area 110 -N, wherein full means that the placement density of the common circuit units is 100%. According to another embodiment of the present invention, after filling the circuit region 110 -N with common circuit units, filling units can also be used to fill gaps in the circuit region 110 -N.
此外,测试电路100通过电源网络接收供应电压,例如接收电源电压VDD、VSS,虚拟电源电压,参考电压等。也就是说,通过电源网络对测试电路100中每一一般电路单元120-1~120-N供电。根据本发明一实施例,测试电路100设置在芯片中的至少一层,该芯片还包括设置在其他的至少一个金属层和/或通孔层的电源网络,该至少一个金属层上设置有多段传输各供应电压的电源走线以及通孔,该至少一个通孔层上设置有多个用于走线的通孔。In addition, the
图2A为本发明一实施例所述的电源网络的示意图。如图2A所示,测试电路100耦接电源网络200。电源网络200包括第一金属层M1、第二金属层M2、第七金属层M7、第十一金属层M11、第十二金属层M12以及第十三金属层M13。此外,金属层之间通过穿孔(VIA)进行耦接。FIG. 2A is a schematic diagram of a power network according to an embodiment of the present invention. As shown in FIG. 2A , the
第十三金属层M13耦接多个凸块BUMP,藉由多个凸块BUMP耦接封装的针脚,再通过封装的针脚耦接至印刷电路板上的导线。根据本发明一实施例,电源网络200包括的十三层金属层是用于作为说明解释,本发明并不限定于此。The thirteenth metal layer M13 is coupled to a plurality of bumps BUMP, through which the plurality of bumps BUMP is coupled to pins of the package, and then coupled to wires on the printed circuit board through the pins of the package. According to an embodiment of the present invention, the thirteen metal layers included in the
图2B为图2A的区块210中各层走线的示意图。如图2B所示,第一金属层M1、第二金属层M2、第七金属层M7以及第十一金属层M11分别包括多个段走线,如箭头所例示,供应电压通过这些段走线连成的走线,而对测试电路100中每一一般电路单元进行供电,为方便表述,下文将由段走线连成的走线称为条走线,图2B以箭头线例示的是由多个段走线连成的一条走线,而图2B所示的区块210中各层走线可以连成多条走线。FIG. 2B is a schematic diagram of the wiring of each layer in the
图3为本发明一实施例所述的电源网络的均匀性及功耗测试方法的流程图。如图3所示,首先将多个一般电路单元布满测试电路100(步骤S31)。根据本发明一实施例,一般电路单元可为反相器、缓冲器、触发器以及逻辑门等非填充单元的电路单元。FIG. 3 is a flowchart of a method for testing uniformity and power consumption of a power supply network according to an embodiment of the present invention. As shown in FIG. 3 , firstly, a plurality of general circuit units are filled with the test circuit 100 (step S31 ). According to an embodiment of the present invention, the general circuit unit may be a non-filling unit such as an inverter, a buffer, a flip-flop, and a logic gate.
根据一般电路单元的种类为用以布满图1的测试电路100中的每一一般电路单元指定功耗(步骤S32)。根据本发明一实施例,第一次指定一般电路单元的功耗时,是根据工艺参数以及经验来任意指定。According to the type of the general circuit unit, power consumption is specified for each general circuit unit used to fill the
根据本发明一实施例,测试电路100可承载的最大功耗与一般电路单元的功耗密度成正比。也就是说,一般电路单元的功耗密度与为图1的测试电路100供电的供应电压在一般电路单元产生的电压降(IR-Drop,下称一般电路单元的电压降)成正比。According to an embodiment of the present invention, the maximum power consumption that the
根据本发明的一实施例,图1的测试电路100的一般电路单元放置密度为100%可以使测试电路100的功耗密度等于一般电路单元的功耗密度,其中一般电路单元的功耗密度为每种一般电路单元的功耗与该种一般电路单元所占的电路区域的面积的比值。通常而言,一种一般电路单元的功耗与该种一般电路单元所占的电路区域的面积的比值,与另一种一般电路单元的功耗与该另一种一般电路单元所占的电路区域的面积的比值是相等的。According to an embodiment of the present invention, the general circuit unit placement density of the
接着,判断测试电路100的功耗密度是否与一般电路单元的功耗密度相同(步骤S33)。当判断测试电路100的功耗密度与一般电路单元的功耗密度不同时,代表运行电源网络的均匀性及功耗测试方法300的模拟工具发生错误,因此停止运行电源网络的均匀性及功耗测试方法300而处理模拟工具的问题。根据本发明一实施例,发生测试电路100的功耗密度与一般电路单元的功耗密度不相同的机率非常小。Next, it is judged whether the power consumption density of the
回到步骤S33,当判断测试电路100的功耗密度与一般电路单元的功耗密度相同时,判断电源网络200是否均匀(S34)。当判断电源网络200不均匀时,重新设计电源网络200(S37),并且回到步骤S31以重新执行电源网络的均匀性及功耗测试方法300。当判断电源网络200均匀时,判断一般电路单元的电压降是否均匀(S36),其中,一般电路单元的电压降是指供应电压经所述电源网络200对所述测试电路100的一般电路单元供电时所产生的电压降。Going back to step S33, when it is judged that the power consumption density of the
当判断一般电路单元的电压降不均匀时,重新设计电源网络300(步骤S37)后,回到步骤S31,以重新执行验证方法300。根据本发明的一实施例,当判断一般电路单元的电压降不均匀时,找出最大电压降,并分析产生最大电压降的原因,进而重新设计电源网络200。根据本发明一实施例,造成一般电路单元的电压降不均匀的原因可能是金属层中缺少了一或多个段走线,或是某个穿孔层少了一或多个穿孔。When it is judged that the voltage drop of the general circuit unit is uneven, after redesigning the power supply network 300 (step S37 ), return to step S31 to re-execute the
当判断一般电路单元的电压降均匀时,判断一般电路单元的最大电压降是否小于设计临限值以及判断电源网络200的最大承载功耗是否大于预设值(S38)。当一般电路单元的最大电压降小于设计临限值,且电源网络200的最大承载功耗大于预设值时,代表电源网络200符合设计要求,因此结束电源网络的均匀性及功耗测试方法300。当一般电路单元的最大电压降不小于设计临限值时或电源网络200的最大承载功耗不大于预设值时,执行步骤S35,提升电源网络200的效能后再重新执行验证方法300。根据本发明一实施例,设计临限值和预设值是依据开发者的经验而设定,当一般电路单元的最大电压降等于设计临界值时,测试电路100的功耗等于电源网络200所能承受的最大功耗。When it is determined that the voltage drop of the general circuit unit is uniform, it is determined whether the maximum voltage drop of the general circuit unit is less than the design threshold and whether the maximum load power consumption of the
根据本发明一实施例,提升电源网络的性能(S35)包括,增加电源网络200的至少一层的走线的线宽。根据本发明另一实施例,提升电源网络的性能(S35)包括增加电源网络200的至少一层的走线的密度。对于金属层而言,增加走线的密度包括增加走线的线宽和/或增加走线的数量,其中,当走线的数量有所增加时,对应的通孔数量也可能增加。对于通孔层而言,增加走线的密度包括增加通孔的个数。According to an embodiment of the present invention, improving the performance of the power network ( S35 ) includes increasing the line width of at least one layer of the
图4是本发明的一实施例所述的判断电源网络是否均匀的方法400的流程图,判断电源网络是否均匀的方法400对应于图3的步骤S34。如图4所示,为测试电路100中每一一般电路单元指定一个功耗值(S41),该功耗值优先级最高,而使测试时一般电路单元不受翻转率(toggle rate)、时钟信号等因素的影响。根据本发明一实施例,同种的一般电路单元被指定的功耗值相同,不同种的一般电路单元被指定的功耗值不同,每种一般电路单元被指定的功耗值等于对应的系数与基准电路单元的功耗的积,而使测试电路100的功耗密度均匀,其中,该对应的系数等于每一该种功耗单元与基准电路单元的面积的比值。FIG. 4 is a flowchart of a
接着,获取供应电压经电源网络200而对测试电路100供电所经过电源网络200的每个条走线的电阻(步骤S42)。举例来说,如图2B所示,电源网络200包括多条走线,供应电压通过这些走线对每一一般电路单元进行供电。步骤S42即获得图2B所示的每个条走线的电阻值。Next, obtain the resistance of each wire of the
随后,计算所获得的每个条走线的电阻中,最大的电阻值与最小的电阻值的差(步骤S43),并且判断该最大的电阻值与最小的电阻值的差与每个条走线的电阻的平均值之比是否小于临限值(步骤S44)。当该最大的电阻值与最小的电阻值的差与每个条走线的电阻的平均值的比值不小于临限值时,判断电源网络200为不均匀(步骤S45),并前往步骤S37,重新设计电源网络200。当最大的电阻值与最小的电阻值的差与每个条走线的电阻的平均值的比值小于临限值时,判断电源网络200均匀(步骤S46),并前往步骤S36。Subsequently, among the obtained resistances of each track, the difference between the maximum resistance value and the minimum resistance value is calculated (step S43), and it is judged that the difference between the maximum resistance value and the minimum resistance value is different from that of each line. Whether or not the ratio of the average values of the resistances of the wires is smaller than a threshold value (step S44). When the ratio of the difference between the maximum resistance value and the minimum resistance value to the average value of the resistance of each line is not less than the threshold value, it is judged that the
图5是本发明另一实施例所述的判断电源网络是否均匀的方法500的流程图,其中电源网络是否均匀的方法500对应至图3的步骤S34。如图5所示,首先直接指定测试电路100中每一一般电路单元对应的功耗值(S51),该功耗值优先级最高,而使测试时一般电路单元不受翻转率(toggle rate)、时钟信号等因素的影响。根据本发明一实施例,同种的一般电路单元指定的功耗值相同,不同种的一般电路单元指定的功耗值不同,每种功耗单元被指定的功耗值等于对应的系数与基准电路单元的功耗的积,而使测试电路100的功耗均匀,其中,该对应的系数等于每一该种功耗单元与基准电路单元的面积的比值。FIG. 5 is a flowchart of a
接着,获得供应电压经电源网络200对测试电路100供电时电源网络200的每个条走线的电流(步骤S52)。并且,判断最终输出到测试电路100的这些电流是否规律(步骤S53)。具体而言,是获得测试电路100的电流分布,并且判断最终流到测试电路100的电流分布是否规律,其中该规律是指每一耦接点附近呈现相同的电流分布状态,该电流分布状态是指离走线与测试电路100的耦接点越近,电流越大,离走线与与测试电路100的耦接点越远,电流越小。Next, obtain the current of each wire of the
根据本发明的一实施例,可以依电流大小而以色块显示测试电路100的电流分布是否规律,利用图像捕获设备检测每一耦接点的色块是否同色(例如同为红色)并且离耦接点越远色块颜色呈一致性变化(例如同步变为浅红色)而判断电源网络200是否均匀。According to an embodiment of the present invention, whether the current distribution of the
当测试电路100的电流分布不符合上述规律时,判断电源网络200不均匀(步骤S54),并前往步骤S37,以重新设计电源网络200。当测试电路100的电流分布符合上述规律时,判断电源网络200均匀(步骤S55),并回到图3的步骤S36。When the current distribution of the
根据本发明一实施例,当执行图3的步骤S34时,可执行图4的判断电源网络是否均匀的方法400或图5的判断电源网络是否均匀的方法500中的一个。根据本发明另一实施例,当执行图3的步骤S34时,可同时执行图4的判断电源网络是否均匀的方法400以及图5的判断电源网络是否均匀的方法500。According to an embodiment of the present invention, when step S34 in FIG. 3 is executed, one of the
图6是本发明的一实施例所述的判断一般电路单元的电源电压降是否均匀的方法600的流程图,其中判断一般电路单元的电源电压降是否均匀的方法600对应图3的步骤S36。如图6所示,首先获取供应电压通过电源网络200对测试电路100供电时每个条走线的单边电压降(步骤S61)。其中,单边电压降是指一般电路单元的电源压降(power drop)或地弹压降(ground bounce)。6 is a flowchart of a
判断在测试电路100中观测到的单边电压降是否规律(步骤S62)。该规律是指对应于每一提供供应电压的前述凸块的投影位置,测试电路100应呈现相同的单边电压降分布状态,该单边电压降状态是指离凸块的投影位置越近一般电路单元的单边电压降越小,离凸块的投影位置越远一般电路单元的单边电压降越大。根据本发明的一实施例,根据电压降大小以色块显示一般电路单元的单边电压降,图像捕获设备检测每一凸块投影位置的色块是否同色(例如同为粉色)并且离凸块投影位置越远色块颜色呈一致性变化(例如同步变为红色)而判断一般电路单元的电压降是否均匀。It is judged whether the unilateral voltage drop observed in the
当在测试电路100中观测到的单边电压降不符合该规律时,判断测试电路100中一般电路单元的电压降不均匀(步骤S63),并执行步骤S37而重新设计电源网络200。当在测试电路100中观测到的单边电压降符合该规律时,判断测试电路100中一般电路单元的电压降均匀(步骤S64),并执行步骤S38,以判断测试电路100的一般电路单元的最大电压降是否小于单边临限值。When the unilateral voltage drop observed in the
图7为本发明另一实施例所述的判断一般电路单元的电源电压降是否均匀的方法的流程图,其中判断一般电路单元的电源电压降是否均匀的方法700对应至图3的步骤S36。如图7所示,首先获取供应电压通过电源网络200对测试电路100供电时每个条走线所产生的双边电压降(步骤S71)。其中,双边电压降是指一般电路单元的电源压降与地弹压降的和。7 is a flowchart of a method for judging whether the power supply voltage drop of a general circuit unit is uniform according to another embodiment of the present invention, wherein the
判断在测试电路100中观测到的双边电压降是否规律(步骤S72)。该规律是指对应于每一提供供应电压的前述凸块(Bump)的投影位置,测试电路100应呈现相同的双边电压降分布状态,该双边电压降状态是指离凸块的投影位置越近一般电路单元的双边电压降越小,离凸块的投影位置越远一般电路单元的双边电压降越大。根据本发明的一实施例,根据电压降大小以色块显示一般电路单元的双边电压降,图像捕获设备检测每一凸块投影位置的代表一般电路单元的双边电压降的色块是否同色(例如同为粉色)并且离凸块投影位置越远色块颜色呈一致性变化(例如同步变为红色)而判断一般电路单元的电压降是否均匀。It is judged whether the bilateral voltage drop observed in the
当在测试电路100中观测到的双边电压降不符合该规律时,判断测试电路100中一般电路单元的电压降不均匀(步骤S73),并执行步骤S37而重新设计电源网络200。当在测试电路100中观测到的双边电压降符合该规律时,判断测试电路100中一般电路单元的电压降均匀(步骤S74),并执行步骤S38,以判断测试电路100的一般电路单元的最大电压降是否小于双边临限值。根据本发明一实施例,双边临限值是单边临限值的两倍。When the bilateral voltage drop observed in the
本发明提出了一种验证方法,能够有效地验证设计的电源网络是否足以承载实际电路设计的功率损耗,并且确认电源网络是否均匀。The invention proposes a verification method, which can effectively verify whether the designed power network is sufficient to bear the power loss of the actual circuit design, and confirm whether the power network is uniform.
虽然本公开的实施例及其优点已公开如上,但应该了解的是,本领域技术人员,在不脱离本公开的精神和范围内,当可作更动、替代与润饰。此外,本公开的保护范围并未局限于说明书内所述特定实施例中的工艺、机器、制造、物质组成、装置、方法及步骤,本领域技术人员可从本公开一些实施例的揭示内容中理解现行或未来所发展出的工艺、机器、制造、物质组成、装置、方法及步骤,只要可以在此处所述实施例中实施大抵相同功能或获得大抵相同结果皆可根据本公开一些实施例使用。因此,本公开的保护范围包括上述工艺、机器、制造、物质组成、装置、方法及步骤。另外,每一权利要求构成个别的实施例,且本公开的保护范围也包括各个权利要求及实施例的组合。Although the embodiments of the present disclosure and their advantages have been disclosed above, it should be understood that those skilled in the art may make changes, substitutions and modifications without departing from the spirit and scope of the present disclosure. In addition, the protection scope of the present disclosure is not limited to the process, machine, manufacture, material composition, device, method and steps in the specific embodiments described in the specification, those skilled in the art can learn from the disclosure of some embodiments of the present disclosure Understand the current or future developed processes, machines, manufacturing, material compositions, devices, methods and steps, as long as they can perform substantially the same function or obtain substantially the same results in the embodiments described here, they can all be based on some embodiments of the present disclosure use. Therefore, the protection scope of the present disclosure includes the above-mentioned process, machine, manufacture, composition of matter, means, method and steps. In addition, each claim constitutes an individual embodiment, and the protection scope of the present disclosure also includes combinations of the individual claims and the embodiments.
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