CN111796199B - Power supply network uniformity and power consumption testing method - Google Patents
Power supply network uniformity and power consumption testing method Download PDFInfo
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- CN111796199B CN111796199B CN202010748776.7A CN202010748776A CN111796199B CN 111796199 B CN111796199 B CN 111796199B CN 202010748776 A CN202010748776 A CN 202010748776A CN 111796199 B CN111796199 B CN 111796199B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/40—Testing power supplies
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Abstract
The invention provides a power supply network uniformity and power consumption testing method. The power network uniformity and power consumption testing method comprises the steps of utilizing a plurality of general circuit units to be fully distributed with a testing circuit; providing a supply voltage to each of the general circuit units by using a power supply network; specifying a power consumption of each of the general circuit units; calculating the power consumption density of the test circuit and the power consumption density of the general circuit unit; and judging whether the power consumption density of the test circuit is the same as that of the general circuit unit or not, wherein when the power consumption density of the test circuit is the same as that of the general circuit unit, judging whether the power supply network is uniform or not, and when the power consumption density of the test circuit is different from that of the general circuit unit, representing that a tool for operating the test method breaks down.
Description
Technical Field
The invention relates to a method for testing uniformity and power consumption of a power supply network.
Background
In chip signoff, not only the Static Timing Analysis (STA) but also the voltage drop (IR drop) must meet the design requirements. Since the actual system power source is passed through the Printed Circuit Board (PCB) and the bump (bump) on the chip surface after packaging, and then the power network (power mesh) inside the chip and the pad contacting the bump can supply power to the circuit inside the chip, the system power source plane noise and the conduction voltage drop will be generated on the series of power distribution networks. Thus, a chip signoff includes a voltage drop signoff, but the criteria for voltage drop may vary from circuit design vendor to circuit design vendor.
After the voltage drop, the voltage received by the general circuit units on the chip will generate a large difference, and further the delay time of the general circuit units will be different from the result of the pre-silicon verification (pre-silicon), so that the whole circuit can not reach the expected performance. Therefore, it is necessary to test the uniformity of the power network and the maximum load power consumption of the power network in advance to better design a qualified power network.
Disclosure of Invention
The invention provides a power supply network uniformity and power consumption testing method which can confirm whether a power supply network is uniform or not and effectively test whether a designed power supply network is enough to bear designed power loss or not.
In view of the above, the present invention provides a method for testing power network uniformity and power consumption, which includes using a plurality of general circuit units to fully distribute a test circuit; providing a supply voltage to each of the general circuit units by using a power supply network; specifying a power consumption of each of the general circuit units; calculating the power consumption density of the test circuit and the power consumption density of the general circuit unit; and judging whether the power consumption density of the test circuit is the same as that of the general circuit unit or not, wherein when the power consumption density of the test circuit is the same as that of the general circuit unit, judging whether the power supply network is uniform or not, and when the power consumption density of the test circuit is different from that of the general circuit unit, representing that a tool for operating the test method breaks down.
Drawings
FIG. 1 is a diagram illustrating a test circuit 100 according to an embodiment of the invention;
fig. 2A is a schematic diagram of a power network 200 according to an embodiment of the invention;
FIG. 2B is a perspective view of the block 210 of FIG. 2A;
FIG. 3 is a flow chart of a testing method 300 according to an embodiment of the invention;
FIG. 4 is a flowchart of a method 400 for determining whether a power network is uniform according to an embodiment of the invention;
fig. 5 is a flowchart of a method 500 for determining whether a power network is uniform according to another embodiment of the invention;
FIG. 6 is a flowchart of a method 600 for determining whether a power voltage drop of a general circuit unit is uniform according to an embodiment of the invention; and
fig. 7 is a flowchart of a method 700 for determining whether a power voltage drop of a general circuit unit is uniform according to another embodiment of the invention.
Detailed Description
The following description is an example of the present invention. The general principles of the present invention are intended to be illustrative, but not limiting, of the scope of the invention, which is defined by the claims.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms, and these terms are only used to distinguish one element, component, region, layer and/or section from another element, component, region, layer and/or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of some embodiments of the present disclosure.
It is noted that the following disclosure provides many different embodiments, or examples, for implementing different features of the invention. The particular examples and arrangements of components set forth below are presented for illustrative purposes only and are not intended to limit the scope of the present invention. Moreover, the following description may repeat reference numerals and/or letters in the various examples. However, this repetition is for the purpose of providing a simplified and clear illustration and is not intended to limit the scope of the various embodiments and/or configurations discussed below. Moreover, the description below of one feature connected to, coupled to, and/or formed on another feature, and the like, may actually encompass a variety of different embodiments that include the feature in direct contact, or that include other additional features formed between the features, and the like, such that the features are not in direct contact.
Fig. 1 is a schematic diagram of a test circuit 100 according to an embodiment of the invention. As shown in fig. 1, the test circuit 100 has an area X Y and includes a plurality of general circuit units 120-1, 120-2, …, 120-N, where N is a positive integer. According to an embodiment of the present invention, the test circuit 100 is coupled to the power supply network to test the uniformity and the maximum load power consumption of the power supply network, the placement density (placement density) of the general circuit cells in the test circuit 100 is 100%, and the placement density of 100% means that the area (i.e., the area X Y) of the test circuit 100 that is already full of the general circuit cells does not have any general circuit cells. Generally, in an actual circuit, the placement density of the general circuit units is about 70%, and since the placement density of the general circuit units of the test circuit 100 is higher than that of the circuit coupled to the power network (power mesh) in the actual application, the maximum load power consumption of the power network estimated by the test circuit 100 is sufficient to support the power supply of the actual circuit.
According to an embodiment of the present invention, the test circuit 100 includes at least one general circuit unit 120-1 to 120-N, and each general circuit unit determines its area according to power consumption, that is, the larger the power consumption of the general circuit unit is, the larger the area is. The area of each general circuit cell is the product of a coefficient and the area of a kind of dummy circuit cell (reference circuit cell), and the power consumption of the general circuit cell is also the product of the power consumption of the reference circuit cell and the coefficient. Therefore, the power consumption values of the general circuit cells per unit area (e.g., the area of each reference circuit cell) are the same regardless of whether the general circuit cells 120-1 to 120-N are the same, and the power consumption density of the test circuit 100, which is the power consumption of the general circuit cells per unit area, is uniform.
According to an embodiment of the present invention, the circuit units can be divided into general circuit units and filler units (filler), and the general circuit units 120-1 to 120-N can be circuit units of non-filler units such as inverters, buffers, flip-flops, and logic gates. Since the filler cells do not consume any power, the circuit region 110-N may be fully populated with only the general circuit cells, wherein the full population refers to making the placement density (placement density) of the general circuit cells 100%. According to another embodiment of the present invention, after the circuit region 110-N is filled with the normal circuit units, the gap of the circuit region 110-N can be filled with the filling units.
In addition, the test circuit 100 receives supply voltages through a power network, such as power supply voltages VDD, VSS, a virtual power supply voltage, a reference voltage, and the like. That is, each of the general circuit units 120-1 to 120-N in the test circuit 100 is powered through the power supply network. According to an embodiment of the present invention, the test circuit 100 is disposed on at least one layer of the chip, the chip further includes a power network disposed on at least one other metal layer and/or via layer, the at least one metal layer is disposed with a plurality of power traces and vias for transmitting each supply voltage, and the at least one via layer is disposed with a plurality of vias for traces.
Fig. 2A is a schematic diagram of a power network according to an embodiment of the invention. As shown in fig. 2A, the test circuit 100 is coupled to a power network 200. The power network 200 includes a first metal layer M1, a second metal layer M2, a seventh metal layer M7, an eleventh metal layer M11, a twelfth metal layer M12, and a thirteenth metal layer M13. In addition, the metal layers are coupled by a VIA (VIA).
The thirteenth metal layer M13 is coupled to the BUMPs BUMP, and is coupled to the package pins through the BUMPs BUMP, and is coupled to the wires on the printed circuit board through the package pins. The thirteen metal layers included in the power network 200 according to an embodiment of the present invention are for illustrative purposes, and the present invention is not limited thereto.
Fig. 2B is a schematic diagram of traces of each layer in the block 210 of fig. 2A. As shown in fig. 2B, the first metal layer M1, the second metal layer M2, the seventh metal layer M7, and the eleventh metal layer M11 respectively include a plurality of segments of traces, as illustrated by arrows, the traces formed by connecting the segments of traces are used to supply voltage to each general circuit unit in the test circuit 100, for convenience, the traces formed by connecting Duan Zouxian are referred to as bar traces, fig. 2B illustrates an arrow line as a single trace formed by connecting a plurality of segments of traces, and each layer of traces in the block 210 shown in fig. 2B may be connected to a plurality of traces.
Fig. 3 is a flowchart of a method for testing uniformity and power consumption of a power supply network according to an embodiment of the invention. As shown in fig. 3, first, a plurality of general circuit cells are filled with the test circuit 100 (step S31). According to an embodiment of the present invention, the general circuit units may be circuit units of non-filling units such as inverters, buffers, flip-flops, and logic gates.
Power consumption is specified for each general circuit cell to be filled in the test circuit 100 of fig. 1 according to the kind of the general circuit cell (step S32). According to an embodiment of the present invention, the first time the power consumption of the general circuit unit is specified, the power consumption is arbitrarily specified according to the process parameters and experience.
According to an embodiment of the present invention, the maximum power consumption that can be carried by the test circuit 100 is proportional to the power consumption density of a general circuit unit. That is, the power consumption density of a general circuit unit is proportional to a voltage Drop (IR-Drop, hereinafter, voltage Drop of the general circuit unit) generated in the general circuit unit by a supply voltage for supplying power to the test circuit 100 of fig. 1.
According to an embodiment of the present invention, a 100% placement density of the general circuit units of the test circuit 100 of fig. 1 may make the power density of the test circuit 100 equal to the power density of the general circuit units, where the power density of the general circuit units is a ratio of the power consumption of each general circuit unit to the area of the circuit area occupied by the general circuit unit. In general, the ratio of the power consumption of one general circuit unit to the area of the circuit area occupied by the general circuit unit is equal to the ratio of the power consumption of another general circuit unit to the area of the circuit area occupied by the general circuit unit.
Next, it is determined whether the power consumption density of the test circuit 100 is the same as that of the general circuit unit (step S33). When the power density of the test circuit 100 is determined to be different from the power density of the general circuit unit, it represents that the simulation tool running the power network uniformity and power consumption test method 300 has an error, and thus the power network uniformity and power consumption test method 300 is stopped to handle the problem of the simulation tool. According to an embodiment of the present invention, the probability that the power density of the test circuit 100 is different from the power density of the general circuit units is very small.
Returning to step S33, when it is judged that the power consumption density of the test circuit 100 is the same as that of the general circuit unit, it is judged whether the power supply network 200 is uniform (S34). When it is determined that the power supply network 200 is not uniform, the power supply network 200 is redesigned (S37), and it returns to step S31 to re-perform the power supply network uniformity and power consumption testing method 300. When the power network 200 is determined to be uniform, it is determined whether the voltage drop of the general circuit unit is uniform (S36), wherein the voltage drop of the general circuit unit is the voltage drop generated when the supply voltage supplies power to the general circuit unit of the test circuit 100 through the power network 200.
When it is determined that the voltage drop of the general circuit unit is not uniform, the power supply network 300 is redesigned (step S37), and then the process returns to step S31 to re-execute the verification method 300. According to an embodiment of the present invention, when the voltage drop of the general circuit unit is determined to be non-uniform, the maximum voltage drop is found out, and the reason for the maximum voltage drop is analyzed, so as to redesign the power network 200. According to an embodiment of the present invention, the voltage drop of the general circuit unit may be caused by one or more segments of traces missing in the metal layer or one or more vias missing from a via layer.
When the voltage drop of the general circuit unit is determined to be uniform, it is determined whether the maximum voltage drop of the general circuit unit is smaller than a design threshold and whether the maximum power consumption of the power network 200 is greater than a predetermined value (S38). When the maximum voltage drop of the general circuit unit is smaller than the design threshold and the maximum load power consumption of the power network 200 is larger than the predetermined value, it represents that the power network 200 meets the design requirement, thereby ending the method 300 for testing the uniformity and power consumption of the power network. When the maximum voltage drop of the general circuit unit is not less than the design threshold or the maximum load power consumption of the power network 200 is not greater than the preset value, step S35 is performed to improve the performance of the power network 200 and then the verification method 300 is performed again. According to an embodiment of the present invention, the design threshold and the predetermined value are set according to the experience of the developer, and when the maximum voltage drop of the general circuit unit is equal to the design threshold, the power consumption of the test circuit 100 is equal to the maximum power consumption that the power network 200 can endure.
According to an embodiment of the present invention, the improving the performance of the power network (S35) includes increasing the line width of the trace of at least one layer of the power network 200. According to another embodiment of the present invention, the improving the performance of the power supply network (S35) includes increasing the density of the traces of at least one layer of the power supply network 200. For the metal layer, increasing the density of the traces includes increasing the line width of the traces and/or increasing the number of the traces, wherein when the number of the traces is increased, the number of the corresponding vias may also be increased. For via layers, increasing the density of traces includes increasing the number of vias.
Fig. 4 is a flowchart of a method 400 for determining whether a power network is uniform according to an embodiment of the present invention, where the method 400 for determining whether a power network is uniform corresponds to step S34 of fig. 3. As shown in fig. 4, a power consumption value is assigned to each general circuit unit in the test circuit 100 (S41), and the priority of the power consumption value is the highest, so that the general circuit unit is not affected by a flip rate (toggle rate), a clock signal, and other factors during the test. According to an embodiment of the present invention, the assigned power consumption values of the same type of general circuit units are the same, the assigned power consumption values of the different types of general circuit units are different, and the assigned power consumption value of each type of general circuit unit is equal to the product of the corresponding coefficient and the power consumption of the reference circuit unit, so as to make the power consumption density of the test circuit 100 uniform, wherein the corresponding coefficient is equal to the ratio of the area of each type of power consumption unit and the reference circuit unit.
Next, the resistance of each wire passing through the power network 200, through which the supply voltage supplies power to the test circuit 100 through the power network 200, is obtained (step S42). For example, as shown in fig. 2B, the power supply network 200 includes a plurality of traces through which a supply voltage is supplied to each of the general circuit units. Step S42 obtains the resistance value of each trace shown in fig. 2B.
Subsequently, the difference between the maximum resistance value and the minimum resistance value of the obtained resistances of each of the traces is calculated (step S43), and it is determined whether the ratio of the difference between the maximum resistance value and the minimum resistance value to the average value of the resistances of each of the traces is smaller than a threshold value (step S44). When the ratio of the difference between the maximum resistance value and the minimum resistance value to the average value of the resistance of each trace is not less than the threshold value, the power network 200 is determined to be non-uniform (step S45), and the process goes to step S37 to redesign the power network 200. When the ratio of the difference between the maximum resistance value and the minimum resistance value to the average value of the resistance of each trace is smaller than the threshold value, the power network 200 is determined to be uniform (step S46), and the process proceeds to step S36.
Fig. 5 is a flowchart of a method 500 for determining whether a power network is uniform according to another embodiment of the present invention, where the method 500 for determining whether a power network is uniform corresponds to step S34 in fig. 3. As shown in fig. 5, first, a power consumption value corresponding to each general circuit unit in the test circuit 100 is directly specified (S51), and the priority of the power consumption value is the highest, so that the general circuit units are not affected by factors such as a toggle rate (toggle rate) and a clock signal during testing. According to an embodiment of the present invention, the power consumption values assigned to the same general circuit units are the same, the power consumption values assigned to different general circuit units are different, and the power consumption value assigned to each power consumption unit is equal to the product of the corresponding coefficient and the power consumption of the reference circuit unit, so as to make the power consumption of the test circuit 100 uniform, wherein the corresponding coefficient is equal to the ratio of the area of each power consumption unit to the area of the reference circuit unit.
Next, the current of each wire of the power network 200 when the test circuit 100 is powered by the supply voltage through the power network 200 is obtained (step S52). And, it is judged whether or not these currents finally output to the test circuit 100 are regular (step S53). Specifically, the current distribution of the test circuit 100 is obtained, and whether the current distribution flowing to the test circuit 100 is regular or not is determined, wherein the regular is that the same current distribution state is presented near each coupling point, and the current distribution state is that the closer to the coupling point of the trace and the test circuit 100, the larger the current is, and the farther from the coupling point of the trace and the test circuit 100, the smaller the current is.
According to an embodiment of the present invention, whether the current distribution of the test circuit 100 is regular or not can be displayed in color blocks according to the magnitude of the current, and whether the power network 200 is uniform or not can be determined by detecting whether the color blocks of each coupling point are the same color (e.g., the same color is red) and whether the color blocks are changed in consistency (e.g., synchronously changed into light red) the farther away from the coupling point by using the image capturing apparatus.
When the current distribution of the test circuit 100 does not conform to the above rule, it is determined that the power supply network 200 is not uniform (step S54), and the process goes to step S37 to redesign the power supply network 200. When the current distribution of the test circuit 100 conforms to the above rule, the power supply network 200 is determined to be uniform (step S55), and the process returns to step S36 of fig. 3.
According to an embodiment of the present invention, when step S34 of fig. 3 is executed, one of the method 400 of determining whether the power supply network is uniform of fig. 4 or the method 500 of determining whether the power supply network is uniform of fig. 5 may be executed. According to another embodiment of the present invention, when step S34 of fig. 3 is executed, the method 400 of fig. 4 for determining whether the power supply network is uniform and the method 500 of fig. 5 for determining whether the power supply network is uniform may be executed simultaneously.
Fig. 6 is a flowchart of a method 600 for determining whether a power voltage drop of a general circuit unit is uniform according to an embodiment of the present invention, wherein the method 600 for determining whether a power voltage drop of a general circuit unit is uniform corresponds to step S36 in fig. 3. As shown in fig. 6, a single-side voltage drop of each trace when the supply voltage supplies power to the test circuit 100 through the power network 200 is obtained first (step S61). The single-side voltage drop refers to a power drop (power drop) or a ground bounce (ground bounce) of a general circuit unit.
It is determined whether the one-sided voltage drop observed in the test circuit 100 is regular (step S62). The rule is that the test circuit 100 should exhibit the same single-side voltage drop distribution corresponding to the projection position of each of the aforementioned bumps providing the supply voltage, where the single-side voltage drop distribution is that the closer to the projection position of the bump, the smaller the single-side voltage drop of the general circuit unit, and the farther from the projection position of the bump, the larger the single-side voltage drop of the general circuit unit. According to an embodiment of the present invention, the single-sided voltage drop of the general circuit unit is displayed in color blocks according to the magnitude of the voltage drop, and the image capturing apparatus detects whether the color blocks at the projection positions of each bump are the same color (e.g., the same color is pink) and the color blocks change in consistency (e.g., change to red synchronously) the farther away from the projection positions of the bumps, so as to determine whether the voltage drop of the general circuit unit is uniform.
When the single-sided voltage drop observed in the test circuit 100 does not conform to the rule, it is determined that the voltage drop of the general circuit unit in the test circuit 100 is not uniform (step S63), and step S37 is performed to redesign the power network 200. When the single-sided voltage drop observed in the test circuit 100 meets the rule, it is determined that the voltage drops of the general circuit units in the test circuit 100 are uniform (step S64), and step S38 is performed to determine whether the maximum voltage drop of the general circuit units in the test circuit 100 is smaller than the single-sided threshold.
Fig. 7 is a flowchart of a method for determining whether a power voltage drop of a general circuit unit is uniform according to another embodiment of the present invention, wherein the method 700 for determining whether a power voltage drop of a general circuit unit is uniform corresponds to step S36 in fig. 3. As shown in fig. 7, first, a double-sided voltage drop generated by each trace when the supply voltage supplies power to the test circuit 100 through the power network 200 is obtained (step S71). The double-side voltage drop refers to the sum of the power voltage drop and the ground bounce voltage drop of a common circuit unit.
It is determined whether the double-sided voltage drop observed in the test circuit 100 is regular (step S72). The rule is that the test circuit 100 should have the same double-sided voltage drop distribution corresponding to the projection position of each of the aforementioned bumps (Bump) providing the supply voltage, where the double-sided voltage drop distribution indicates that the closer to the projection position of the Bump, the smaller the double-sided voltage drop of the general circuit unit is, and the farther from the projection position of the Bump, the larger the double-sided voltage drop of the general circuit unit is. According to an embodiment of the present invention, the voltage drop of the general circuit unit is displayed in color blocks according to the magnitude of the voltage drop, and the image capturing apparatus detects whether the color blocks representing the voltage drop of the general circuit unit at the projection positions of each bump are the same color (for example, the same color is pink) and whether the color of the color blocks changes in a consistent manner (for example, changes in a red color synchronously) the farther away from the projection positions of the bumps, so as to determine whether the voltage drop of the general circuit unit is uniform.
When the two-sided voltage drop observed in the test circuit 100 does not conform to the rule, it is determined that the voltage drop of the general circuit units in the test circuit 100 is not uniform (step S73), and step S37 is performed to redesign the power network 200. When the observed double-sided voltage drop in the test circuit 100 conforms to the rule, it is determined that the voltage drops of the general circuit units in the test circuit 100 are uniform (step S74), and step S38 is performed to determine whether the maximum voltage drop of the general circuit units in the test circuit 100 is smaller than the double-sided threshold. According to an embodiment of the present invention, the double-sided threshold is twice the single-sided threshold.
The invention provides a verification method which can effectively verify whether a designed power supply network is enough to bear the power loss of an actual circuit design and confirm whether the power supply network is uniform.
Although the embodiments of the present disclosure and their advantages have been disclosed above, it should be understood that various changes, substitutions and alterations can be made herein by those skilled in the art without departing from the spirit and scope of the disclosure. Moreover, the scope of the present disclosure is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein. Accordingly, the scope of the present disclosure includes the processes, machines, manufacture, compositions of matter, means, methods, and steps described above. In addition, each claim constitutes a separate embodiment, and the scope of protection of the present disclosure also includes combinations of the respective claims and embodiments.
Claims (8)
1. A test method for a power supply network, comprising:
arranging a plurality of general circuit units on a test circuit;
providing a supply voltage to each of the general circuit units by using a power supply network;
specifying a power consumption of each of the general circuit units;
calculating the power consumption density of the test circuit and the power consumption density of the general circuit unit; and
judging whether the power consumption density of the test circuit is the same as that of the general circuit unit,
when the power consumption density of the test circuit is the same as that of the general circuit unit, judging whether the power supply network is uniform or not based on the resistance or current of each wire of the power supply network when the supply voltage supplies power to the test circuit through the power supply network,
when the power consumption density of the test circuit is different from that of the general circuit unit, it represents that a tool running the test method is out of order.
2. The test method according to claim 1, wherein the arrangement density of the general circuit cells arranged in the test circuit is 100%.
3. The testing method of claim 1, wherein the determining whether the power network is uniform based on the resistance of each trace of the power network when the test circuit is powered by the supply voltage through the power network comprises:
obtaining resistance distribution of each wire passing through the power network when the supply voltage supplies power to the test circuit, wherein the resistance distribution comprises a maximum resistance value, a minimum resistance value and an average value;
calculating a difference between the maximum resistance value and the minimum resistance value; and
determining whether the ratio of the difference value to the average value is less than a threshold value,
when the ratio is smaller than the threshold value, the power network is judged to be uniform,
and when the ratio is not smaller than the threshold value, judging that the power supply network is not uniform, and redesigning the power supply network.
4. The testing method of claim 1, wherein the determining whether the power network is uniform based on the current of each trace of the power network when the supply voltage powers the test circuit through the power network comprises:
obtaining the current of the test circuit when the supply voltage supplies power to the test circuit through the power supply network; and
judging whether the current is regular or not,
when the current value is regular, the power supply network is judged to be uniform,
when the current value is irregular, the power supply network is redesigned.
5. The test method of claim 1, further comprising:
and when the power supply network is judged to be uniform, judging whether the voltage drop generated when the supply voltage supplies power to the test circuit through the power supply network is uniform or not.
6. The test method of claim 5, further comprising:
when the voltage drop is judged to be uniform, judging whether the maximum voltage drop is smaller than a threshold value and whether the maximum bearing power of the power supply network is larger than a preset value;
when the voltage drop is not smaller than the threshold value or the maximum bearing power consumption is not larger than a preset value, increasing the wiring density of the power supply network; and
and when the voltage drop of the power supply network is smaller than the threshold value and the maximum bearing power consumption is larger than a preset value, ending the test method.
7. The test method of claim 5, wherein said determining whether said voltage drop is uniform further comprises:
acquiring a single-side voltage drop generated when the supply voltage supplies power to the test circuit through the power supply network; and
judging whether the single-side voltage drop is regular or not,
when the single-side voltage drop rule is adopted, the voltage drop is judged to be uniform,
when the single-side voltage drop is irregular, the power supply network is redesigned.
8. The test method of claim 5, wherein said determining whether said voltage drop is uniform further comprises:
obtaining a double-sided voltage drop generated when the supply voltage supplies power to the test circuit through the power supply network; and
determining whether the double-sided voltage drop is regular,
when the bilateral voltage drop rule is adopted, the voltage drop of the power supply network is judged to be uniform,
when the bilateral voltage drop is irregular, the power supply network is redesigned.
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| CN114280351B (en) * | 2021-12-21 | 2023-11-21 | 海光信息技术股份有限公司 | Method and related device for acquiring voltage drop of internal power supply network of integrated circuit |
| CN114722769B (en) * | 2022-06-09 | 2022-09-30 | 宏晶微电子科技股份有限公司 | Chip power grid layout method and device, electronic equipment and readable medium |
| CN115497521B (en) * | 2022-11-08 | 2023-02-17 | 长鑫存储技术有限公司 | Power supply circuit, memory and electronic equipment |
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