CN111785824A - Packaging method and packaging structure of fan-out wafer level LED and electronic equipment - Google Patents
Packaging method and packaging structure of fan-out wafer level LED and electronic equipment Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
- H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Led Device Packages (AREA)
Abstract
The invention provides a packaging method, a packaging structure and electronic equipment of a fan-out wafer level LED, wherein the packaging structure comprises the following components: the LED packaging structure comprises a rewiring layer, an LED chip, a packaging layer and a metal connecting piece; the rewiring layer comprises a first surface and an opposite second surface; the LED chip is positioned on the second surface of the rewiring layer and is electrically connected with the rewiring layer; the packaging layer covers the second surface of the rewiring layer, covers the side surface of the LED chip and exposes the light emitting surface of the LED chip; the metal connecting piece is located on the first surface of the rewiring layer and electrically connected with the rewiring layer. The LED chips are fixed on the two opposite surfaces of the rewiring layer, and the metal connecting pieces are manufactured, so that the fan-out packaging of the LED chips is realized, the ultrahigh resolution packaging requirement of Micro LEDs can be met, the small line width packaging is realized, and the system type LED packaging is met.
Description
Technical Field
The invention belongs to the field of semiconductor packaging, and relates to a packaging method, a packaging structure and electronic equipment of a fan-out wafer level LED.
Background
With the increasing demand and the rapid development of LED technology, the mainstream LED electronic display device mainly focuses on RGB full-color display, wherein the RGB color mode is a color standard in the industry, and various colors are obtained by changing three color channels of red (R), green (G), and blue (B) and superimposing the three color channels on each other, RGB represents the colors of the three channels of red, green, and blue, and the standard almost includes all colors that can be perceived by human vision, and is one of the most widely used color systems at present.
With the continuous development of LED electronic display devices toward full-color, small size, low current, high reliability and low cost, LED packaging technology is becoming more important, and LED packaging technology also faces a great challenge.
The packaging mode of the LED electronic display screen device mainly comprises a direct insert type (lamp), a sub-surface mount, a surface mount three-in-one (SMD), a COB (chip on Board), a Micro LED and the like at present, and the packaging modes of the LED electronic display screen device not only promote the progress of the LED electronic display screen device, but also are continuous self-innovation of the packaging technology.
The key to the improvement of the resolution of the LED electronic display screen is the package size of RGB LEDs, and how to reduce the package size of RGB LEDs is a technical difficulty faced in the art.
Disclosure of Invention
In view of the above drawbacks of the prior art, an object of the present invention is to provide a packaging method, a packaging structure and an electronic device for a fan-out wafer level LED, so as to provide a novel LED packaging method, a novel packaging structure and a novel electronic device, which can achieve ultra-high resolution packaging and small line width packaging of an LED and meet the requirements of system-based packaging.
To achieve the above and other related objects, the present invention provides a packaging method for a fan-out wafer level LED, the packaging method comprising the steps of:
providing a supporting substrate, and forming a separation layer on the supporting substrate;
forming a rewiring layer on the separation layer, wherein the rewiring layer comprises a first surface and an opposite second surface, and the first surface is in contact with the separation layer;
providing an LED chip, fixing the LED chip on the second surface of the rewiring layer, and electrically connecting the LED chip with the rewiring layer;
packaging the LED chip by adopting a packaging layer, wherein the packaging layer covers the second surface of the rewiring layer, covers the side surface of the LED chip and exposes the light emitting surface of the LED chip;
removing the supporting substrate and the separation layer to expose the first surface of the rewiring layer;
and forming a metal connecting piece on the first surface of the rewiring layer, wherein the metal connecting piece is electrically connected with the rewiring layer.
Optionally, the LED chip comprises an RGB three primary color LED chip.
Optionally, the first side and the second side of the redistribution layer both expose the metal layer of the redistribution layer.
Optionally, the encapsulation method of the encapsulation layer includes one of compression molding, transfer molding, liquid encapsulation molding, vacuum lamination and spin coating, and the material of the encapsulation layer includes one of polyimide, silicone and epoxy resin.
Optionally, the separation layer includes one of an adhesive tape and a polymer, and the method of removing the supporting substrate and the separation layer includes one of a laser irradiation method and a heating method.
Optionally, the method for forming the metal connector includes one or a combination of electroless plating, electroplating, evaporation and sputtering.
Optionally, the metal connector includes one or a combination of a metal film, a metal bump, and a metal pillar.
Optionally, the metal connector comprises a Ni/Au complex metal thin film.
Optionally, a step of cutting is further included to obtain a package structure of the individual fan-out LEDs.
Optionally, the support substrate comprises one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.
The invention also provides a packaging structure of the fan-out LED, which comprises:
a rewiring layer including a first side and an opposing second side;
the LED chip is positioned on the second surface of the rewiring layer and is electrically connected with the rewiring layer;
the packaging layer covers the second surface of the rewiring layer, covers the side surface of the LED chip and exposes the light emitting surface of the LED chip;
and the metal connecting piece is positioned on the first surface of the rewiring layer and is electrically connected with the rewiring layer.
Optionally, the LED chip comprises an RGB three primary color LED chip.
Optionally, the first side and the second side of the redistribution layer both expose the metal layer of the redistribution layer.
Optionally, the encapsulation layer includes one of a polyimide encapsulation layer, a silicone encapsulation layer, and an epoxy encapsulation layer.
Optionally, the metal connector includes one or a combination of a metal film, a metal bump, and a metal pillar.
Optionally, the metal connector comprises a Ni/Au complex metal thin film.
The invention also provides an electronic device which comprises the packaging structure of the fan-out LED.
The invention provides a packaging method, a packaging structure and electronic equipment of a fan-out wafer level LED, wherein the fan-out packaging of the LED chip is realized by fixing LED chips on two opposite surfaces of a rewiring layer and manufacturing metal connecting pieces, the ultrahigh resolution packaging requirement of a Micro LED can be met, the small line width packaging is realized, and the system type LED packaging is met.
Drawings
FIG. 1 is a process flow diagram of a method for packaging a fan-out wafer level LED in accordance with the present invention.
Fig. 2 to 10 are schematic structural diagrams of steps of the packaging method of the fan-out wafer level LED of the present invention, wherein fig. 10 is a schematic structural diagram of the packaging structure of the fan-out LED of the present invention.
Description of the element reference numerals
101 supporting substrate
102 separating layers
201 metal layer
202 metal contact plug
203 dielectric layer
301 red light emitting unit
302 green light emitting unit
303 blue light emitting unit
304 electrode
401 encapsulation layer
501 Ni metal layer
502 Au Metal layer
601 adhesive film
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
As shown in fig. 1 to 10, the present embodiment provides a packaging method of a fan-out wafer level LED, the packaging method includes the steps of:
as shown in fig. 2, a supporting substrate 101 is provided, and a separation layer 102 is formed on the supporting substrate 101.
As an example, the supporting substrate 101 may include one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate. In this embodiment, the supporting substrate 101 is preferably a glass substrate, which has a low cost, is easy to form the separation layer 102 on the surface thereof, and can reduce the difficulty of the subsequent peeling process.
As an example, the separation layer 102 may include one of an adhesive tape and a polymer, and a method of removing the supporting substrate 101 and the separation layer 102 may include one of a laser irradiation method and a heating method. As the separation layer 102, a PI thin film or a light-to-heat conversion Layer (LTHC) may be used, and in this embodiment, the separation layer 102 is formed on the supporting substrate 101 by a spin coating process using the LTHC, and then cured and formed by a curing process. The LTHC has stable performance and smooth surface, is beneficial to obtaining a flat rewiring layer subsequently, and has low stripping difficulty in the subsequent stripping process, for example, the LTHC can be heated based on laser so as to be stripped from the LTHC.
As shown in fig. 3, the redistribution layer is formed on the separation layer 102, and the redistribution layer includes a first surface in contact with the separation layer 102 and an opposite second surface.
Specifically, the redistribution layer may include a metal layer 201, a metal contact plug 202, and a dielectric layer 203. The redistribution layer may include a single layer or multiple layers, which are selected according to specific needs, and in this embodiment, the metal layer 201 including 3 layers is taken as an example, but not limited thereto. The material of the dielectric layer 203 may include one or a combination of two or more of epoxy resin, silica gel, PI, PBO, BCB, silicon oxide, phosphosilicate glass, and fluorine-containing glass; the material of the metal layer 201 and the metal contact plug 202 may include one or a combination of two or more of copper, aluminum, nickel, gold, silver and titanium, and preferably, the same metal material is used for the metal layer 201 and the metal contact plug 202 which are in contact with each other, so as to avoid the cracking phenomenon caused by the thermal expansion problem between different metal materials. In this embodiment, the metal layer 201 and the metal contact plug 202 are both made of a common copper metal, but not limited thereto. The method for manufacturing the metal layer 201 may include one or a combination of chemical plating, electroplating, evaporation and sputtering; the method for manufacturing the metal contact plug 202 may include a wire bonding method, a welding method, an etching method, etc.; the method for manufacturing the dielectric layer 203 may include one or a combination of physical vapor deposition or chemical vapor deposition.
As an example, it is preferable that the metal layer 201 of the redistribution layer is exposed on both the first surface and the second surface of the redistribution layer, so as to facilitate subsequent electrical connection, reduce the process difficulty, and avoid the etching operation on the redistribution layer.
As shown in fig. 4, an LED chip is provided and fixed on the second surface of the redistribution layer, and the LED chip is electrically connected to the metal layer 201 on the second surface of the redistribution layer.
Specifically, the LED chip includes an RGB three-primary-color LED chip, the RGB three-primary-color LED chip includes a red light emitting unit 301, a green light emitting unit 302, and a blue light emitting unit 303, the RGB three-primary-color LED chip has an electrode 304, the electrode 304 is electrically connected to the red light emitting unit 301, the green light emitting unit 302, and the blue light emitting unit 303, and the red light emitting unit 301, the green light emitting unit 302, and the blue light emitting unit 303 emit light by applying a suitable voltage to the electrode 304, and the red light emitting unit 301, the green light emitting unit 302, and the blue light emitting unit 303 may emit light simultaneously or selectively. A conductive adhesive or a conductive film may be used as a connecting member for fixing the RGB three-primary-color LED chip on the second surface of the redistribution layer, and the electrode 304 is electrically connected to the metal layer 201, and the specific types of the conductive adhesive and the conductive film are not limited herein. The arrangement and number of the RGB three-primary-color LED chips on the second surface of the redistribution layer may be selected according to the requirement of a light emitting lattice, such as a triangle, a circle, a square, a diamond, a curve, etc., but are not limited to the examples listed here.
As shown in fig. 5, the LED chip is packaged by a packaging layer 401, and the packaging layer 401 covers the second surface of the redistribution layer, covers the side surface of the LED chip, and exposes the light emitting surface of the LED chip.
As an example, the encapsulation method of the encapsulation layer 401 may include one of compression molding, transfer molding, liquid encapsulation molding, vacuum lamination, and spin coating, and the material of the encapsulation layer 401 may include one of polyimide, silicone, and epoxy. The encapsulation layer 401 may also be a composite encapsulation stack structure formed by different materials or different processes, which is not limited herein.
As an example, after the encapsulation layer 401 is formed, a step of thinning the encapsulation layer 401 may be further included to expose the light emitting surface of the LED chip to the encapsulation layer 401. The thinning method may include one of a physical mechanical polishing method or a physical chemical mechanical polishing method, which is not limited herein.
As shown in fig. 6, the supporting substrate 101 and the separation layer 102 are removed to expose the first surface of the redistribution layer, wherein the metal layer 201 is exposed at the first surface of the redistribution layer.
As shown in fig. 7, a metal connector is formed on the first surface of the redistribution layer, and the metal connector is electrically connected to the redistribution layer.
As an example, the metal connection member includes one or a combination of a metal thin film, a metal bump and a metal pillar, and preferably, the metal connection member includes a Ni/Au complex metal thin film formed by a Ni metal layer 501 and an Au metal layer 502, so that the Au metal layer 502 can be prevented from diffusing into the metal layer 201 by the Ni metal layer 501, and the metal layer 201 can be prevented from being oxidized by the Ni/Au complex metal thin film, so as to facilitate the operation of the subsequent process. The method for forming the metal connecting piece can comprise one or a combination of chemical plating, electroplating, evaporation and sputtering. In this embodiment, electroless plating is preferred to reduce process complexity. The metal connecting member may also adopt one or a combination of the metal bump and the metal pillar, or one of a group formed by the metal film and one or a combination of the metal bump and the metal pillar. The method for forming the metal bump or the metal column can adopt one or a combination of processes such as reflow soldering, routing, etching or attaching. The types, thicknesses and distributions of the metal thin film, the metal bump and the metal pillar are not limited herein.
As shown in fig. 8 to 9, a dicing step may be further included to obtain a package structure of individual fan-out LEDs, as shown in fig. 10. The cutting method can be selected according to the needs, such as one or a combination of a mechanical cutting method or a laser cutting method can be adopted. In the dicing process, the prepared wafer may be placed on the adhesive film 601, wherein the adhesive film 601 may be a film with adhesiveness, such as a blue film, to provide a flat bearing surface for bearing the wafer through the adhesive film 601. During cutting, the adhesive film 601 is not cut through, so that the adhesive film 601 can be directly transmitted to the next process for application, for example, the adhesive film 601 can be directly applied during chip bonding operation, thereby improving the convenience of operation, improving the quality of the LED chip and avoiding the damage of the LED chip. The specific cutting position of the wafer can also be selected according to the requirement to obtain the package structure of the fan-out LEDs with different numbers or different layouts, which is not limited herein.
As shown in fig. 10, this embodiment further provides a package structure of a fan-out LED, where the package structure includes: a rewiring layer including a first side and an opposing second side; the LED chip is positioned on the second surface of the rewiring layer and is electrically connected with the rewiring layer; the packaging layer 401 covers the second surface of the rewiring layer, covers the side surface of the LED chip and exposes the light emitting surface of the LED chip; and the metal connecting piece is positioned on the first surface of the rewiring layer and is electrically connected with the rewiring layer.
As an example, the LED chip includes an RGB three primary color LED chip. The RGB three-primary-color LED chip includes a red light emitting unit 301, a green light emitting unit 302, and a blue light emitting unit 303, the RGB three-primary-color LED chip has an electrode 304, the electrode 304 is electrically connected to the red light emitting unit 301, the green light emitting unit 302, and the blue light emitting unit 303, the red light emitting unit 301, the green light emitting unit 302, and the blue light emitting unit 303 emit light by applying a suitable voltage to the electrode 304, and the red light emitting unit 301, the green light emitting unit 302, and the blue light emitting unit 303 may emit light simultaneously or selectively. A conductive adhesive or a conductive film may be used as a connecting member for fixing the RGB three-primary-color LED chip on the second surface of the redistribution layer, and the electrode 304 is electrically connected to the metal layer 201, and the specific types of the conductive adhesive and the conductive film are not limited herein. The arrangement and number of the RGB three-primary-color LED chips on the second surface of the redistribution layer may be selected according to the requirement of a light emitting lattice, such as a triangle, a circle, a square, a diamond, a curve, etc., but are not limited to the examples listed here.
As an example, it is preferable that the first side and the second side of the redistribution layer both expose the metal layer 201 of the redistribution layer.
Specifically, the redistribution layer may include a metal layer 201, a metal contact plug 202, and a dielectric layer 203. The redistribution layer may include a single layer or multiple layers, which are selected according to specific needs, and in this embodiment, the metal layer 201 including 3 layers is taken as an example, but not limited thereto. The material of the dielectric layer 203 may include one or a combination of two or more of epoxy resin, silica gel, PI, PBO, BCB, silicon oxide, phosphosilicate glass, and fluorine-containing glass; the material of the metal layer 201 and the metal contact plug 202 may include one or a combination of two or more of copper, aluminum, nickel, gold, silver and titanium, and preferably, the same metal material is used for the metal layer 201 and the metal contact plug 202 which are in contact with each other, so as to avoid the cracking phenomenon caused by the thermal expansion problem between different metal materials. In this embodiment, the metal layer 201 and the metal contact plug 202 are both made of a common copper metal, but not limited thereto.
As an example, the encapsulation layer 401 may include one of a polyimide encapsulation layer, a silicone encapsulation layer, and an epoxy encapsulation layer. The encapsulation layer 401 may also be a composite encapsulation stack structure formed by different materials or different processes, which is not limited herein.
As an example, the metal connector may include one or a combination of a metal film, a metal bump, and a metal pillar. Preferably, the metal connection member includes a Ni/Au complex metal film formed by a Ni metal layer 501 and an Au metal layer 502, so that the Au metal layer 502 can be prevented from diffusing into the metal layer 201 by the Ni metal layer 501, and the metal layer 201 can be prevented from being oxidized by the Ni/Au complex metal film, thereby facilitating the operation of the subsequent process. The metal connecting member may also adopt one or a combination of the metal bump and the metal pillar, or one of a group formed by the metal film and one or a combination of the metal bump and the metal pillar, and the type, thickness and distribution of the metal film, the metal bump and the metal pillar are not limited herein.
The embodiment also provides an electronic device, where the electronic device includes the package structure of the fan-out LED as described above, and the electronic device may include a display screen, such as a display screen of a smart device, such as a television, a computer, or a mobile phone.
As described above, the fan-out packaging of the LED chip is realized by fixing the LED chip and manufacturing the metal connecting member on the opposite two sides of the rewiring layer, and the packaging method, the packaging structure and the electronic device of the fan-out wafer level LED of the present invention can meet the ultra-high resolution packaging requirement of Micro LEDs, realize small line width packaging and meet the system type LED packaging. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (17)
1. A packaging method of a fan-out wafer level LED is characterized by comprising the following steps:
providing a supporting substrate, and forming a separation layer on the supporting substrate;
forming a rewiring layer on the separation layer, wherein the rewiring layer comprises a first surface and an opposite second surface, and the first surface is in contact with the separation layer;
providing an LED chip, fixing the LED chip on the second surface of the rewiring layer, and electrically connecting the LED chip with the rewiring layer;
packaging the LED chip by adopting a packaging layer, wherein the packaging layer covers the second surface of the rewiring layer, covers the side surface of the LED chip and exposes the light emitting surface of the LED chip;
removing the supporting substrate and the separation layer to expose the first surface of the rewiring layer;
and forming a metal connecting piece on the first surface of the rewiring layer, wherein the metal connecting piece is electrically connected with the rewiring layer.
2. The method of packaging a fan-out wafer level LED of claim 1, wherein: the LED chip comprises an RGB three-primary-color LED chip.
3. The method of packaging a fan-out wafer level LED of claim 1, wherein: the first and second faces of the re-routing layer both expose the metal layer of the re-routing layer.
4. The method of packaging a fan-out wafer level LED of claim 1, wherein: the packaging method of the packaging layer comprises one of compression molding, transfer molding, liquid sealing, vacuum lamination and spin coating, and the material of the packaging layer comprises one of polyimide, silica gel and epoxy resin.
5. The method of packaging a fan-out wafer level LED of claim 1, wherein: the separation layer includes one of an adhesive tape and a polymer, and the method of removing the supporting substrate and the separation layer includes one of a laser irradiation method and a heating method.
6. The method of packaging a fan-out wafer level LED of claim 1, wherein: the method for forming the metal connecting piece comprises one or a combination of chemical plating, electroplating, evaporation and sputtering.
7. The method of packaging a fan-out wafer level LED of claim 1, wherein: the metal connecting piece comprises one or a combination of a metal film, a metal bump and a metal column.
8. The method of packaging a fan-out wafer level LED of claim 1, wherein: the metal connecting piece comprises a Ni/Au composite metal film.
9. The method of packaging a fan-out wafer level LED of claim 1, wherein: and further comprising a cutting step to obtain an independent packaging structure of the fan-out type LED.
10. The method of packaging a fan-out wafer level LED of claim 1, wherein: the support substrate includes one of a glass substrate, a metal substrate, a semiconductor substrate, a polymer substrate, and a ceramic substrate.
11. A package structure of a fan-out LED, the package structure comprising:
a rewiring layer including a first side and an opposing second side;
the LED chip is positioned on the second surface of the rewiring layer and is electrically connected with the rewiring layer;
the packaging layer covers the second surface of the rewiring layer, covers the side surface of the LED chip and exposes the light emitting surface of the LED chip;
and the metal connecting piece is positioned on the first surface of the rewiring layer and is electrically connected with the rewiring layer.
12. The package structure of the fan-out LED of claim 11, wherein: the LED chip comprises an RGB three-primary-color LED chip.
13. The package structure of the fan-out LED of claim 11, wherein: the first and second faces of the re-routing layer both expose the metal layer of the re-routing layer.
14. The package structure of the fan-out LED of claim 11, wherein: the packaging layer comprises one of a polyimide packaging layer, a silica gel packaging layer and an epoxy resin packaging layer.
15. The package structure of the fan-out LED of claim 11, wherein: the metal connecting piece comprises one or a combination of a metal film, a metal bump and a metal column.
16. The package structure of the fan-out LED of claim 11, wherein: the metal connecting piece comprises a Ni/Au composite metal film.
17. An electronic device comprising the package structure of the fan-out LED of any one of claims 11 to 16.
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