CN111722671B - Timing method, timing device, terminal equipment and storage medium - Google Patents
Timing method, timing device, terminal equipment and storage medium Download PDFInfo
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Abstract
The application is applicable to the technical field of timing, and provides a timing method, a timing device, terminal equipment and a computer readable storage mediumThe method comprises the following steps: obtaining count value n of hardware timeriWherein the hardware timer operates in a heavy-duty mode of operation; according to the obtained count value niCalculating and obtaining the timing time t of the hardware timeriWherein i is not less than 1 and is an integer; acquiring the accumulated period duration of the hardware timer, wherein the accumulated period duration is the running time of the hardware timer from the beginning of counting to the last reloading; timing time t based on the hardware timeriAnd the accumulated period duration of the hardware timer to obtain the total timing time; the method and the device can solve the problems that the application scene of the existing timing method is limited and the function is easy to cause abnormity.
Description
Technical Field
The present application belongs to the field of timing technologies, and in particular, to a timing method, a timing device, a terminal device, and a computer-readable storage medium.
Background
As more and more software is loaded and run in the terminal device, the timing operation becomes a common operation. The existing timing operation mode is realized by adopting a timer interrupt mode.
However, in some application scenarios, timer interrupts may not be allowed or appropriate to start. For example, in the case of requiring high-resolution clocking, the frequency of timer interrupts is extremely high, which may seriously affect the execution timing of other transactions and cause functional abnormalities.
Disclosure of Invention
In view of this, embodiments of the present application provide a timing method, a timing apparatus, a terminal device, and a computer-readable storage medium, so as to solve the problems that an application scenario of an existing timing method is limited and a function is easily abnormal.
A first aspect of an embodiment of the present application provides a timing method, including:
obtaining count value n of hardware timeriWherein the hardware timer operates in a heavy-duty mode of operation;
according to the obtained count value niCalculating and obtaining the timing time t of the hardware timeriWherein i is more than or equal to 1 and is an integer;
acquiring the accumulated period duration of the hardware timer, wherein the accumulated period duration is the running time of the hardware timer from the beginning of counting to the last reloading;
timing time t based on the hardware timeriAnd accumulated cycles of said hardware timerAnd (4) the period duration is obtained, and the total timing time is obtained.
A second aspect of an embodiment of the present application provides a time keeping apparatus, including:
a count acquisition unit for acquiring a count value n of the hardware timeriWherein the hardware timer operates in a heavy-duty mode of operation;
the time counting unit is used for counting the time according to the acquired count value niCalculating and obtaining the timing time t of the hardware timeriWherein i is more than or equal to 1 and is an integer;
an accumulated period duration obtaining unit, configured to obtain an accumulated period duration of the hardware timer, where the accumulated period duration is an operation time of the hardware timer from counting to a previous reloading;
a total timing time calculation unit for calculating a timing time t based on the hardware timeriAnd the accumulated period duration of the hardware timer to obtain the total timing time.
A third aspect of an embodiment of the present application provides a terminal device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor implements the steps of the method provided in the first aspect of the embodiment of the present application when executing the computer program.
A fourth aspect of embodiments of the present application provides a computer-readable storage medium storing a computer program which, when executed by one or more processors, performs the steps of the method provided by the first aspect of embodiments of the present application.
A fifth aspect of embodiments of the present application provides a computer program product comprising a computer program that, when executed by one or more processors, performs the steps of the method provided by the first aspect of embodiments of the present application.
The embodiment of the application provides a timing method, during timing, an interruption mode is not needed, but a hardware timer is set to be in a heavy-load operation mode, the hardware timer can acquire a count value of the hardware timer in real time, calculate real-time timing time of the hardware timer according to the count value, and also can acquire accumulated cycle duration of the hardware timer, and finally, total timing time can be acquired according to the accumulated cycle duration of the hardware timer and the real-time timing time of the hardware timer after the heavy load; the embodiment of the application obtains the accumulated period duration according to the times of overloading, and then synthesizes the accumulated period duration with the real-time timing time after the overloading; the embodiment of the application does not need to consider interruption, so that the method and the device have wider application scenes, can provide higher timing resolution and accuracy, have higher operating efficiency, and cannot cause abnormity to other functions.
It is understood that the beneficial effects of the second aspect to the fifth aspect can be referred to the related description of the first aspect, and are not described herein again.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.
Fig. 1 is a schematic flow chart illustrating an implementation of a timing method according to an embodiment of the present application;
FIG. 2 is a flow chart illustrating an implementation of a method for calculating a timing time in the embodiment shown in FIG. 1;
FIG. 3 is a schematic flow chart illustrating another implementation of the method for calculating the timing time in the embodiment shown in FIG. 1;
FIG. 4 is a flow chart illustrating an implementation of a method for calculating a total timing time in the embodiment shown in FIG. 1;
fig. 5 is a schematic flow chart of another implementation of the timing method provided in the embodiment of the present application;
FIG. 6 is a schematic block diagram of a timing device provided in an embodiment of the present application;
fig. 7 is a schematic block diagram of a terminal device according to an embodiment of the present application.
Detailed Description
In the following description, for purposes of explanation and not limitation, specific details are set forth, such as particular system structures, techniques, etc. in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the specification of the present application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
In order to explain the technical solution described in the present application, the following description will be given by way of specific examples.
The embodiment of the application requires that the terminal equipment is provided with at least one hardware timer. Generally, a plurality of hardware timers are provided on a processor of a terminal device, and therefore, the application of the embodiment of the application is not limited in application scenarios due to the limitation of the number of the hardware timers.
Before the timing method provided by the embodiment of the present application is implemented, a timing unit needs to be determined in advance, where the timing unit is a minimum duration of the timing method, for example, 10 milliseconds, 1 millisecond, 1 microsecond, 100 nanoseconds, and the like; it is also necessary to set a start value and an end value at the time of counting of the hardware timer in advance, and for example, a start value register and an end value register may be set, and the start value and the end value set in advance are stored in the start value register and the end value register, respectively. The hardware timer may count according to the driving clock, and may increase or decrease 1 count when counting. After the above is determined, the running period of the hardware timer (i.e. the time counted from the starting value to the ending value and then counted again to the starting value, which can also be understood as the time of one week running of the hardware timer) can be obtained.
For example, if the hardware timer is to count down by 1, the frequency of the driving clock is 6MHZ, the preset count start value is 59999999, and the count cutoff value is 0, the operation cycle of the hardware timer is: (59999999-0+1)/6000000 for 10 seconds;
when the unit time length is second, the counting number of the hardware timer in the unit time length is as follows: (59999999-0+1)/10 ═ 6000000;
when the length is millisecond, the counting number of the hardware timer in the unit time length is as follows: (59999999-0+1)/10000 ═ 6000;
when the unit time length is microsecond, the counting number of the hardware timer in the unit time length is as follows: (59999999-0+1)/10000000 ═ 1.
Of course, in practical applications, the operation period may be preset, and the start value and the cut-off value may be determined according to the operation period and the frequency of the driving clock.
After the running period of the timer is determined, in order to obtain a timing time longer than the running period, the hardware timer needs to be set to a heavy-load running mode, when the hardware timer works in the heavy-load running mode, the hardware timer is driven by a timing clock (or a driving clock) to increase 1 or decrease 1 counting from a preset initial value and start to increase 1 or decrease 1 counting from the preset initial value again after a count value is the same as a preset cutoff value, and the process is circulated until the timing is stopped, and in order to finally obtain the total timing time, an accumulated period duration corresponding to the number of times of heavy-load running of the hardware timer needs to be obtained.
After the hardware timer is set as described above, the timing method provided by the embodiment of the present application can be implemented.
Fig. 1 is a schematic flow chart of an implementation of a timing method provided in an embodiment of the present application, and as shown in the figure, the method may include the following steps:
step S101, obtaining the count value n of the hardware timeriWherein the hardware timer operates in a heavy-duty mode of operation.
In the embodiment of the present application, after the start of the timing, the hardware timer needs to count up or down by 1 from a preset initial value according to the frequency of the driving clock. The manner of obtaining the count value of the hardware timer may be a polling manner, that is, when an application program that is dependent on the timing of the hardware timer needs to call a timing function, a task of calculating the total time of the hardware timer needs to be executed once (that is, the current count value of the hardware timer is read, and the total timing time is calculated according to the count value and the accumulated period duration). The above description is referred to the heavy load operation mode, and the details are not repeated herein.
In addition, after the hardware timer starts counting, the first count value of the hardware timer is the start value nsIf the hardware timer starts from the start value nsStart counting to a cut-off value neThen, the count value at the next counting time becomes the initial value n againsHowever, since the timing function is called randomly, the count value of the hardware timer obtained when the counting function is called for the first time can be recorded as n1And the count value of the hardware timer acquired when the hardware timer is called for the second time is recorded as n2The count value of the hardware timer obtained when the ith time is called is recorded as niThus, niThe specific values represented are also random.
Step S102, according to the obtained count value niCalculating and obtaining the timing time t of the hardware timeriWherein i is not less than 1 and i is an integer.
In the embodiment of the present application, after the count value is obtained, the timing time indicated by the count value can be calculated and obtained according to the count value.
For example, when 1 count is incremented, the initial value is 0, the cutoff value is 59999999, and the frequency of the clock is 6MHZ, it can be calculated that the number of counts of the hardware timer per microsecond is 1, or the time consumed by the hardware timer per 1 count is 1 microsecond; when the count value of the hardware timer changes from 0 to 55, the count value represents the timing time: 55 microseconds.
As another embodiment of the present application, the obtaining of the count value n is based oniCalculating and obtaining the timing time t of the hardware timeriThe method comprises the following steps:
when the hardware timer is in a 1 increasing counting mode, the hardware timer is calculated according to a formula
Or
Calculating the timing time t of the hardware timeri；
Wherein n issA start value, n, when counting for said hardware timeriFor the ith count value n after the hardware timer starts countingeA cutoff value, t, for the hardware timer countingiA count value of n for the hardware timeriTiming time of time representation, nTThe counting number of the hardware timer in unit time length and the running period T are the starting value n of the hardware timersCount again to the initial value neOf course, the hardware timer may be set to a value n from the cutoff valueeCount again to a cutoff value neThe timing time of (2).
In the embodiment of the present application, when the timing time is calculated according to the count value, the timing time corresponding to the count value may be calculated according to the time from the start value to the count value; the difference value (counting number) between the current counting value and the initial value is firstly calculated, and then the timing time corresponding to the counting value can be obtained by dividing the difference value (counting number) between the counting value and the initial value by the counting number in the unit time length.
Since the time from the starting value to the ending value of the hardware timer is fixed, the timing time t of the hardware timer can be calculated reverselyi。
Referring to fig. 2, fig. 2 is a schematic flow chart of an implementation of a method for calculating a timing time, as shown in the figure, a hardware timer starts from a starting value n within an operation period TsStarting to count until a cutoff value neSince the counting method is 1 increment, n ise≥ni≥nsThe count value of the hardware timer is neTime t of hardware timeriAnd
is T, so the count niCorresponding timing time
In summary, the count value n of the hardware timeriCorresponding timing time tiThe method can be determined in two ways, namely, the timing time corresponding to the count value which is already carried out is calculated according to the forward direction; in another mode, the counting time corresponding to the non-performed counting time value in one operation cycle is reversely calculated, and then the counting time corresponding to the non-performed counting time value is subtracted from the operation cycle to obtain the counting value n of the hardware timeriCorresponding timing time ti。
As mentioned above, the hardware timer may be a count of 1 increment or a count of 1 decrement, the above examples are count of 1 increment, and how to calculate the count value n of the hardware timer when count of one decrement is described belowiCorresponding timing time ti。
As another embodiment of the present application, the counting time t of the hardware timer is calculated and obtained according to the obtained count valueiThe method comprises the following steps:
when the hardware timer is in a count-down-1 mode, the method passes a formula
Or
Calculating the timing time t of the hardware timeri；
Wherein n issA start value, n, when counting for said hardware timeriFor the ith count value n after the hardware timer starts countingeA cutoff value, t, for the hardware timer countingiA count value of n for the hardware timeriTiming time of time, nTThe counting number of the hardware timer in unit time length and the running period T are the starting value n of the hardware timersStart counting to a cut-off value neThen, the initial value n is counted againsThe timing time of (2).
In the embodiment of the present application, when the timing time is calculated according to the count value, the timing time corresponding to the count value may be calculated according to the time from the start value to the count value; the difference value (counting number) between the current counting value and the initial value is firstly calculated, and then the timing time corresponding to the counting value can be obtained by dividing the difference value (counting number) between the counting value and the initial value by the counting number in the unit time length.
Since the time from the starting value to the ending value of the hardware timer is fixed, the timing time t of the hardware timer can be calculated reverselyi。
Referring to fig. 3, fig. 3 is a schematic flow chart of an implementation of another method for calculating a timing time according to an embodiment of the present application; as shown, the hardware timer starts from a starting value n within one running period TsStarting to count until a cutoff value neSince the count is 1-down, n ise≤ni≤nsThe count value of the hardware timer is niTime t of hardware timeriAnd
is T, so the count niCorresponding timing time
In summary, the count value n of the hardware timeriCorresponding timing time tiThe method can be determined in two ways, namely, the timing time corresponding to the count value which is already carried out is calculated according to the forward direction; in another mode, the counting time corresponding to the non-performed counting time value in one operation period is reversely calculated, and then the counting value n of the hardware timer corresponding to the non-performed counting time value is subtracted from the operation periodiCorresponding timing time ti。
Note also here that tiIs according to niIs determined, so that the value of i is always increased, but t is always increasediThe value of (c) is always cycled between 0 and T. Therefore, tiThe value of (A) represents not the total timer time, but a hardware timerCounting from a start value to niTime of the indicated count value. As mentioned above, the count value n of the hardware timer is calculatediCorresponding timing time tiIn time, the counting number n of the hardware timer in unit time length is all neededTAfter the hardware timer counts from the starting value to the ending value, the time to wrap back to the starting value again may be predetermined:
where f is the frequency of the driving clock.
The counting number of the hardware timer in unit time length is obtained by the following formula:
wherein n isTThe number of the hardware timer in unit time length, nsA start value, n, when counting for said hardware timereAnd T is a cut-off value when the hardware timer counts, and T is the running period of the hardware timer.
Step S103, acquiring the accumulated period duration of the hardware timer, wherein the accumulated period duration is the running time of the hardware timer from the beginning of counting to the last reloading.
In the embodiment of the present application, when the accumulated period duration is calculated, the accumulated period duration may be calculated by multiplying a heavy load number by an operation period, where the heavy load number indicates how many operation periods the hardware timer has performed, see fig. 4, where fig. 4 is a schematic implementation flow diagram of a method for calculating total timing time; as shown, the hardware timer reload runs 3 times, i.e. 3 running cycles have elapsed, then the accumulated cycle duration is 3T.
Of course, the reloading frequency of the hardware timer can be determined by any one of the following methods:
when the count value of the hardware timer is equal to the start value n againsReloading the hardware timerAdding 1 to the number;
when the counting times of the hardware timer is km +1, adding 1 to the heavy load times of the hardware timer, wherein k is more than or equal to 1, and m is the counting number of the hardware timer counting one week; m ═ ns-ne|+1。
When the timing time t of the hardware timeriLess than the timing time ti-1And adding 1 to the reloading times of the hardware timer.
Of course, in practical applications, the reloading times of the hardware timer may be selected in other manners, and are not limited herein.
As another embodiment of the present application, the counting time t of the hardware timer is obtained through calculationiAnd then, the method further comprises the following steps:
if i is more than or equal to 2, if the timing time t of the hardware timer isiLess than the timing time ti-1And increasing the duration of the accumulated period by one operation period, or increasing the reloading times of the hardware timer by 1.
In the embodiment of the present application, a call cycle of the timing function may be limited to be less than or equal to an operation cycle of the hardware timer, and a call cycle of the timing function may also be limited to be less than an operation cycle of the hardware timer.
When the calling period of the timing function is limited to be smaller than the running period of the hardware timer, the timing time t of the hardware timer is calculated when the counting function is called each timeiOr is greater than ti-1Or is less than ti-1. If t isiGreater than ti-1If the hardware timer is not reloaded within the current reloading period, the reloading times of the hardware timer do not need to be increased by 1 or the accumulated period duration does not need to be increased by one running period, that is, the reloading times or the accumulated period duration of the hardware timer is kept unchanged. If t isiLess than ti-1It means that the next reload period has been entered, and therefore it is necessary to increase the duration of the accumulation period by one run period or increase the number of reloads of the hardware timer by 1.
When defining the timing functionWhen the using period is less than or equal to the running period of the hardware timer, the counting time t of the hardware timer is calculated every time a counting function is callediOr is greater than ti-1Or is less than ti-1And in another case is equal to ti-1. If t isiGreater than ti-1If the hardware timer is not reloaded within the current reloading period, the reloading times of the hardware timer do not need to be increased by 1 or the accumulated period duration does not need to be increased by one running period, that is, the reloading times or the accumulated period duration of the hardware timer is kept unchanged. If t isiIs less than or equal to ti-1It means that the next reload period has been entered, and therefore it is necessary to increase the duration of the accumulation period by one run period or increase the number of reloads of the hardware timer by 1. Especially at tiIs equal to ti-1The time interval between the time when the counting function is called and the time when the counting function is called last time is just one running period.
Step S104, timing time t based on the hardware timeriAnd the accumulated period duration of the hardware timer to obtain the total timing time.
In the embodiment of the present application, as mentioned above, the reloading times indicate how many running cycles the hardware timer has performed, and referring to fig. 4, the reloading of the hardware timer has been performed 3 times, that is, the total time counted by the hardware timer is the running cycles of 3 times plus the current count value niCorresponding timing time ti，
As another embodiment of the present application, the timing time t based on the hardware timeriAnd the accumulated period duration of the hardware timer to obtain the total timing time, comprising:
by the formula ttotal＝ti+ kT, calculating to obtain the total timing time
Wherein, ttotalFor total time, kT is the cumulative cycle duration;
the accumulated period duration kT can be directly obtained, and can be calculated according to the number of reloading times and the running period, i.e., k is the number of reloading times of the hardware timer, and T is the timing time of once reloading running of the hardware timer.
In the embodiment of the present application, t is as described aboveiThe indicated timing time is not the total timing time from the beginning of the hardware timer to the present, but the count value of the hardware timer is counted from the starting value to niThe time the indicated count value has gone, i.e. tiThe time that the hardware timer runs in the current running period is shown, so the accumulated period duration represented by the product of the overloading times and the running period is also required to be added.
In addition, the timing method described in the embodiment of the present application may be understood as a timing function, where the steps from step S101 to step S104 are executed in a loop once the timing function is called, and similarly, the count value n of the hardware timer is counted every time the timing function is callediI in (1) is increased. Due to the randomness with which the timing function is called, niThe value of the ith time called after the hardware timer starts to time is shown.
For a clearer understanding of the embodiments described in the present application, referring to fig. 5, fig. 5 is a flowchart illustrating an implementation of another timing method provided in the embodiments of the present application, and as shown in the figure, the method includes:
first, some variables are defined, for example,
Tlastthe timer is used for recording the last time of the hardware timer when the hardware timer is read for the last time;
Tcyclesfor recording the accumulated period duration; that is, the duration occupied by all the complete operation cycles in the whole process of the hardware timer from the starting value to the ending value in cycles, that is, the duration of the last incomplete cycle is not included;
Tcurrentthe access unit is used for accessing the current timing time which takes the unit time length as the timing unit and corresponds to the current counting of the hardware timer;
n can also be pre-calculated before timingT，
The content which needs to be calculated frequently is transferred to the front of the timer for timing, so that the counting number of the timers corresponding to the unit time length can be prevented from being calculated repeatedly in the timing process. Therefore, the calculation amount of the timing function is reduced, the running speed of the timing function is accelerated, and the time consumption expense brought by the timing function is reduced to the maximum extent.
After the timing is started, the following steps are carried out:
(1) firstly, T islastAnd TcyclesThe initial value is set to 0, and,
(2) then reading the current count value of the timer from a count value register of the hardware timer;
(3) converting the count value into a timing value in a cycle according to the counting mode of the hardware timer, and storing the timing value into a variable Tcurrent。
(4) The current timing value T is calculatedcurrentT and last time value variable TlastComparing, namely performing timer wrap-around detection;
(5) if the current time value TcurrentLess than last time value TlastThen the period duration variable T will be accumulatedcyclesIncreasing a running period T can also be understood as adding 1 to the reloading times of the hardware timer;
it should be noted that, in practical application, the accumulated period duration may be directly added to the operation period T; it is also possible to count the number of reloads and then multiply the number of reloads by the operating period to obtain the accumulated period duration.
(6) Updating last time value TlastNamely: the current timing value T is calculatedcurrentIs assigned to Tlast。
(7) Will accumulate the period duration variable TcyclesPlus the current timer value TcurrentThe result of the addition is a long total time.
The judgment result in the step (4) is the current time value TcurrentGreater than last time value TlastAnd (4) directly jumping to the step (7).
Referring to fig. 5, the locking access lock is set before step (4), and after step (6), the access lock is released, so as to avoid timing errors in a multitasking environment, and operation atomicity guarantee is performed on (4) and (5) in the above steps by setting the access lock. The access lock can be one of any feasible process synchronization modes such as closing system interrupt, spin lock, signal lamp, mutex and the like, and the specific mode of the access lock can be selected according to available resources of the system and application needs.
Corresponding to the embodiment shown in fig. 1, that is, the timing time of the hardware timer includes two variables, which are: the current timing time and the last timing time;
calculating the timing time t of the hardware timeriAnd then, the method further comprises the following steps:
will time the time tiAssigning a value to the current timing time;
timing time t of the hardware timeriAnd a timing time ti-1Before the comparison, the method further comprises the following steps:
locking the access lock;
correspondingly, after the adding the duration of the accumulation period to one operation period, the method further comprises the following steps:
assigning the value of the current timing time as the last timing time;
releasing the access lock;
and the access lock is used for locking the steps of increasing the accumulated period duration by one operating period and assigning the value of the current timing time as the last timing time.
According to the embodiment of the application, the hardware timer is set to be in the heavy-load operation mode, in the timing process of the hardware timer, an operation period is added to the duration of the accumulated period every time the hardware timer runs once in a heavy load mode, in the current heavy-load operation period, the timing time in the current heavy-load operation period is calculated according to the count value of the hardware timer, and then the sum of the timing time in the current heavy-load operation period and the duration of the accumulated period is the total time. And in order to avoid timing errors in a multitasking environment, an access lock can be set in a multitasking scene. The timing method provided by the embodiment of the application has wider application scenes.
For example, since the embodiment of the present application does not use an interrupt manner to perform timing, the embodiment of the present application can be applied to an application scenario in which the timer interrupt is not allowed to be started or is not suitable for being started;
because the starting value, the ending value, the unit time length and the like of the timing can be preset, the method has higher resolution and accuracy, and can be applied to application scenes with higher requirements on the resolution and the accuracy of the timing, such as application scenes of power saving dormancy;
because some frequently-calculated works can be transferred to the program compiling stage in advance instead of the timing stage, the method and the device can save the operation amount and the calculation time when the timing function is called;
due to the fact that the access lock is arranged, timing confusion is avoided through the access lock when a plurality of tasks all need to call a timing function, and therefore the method and the device for timing synchronization can be applied to single-task application scene bars and can also be applied to multi-task application environments.
It should be understood that, the sequence numbers of the steps in the foregoing embodiments do not imply an execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
Fig. 6 is a schematic block diagram of a timing device according to an embodiment of the present application, and only a portion related to the embodiment of the present application is shown for convenience of explanation.
The timing device 6 may be a software unit, a hardware unit or a combination of software and hardware unit built in the mobile phone, the tablet computer, the notebook computer, the computer and other terminal devices, or may be integrated into the mobile phone, the tablet computer, the notebook computer, the computer and other terminal devices as an independent pendant, or may exist as an independent terminal device.
The timing device 6 includes:
a count acquisition unit 61 for acquiring a count value n of the hardware timeriWherein the hardware timer operates in a heavy-duty mode of operation;
the time-pieceA time calculating unit 62 for obtaining the count value niCalculating and obtaining the timing time t of the hardware timeriWherein i is more than or equal to 1 and is an integer;
an accumulated period duration obtaining unit 63, configured to obtain an accumulated period duration of the hardware timer, where the accumulated period duration is an operation time of the hardware timer from counting to a previous reloading;
a total time calculation unit 64 for calculating a time t based on the hardware timeriAnd the accumulated period duration of the hardware timer to obtain the total timing time.
As another embodiment of the present application, the accumulated period duration obtaining unit 63 is further configured to:
calculating the timing time t of the hardware timeriAnd then, the method further comprises the following steps:
if i is more than or equal to 2, if the timing time t of the hardware timer isiLess than the timing time ti-1And increasing the duration of the accumulation period by one operation period.
As another embodiment of the present application, the present timing time calculating unit 62 is further configured to:
when the hardware timer is in a 1 increasing counting mode, the hardware timer is calculated according to a formula
Or
Calculating the timing time t of the hardware timeri；
When the hardware timer is in a count-down-1 mode, the method passes a formula
Or
Calculating the timing time t of the hardware timeri；
Wherein n issA start value, n, when counting for said hardware timeriFor the ith count value n after the hardware timer starts countingeA cutoff value, t, for the hardware timer countingiA count value of n for the hardware timeriTiming time of time, nTThe counting number of the hardware timer in unit time length and the running period T are the starting value n of the hardware timersStart counting to a cut-off value neThen, the initial value n is counted againsThe timing time of (2).
As another embodiment of the present application, the total timing time calculation unit 64 is further configured to:
by the formula ttotal＝ti+ kT, calculating to obtain the total timing time, wherein ttotalTo total time, tiA count value of n for the hardware timeriThe timing time of the time, kT is the accumulated period duration,
k is the number of times of reloading from the beginning to the last reloading of the hardware timer, and T is the starting value n of the hardware timersStart counting to a cut-off value neThen, the initial value n is counted againsThe timing time of (2).
As another embodiment of the present application, the present timing time calculating unit 62 is further configured to:
calculating the timing time t of the hardware timeriThen, the time t will be countediAssigning a value to the current timing time;
correspondingly, the accumulated period duration obtaining unit 63 is further configured to:
after the duration of the accumulation period is increased by one operation period, assigning the value of the current timing time as the last timing time;
the timer device 3 further includes:
a locking unit 65 for counting time t of the hardware timeriAnd a timing time ti-1Locking the access lock before the comparison;
after the value of the current timing time is assigned to the last timing time, releasing the access lock;
and the access lock is used for locking the steps of increasing the accumulated period duration by one operating period and assigning the value of the current timing time as the last timing time.
It should be noted that, for the information interaction, execution process, and other contents between the above-mentioned devices/units, the specific functions and technical effects thereof are based on the same concept as those of the embodiment of the method of the present application, and specific reference may be made to the part of the embodiment of the method, which is not described herein again.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of each functional unit is illustrated, and in practical applications, the above-mentioned functional allocation may be performed by different functional units or modules according to requirements, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the above-mentioned apparatus may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
Fig. 7 is a schematic block diagram of a terminal device according to an embodiment of the present application. As shown in fig. 7, the terminal device 7 of this embodiment includes: one or more processors 70, a memory 71, and a computer program 72 stored in the memory 71 and executable on the processors 70. The processor 70, when executing the computer program 72, implements the steps in the various method embodiments described above, such as the steps S101 to S102 shown in fig. 1. Alternatively, the processor 70, when executing the computer program 72, implements the functions of the modules/units in the above-described apparatus embodiments, such as the functions of the modules 31 to 32 shown in fig. 3.
Illustratively, the computer program 72 may be partitioned into one or more modules/units that are stored in the memory 71 and executed by the processor 70 to accomplish the present application. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program 72 in the terminal device 7. For example, the computer program 72 may be divided into a count acquisition unit, a present-time counting time calculation unit, an accumulated period duration acquisition unit, and a total-time calculation unit, exemplarily:
the device comprises a count acquisition unit, a counting unit and a counting unit, wherein the count acquisition unit is used for acquiring the count value of a hardware timer, and the hardware timer works in a heavy load operation mode;
the time counting unit is used for counting the time according to the acquired count value niCalculating and obtaining the timing time t of the hardware timeriWherein i is more than or equal to 1 and is an integer;
an accumulated period duration obtaining unit, configured to obtain an accumulated period duration of the hardware timer, where the accumulated period duration is an operation time of the hardware timer from counting to a previous reloading;
a total timing time calculation unit for calculating a timing time t based on the hardware timeriAnd the accumulated period duration of the hardware timer to obtain the total timing time.
Other units or modules can be referred to the description of the embodiment shown in fig. 6, and are not described again here.
The terminal equipment includes but is not limited to a processor 70 and a memory 71. It will be appreciated by a person skilled in the art that fig. 7 is only one example of a terminal device 7 and does not constitute a limitation of the terminal device 7, and may comprise more or less components than shown, or combine some components, or different components, for example, the terminal device 7 may further comprise an input device, an output device, a network access device, a bus, etc.
The Processor 70 may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field-Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic device, discrete hardware component, etc. A general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
The memory 71 may be an internal storage unit of the terminal device 7, such as a hard disk or a memory of the terminal device 7. The memory 71 may also be an external storage device of the terminal device 7, such as a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), and the like, which are provided on the terminal device 7. Further, the memory 71 may also include both an internal storage unit and an external storage device of the terminal device 7. The memory 71 is used for storing the computer programs and other programs and data required by the terminal device 7. The memory 71 may also be used to temporarily store data that has been output or is to be output.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the embodiments provided in the present application, it should be understood that the disclosed terminal device, apparatus and method may be implemented in other ways. For example, the above-described terminal device embodiments are merely illustrative, and for example, the division of the modules or units is only one logical function division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or may be integrated into another system, or some features may be omitted or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow of the method of the embodiments described above can be realized by a computer program, which can be stored in a computer-readable storage medium and can realize the steps of the method embodiments described above when the computer program is executed by one or more processors.
Also, as a computer program product, when the computer program product runs on a terminal device, the terminal device is enabled to implement the steps in the above-mentioned method embodiments when executed.
Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain other components which may be suitably increased or decreased as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media which may not include electrical carrier signals and telecommunications signals in accordance with legislation and patent practice.
The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not substantially depart from the spirit and scope of the embodiments of the present application and are intended to be included within the scope of the present application.
Claims (8)
1. A method of timing, comprising:
obtaining count value n of hardware timeriWherein the hardware timer works in a heavy load operation mode, i is not less than 2, and i is an integer, and the count value n is obtainediAnd obtaining the count value ni-1Is less than or equal to the running period of the hardware timer;
according to the obtained count value niCalculating and obtaining the timing time t of the hardware timeriWill count the time tiAssigning a value to the current timing time;
locking the access lock;
if the current timing time of the hardware timer is less than the last timing time, increasing the accumulated period duration by one operation period and assigning the value of the current timing time to the last timing time;
releasing the access lock;
acquiring the accumulated period duration of the hardware timer, wherein the accumulated period duration is the running time of the hardware timer from the beginning of counting to the last reloading;
timing time t based on the hardware timeriAnd the accumulated period duration of the hardware timer to obtain the total timing time.
2. The timing method according to claim 1, wherein when the hardware timer is operating in the heavy-load operation mode, the hardware timer starts to count up or down by 1 from a preset starting value under the driving of the frequency of the timing clock, and starts to count up or down by 1 from the preset starting value again after the counting value is the same as the preset cutoff value.
3. Timing method according to claim 1, characterised in that said counting value n is obtained from said acquisitioniCalculating and obtaining the timing time t of the hardware timeriThe method comprises the following steps:
when the hardware timer is in a 1 increasing counting mode, the hardware timer is calculated according to a formula
Or
Calculating the timing time t of the hardware timeri；
When the hardware timer is in a count-down-1 mode, the method passes a formula
Or
Calculating the timing time t of the hardware timeri；
Wherein n issA start value, n, when counting for said hardware timeriFor the ith count value n after the hardware timer starts countingeA cutoff value, t, for the hardware timer countingiA count value of n for the hardware timeriTiming time of time, nTThe counting number of the hardware timer in unit time length and the running period T are the starting value n of the hardware timersStart counting to a cut-off value neThen, the initial value n is counted againsThe timing time of (2).
4. A timing method as claimed in claim 3, wherein the number of counts of said hardware timer per unit time duration is calculated by the following formula:
wherein n isTThe number of the hardware timer in unit time length, nsA start value, n, when counting for said hardware timereThe running period T is the cut-off value when the hardware timer counts, and the starting value n of the hardware timer is the running period TsStart counting to a cut-off value neThen, the initial value n is counted againsThe timing time of (2).
5. Timing method according to any one of claims 1 to 4, wherein said timing time t based on said hardware timeriAnd the accumulated period duration of the hardware timer to obtain the total timing time, comprising:
by the formula ttotal＝ti+ kT, calculating to obtain the total timing time;
wherein，ttotalTo total time, tiA count value of n for the hardware timeriThe timing time of the timer, kT is the accumulated period duration, k is the reloading times of the hardware timer from the beginning to the last reloading, and T is the initial value n of the hardware timersStart counting to a cut-off value neThen, the initial value n is counted againsThe timing time of (2).
6. A time keeping device, comprising:
a count acquisition unit for acquiring a count value n of the hardware timeriWherein the hardware timer works in a heavy load operation mode, i is not less than 2, and i is an integer, and the count value n is obtainediAnd obtaining the count value ni-1Is less than or equal to the running period of the hardware timer;
the time counting unit is used for counting the time according to the acquired count value niCalculating and obtaining the timing time t of the hardware timeri；
A locking unit for locking the access lock; if the current timing time of the hardware timer is less than the last timing time, increasing the accumulated period duration by one operation period and assigning the value of the current timing time to the last timing time; releasing the access lock;
an accumulated period duration obtaining unit, configured to obtain an accumulated period duration of the hardware timer, where the accumulated period duration is an operation time of the hardware timer from counting to a previous reloading;
a total timing time calculation unit for calculating a timing time t based on the hardware timeriAnd the accumulated period duration of the hardware timer to obtain the total timing time.
7. A terminal device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 5 when executing the computer program.
8. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program which, when executed by one or more processors, implements the steps of the method according to any one of claims 1 to 5.
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| US6385637B1 (en) * | 1997-08-21 | 2002-05-07 | Rockwell Science Center, Inc. | Periodic process timer |
| CN103425058A (en) * | 2012-05-15 | 2013-12-04 | 安凯(广州)微电子技术有限公司 | Timing method, central processing unit and electronic device |
| CN105718257A (en) * | 2016-01-13 | 2016-06-29 | 上海理工大学 | Embedded system-based timer device and timing method |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9298651B2 (en) * | 2013-06-24 | 2016-03-29 | International Business Machines Corporation | Continuous in-memory accumulation of hardware performance counter data |
| CN107273229B (en) * | 2017-05-24 | 2020-06-26 | 百富计算机技术（深圳）有限公司 | Method, device and computer readable storage medium for processing timer timing exception |
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6385637B1 (en) * | 1997-08-21 | 2002-05-07 | Rockwell Science Center, Inc. | Periodic process timer |
| CN103425058A (en) * | 2012-05-15 | 2013-12-04 | 安凯(广州)微电子技术有限公司 | Timing method, central processing unit and electronic device |
| CN105718257A (en) * | 2016-01-13 | 2016-06-29 | 上海理工大学 | Embedded system-based timer device and timing method |
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