CN108874375B

CN108874375B - Timer implementation method and device

Info

Publication number: CN108874375B
Application number: CN201810558752.8A
Authority: CN
Inventors: 徐佳宏; 陈华兵
Original assignee: Shenzhen Ipanel TV Inc
Current assignee: Shenzhen Ipanel TV Inc
Priority date: 2018-06-01
Filing date: 2018-06-01
Publication date: 2022-01-04
Anticipated expiration: 2038-06-01
Also published as: CN108874375A

Abstract

The invention provides a method and a device for realizing a timer, which define a cycle time stepper by absolute time started by a system in advance, initialize the cycle time stepper, allocate a corresponding index position for each timing node for storing the timing node, wherein the timing node comprises a timer mark and timing duration, register an event of the timing node and a callback function corresponding to the event in an index linked list of the cycle time stepper, realize the insertion and deletion of the timing node by the cycle time stepper, judge lost time scales by using the current system time in an active polling mode of a user thread, simplify a node book needing comparison, improve the efficiency of overtime judgment, confirm the next timing time according to the overtime execution time, thereby avoiding images of the overtime execution time, ensuring that each time a fixed timeout is called and no cumulative timeout effect is produced.

Description

Timer implementation method and device

Technical Field

The invention relates to the technical field of timers, in particular to a method and a device for realizing a timer.

Background

The earliest timing tools used by human beings are hourglass or hourglass, but after the clock is mature, people begin to try to improve the timer by using the brand new timing tools to achieve the purpose of accurately controlling the time. As a common and necessary technique in software development, a timer is an aggregate of a series of functions, and the method provided by the timer enables software to complete a specified function within a fixed time, and aims to enable the software to automatically perform a certain operation or task within the fixed time.

Generally, a high-precision timer is realized by means of providing an interrupt by a hardware timer, and the high-precision timer is also the reference timer with the highest precision of a software system. In an actual C language program of a computer, it is common that one module executes a plurality of operations, but if a plurality of operations are performed simultaneously, the program efficiency is low, the occupation rate of a Central Processing Unit (CPU) of the computer is too high, and the like, and in this case, the execution order of all the operations needs to be reasonably arranged, and therefore, the use of a timer is involved.

In the using process of the timer, the timer in the prior art needs to create a timer node firstly, the timer node comprises timeout time, a timeout callback function and other information, then the created timer node is added into a timer manager linked list, a thread in the timer manager carries out periodic scanning of the linked list at intervals of a certain time, lost time is uniformly subtracted, and when a certain node is overtime, callback execution is passively triggered. However, when the timer is used, when a new timing node needs to be inserted, the time complexity of inserting the timing node into the linked list in time sequence is o (m), and the lost time is subtracted from all the timing nodes in each scanning, and the time complexity is also o (m).

Disclosure of Invention

In view of the above problems, the present invention is proposed to provide a method and an apparatus for implementing a timer, which overcome the above problems or at least partially solve the above problems, so as to achieve reduction of time complexity of timing node insertion during the use of the timer.

The specific technical scheme is as follows:

a method for realizing a timer defines a cycle time stepper in advance by absolute time started by a system, initializes the cycle time stepper, allocates a corresponding index position for each timing node, is used for storing the timing node, the timing node comprises a timer identifier and a timing duration, and registers an event of the timing node and a callback function corresponding to the event in an index linked list of the cycle time stepper, the method comprises the following steps:

determining the index position of the to-be-inserted timing node inserted into the stepper at the cycle moment according to the absolute time and the corresponding index value;

inserting the timing node to be inserted into the cycle time stepper according to the index position, inquiring a corresponding event from the index linked list according to the timer identifier, and executing a callback function corresponding to the event;

and the single-thread polling detection overtime timing node of the stepper at the cycle moment feeds back an overtime result in a linked list mode, and determines the overtime execution time as the next timing time.

Further, the step of determining, according to the absolute time and the corresponding index value, an index position at which the timing node to be inserted is inserted into the stepper at the cycle time includes:

calculating a time offset value when the timing node to be inserted is inserted according to the absolute time and the corresponding index value;

determining the total stepping number of the timing node to be inserted according to a preset stepping time scale value and the time deviation value;

determining a stepping index value and a stepping cycle number of the timing node to be inserted according to the stepping total number, the index value, the stepping maximum value and the maximum value of the number of each step;

and determining the index position of the timing node to be inserted according to the stepping index value and the stepping cycle number.

Further, the step of feeding back the result of timeout by the timing node for performing single thread polling detection timeout on the stepper at the cycle time in a linked list manner and determining the timeout execution time as the next timing time includes:

calculating the time difference between the detection time of the timing node to be polled and the absolute time;

calculating the stepping value of the timing node to be polled according to the time difference value and the time scale value of each stepping;

when the step value of the timing node to be polled is larger than zero, acquiring the current index value of the timing node to be polled;

judging whether an overtime timing node exists in the passed scale numerical value;

if yes, marking the corresponding timing node as overtime and outputting;

and if not, updating the index value and the stepping value of the timing node to be polled.

Further, still include:

acquiring an index value of the timing node to be deleted according to the moment stepper identification of the timing node of the transmitted parameter;

and determining the linked list head of the timing node to be deleted according to the index value, and deleting the timing node to be deleted from the index linked list.

An apparatus for implementing a timer, comprising:

the first processing unit is used for determining the index position of the stepper at the cycle moment, into which the timing node to be inserted is inserted, according to the absolute time and the corresponding index value;

the second processing unit is used for inserting the timing node to be inserted into the stepper at the cycle time according to the index position, inquiring a corresponding event from the index linked list according to the timer identifier, and executing a callback function corresponding to the event;

and the third processing unit is used for carrying out single-thread polling detection overtime timing node on the stepper at the cycle moment, feeding back an overtime result in a linked list mode, and determining the overtime execution time as the next timing time.

Further, the first processing unit is configured to:

Further, the third processing unit is configured to:

if yes, marking the corresponding timing node as overtime and outputting;

Further, still include: a fourth processing unit configured to:

A storage medium including a stored program,

wherein, when the program runs, the device where the storage medium is located is controlled to execute the implementation method of the timer.

A processor for running a program,

wherein, the program executes the method for implementing the timer.

By means of the technical scheme, the method and the device for realizing the timer provided by the invention define a cycle time stepper by absolute time started by a system in advance, initialize the cycle time stepper, allocate a corresponding index position for each timing node and store the timing node, wherein the timing node comprises a timer identifier and a timing duration, and register an event of the timing node and a callback function corresponding to the event in an index linked list of the cycle time stepper, and the method comprises the following steps: determining the index position of the stepper at the cycle time of the to-be-inserted timing node according to the absolute time and the corresponding index value; inserting a timing node to be inserted into the cycle time stepper according to the index position, inquiring a corresponding event from the index linked list according to the timer identifier, and executing a callback function corresponding to the event; and a timing node for detecting the overtime of the single-thread polling of the stepper at the circulating moment feeds back the overtime result in a linked list mode, and determines the overtime execution time as the next timing time.

The invention realizes the insertion and deletion of the timing node through the stepper at the cycle time, judges the lost time scale by using the current system time in a mode of active polling of the user thread, simplifies the node book to be compared, improves the efficiency of overtime judgment, and confirms the next timing time according to the overtime execution time, thereby not being influenced by the image of the overtime execution time, ensuring that the fixed overtime time is called every time and generating no overtime accumulation effect.

The foregoing description is only an overview of the technical solutions of the present invention, and the embodiments of the present invention are described below in order to make the technical means of the present invention more clearly understood and to make the above and other objects, features, and advantages of the present invention more clearly understandable.

Drawings

Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:

fig. 1 is a flowchart illustrating an implementation method of a timer according to an embodiment of the present invention;

fig. 2 is a flowchart illustrating a specific implementation manner of S101 according to an embodiment of the present invention;

fig. 3 is a flowchart illustrating a specific implementation manner of S103 according to an embodiment of the present invention;

fig. 4 shows a structure diagram of an implementation apparatus of a timer according to an embodiment of the present invention.

Detailed Description

Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

Referring to fig. 1, the present embodiment discloses a method for implementing a timer, which specifically includes the following steps:

s101, determining the index position of the stepper at the cycle time of the to-be-inserted timing node according to the absolute time and the corresponding index value.

In the embodiment of the invention, a cycle time stepper is defined by absolute time started by a system in advance, the cycle time stepper is initialized, a corresponding index position is allocated for each timing node and is used for storing the timing node, the timing node comprises a timer identifier and timing duration, and an event of the timing node and a callback function corresponding to the event are registered in an index linked list of the cycle time stepper.

First, the absolute time of system start is obtained, that is, the time counting is started from the moment of system start, which is not affected by the change of system time by the user, and the waiting timeout time is also an absolute time.

The absolute time elapsed by the system is then made into a cycle-indexed stepper, hereinafter referred to simply as a cycle-indexed stepper, each step time being 128ms, representing a time precision that supports timing. As shown in the first table, the maximum value and the minimum value of the stepper upper and lower limits are corresponding tables,

watch 1

Stepper upper and lower limits	Step time
		Maximum value N-1	128ms
N-2	128ms
		N-3	128ms
Minimum value of 0	128ms

Defining the number of steps as 512 steps, then the duration of time indicating the total from the minimum lower limit to the maximum upper limit is:

step scale time, step number 128ms 512 ms 65536ms 1minute

Namely: and (4) circulating when the maximum timing time of each round is about 1minute, and continuously starting to re-time the circulation from the maximum upper limit to the minimum lower limit to form a circulating stepper. The number counter of one cycle is added to form an infinite timing timer, 1 is added in each round, and an unsigned 32-bit integer number is used for timing more than 8000 years, which is enough to meet the actual requirement. Specifically, the time scale value of each STEP is defined as STEP _ TIMER, and the value definition may be 128; the maximum number of steps per round is defined as MAX _ TIMER, which may be 1024.

In the embodiment of the invention, a node which needs to be added into a timer and is used for realizing timing trigger is called a timing node, the timing node is provided with a timing identifier and a timing duration, the timing identifier is a unique value for distinguishing different nodes, and the timing duration is an absolute time value.

In the stepper at the cycle time defined in the embodiment of the invention, the scale attribute of each step is identified by a unique ID value, which is recorded as T _ ID, and in order to avoid the condition that the value is 0, the index value of the stepper is directly added with 1 to be assigned to the stepper, and the stepper can be quickly positioned to the scale position of the step by using the value, which is a fixed value. One number of times that a timing length needs to pass through a number of rounds is denoted as T _ domains.

Watch two

The stepper at the cycle time has a global manager, firstly, a head node of a double-linked list is initialized under each stepper index for storing the timing node, when a plurality of time nodes with the same step scale are formed, a multi-node double-linked list is formed, and the total number of all timing nodes is recorded.

The lowest level at the first initialization, i.e. the index value is 0, called the timing bottom, the time scale is the system time recorded as the first call, and is recorded as T _ btm (bottom time), and the index value is recorded as T _ bidx (bottom index). When the system is polled after operation, the two values will change, which is the opposite bottom, and the elapsed time change is calculated with the polling call.

And updating the T _ btm time and the T _ bidx index value during each polling call, stepping to the maximum upper limit value step by step according to the time difference between the polled current system and the T _ btm, and then returning to the minimum lower limit value to form a cycle stepper.

In the embodiment of the invention, according to the above description, one timing node is added to the stepper at the cycle time, the timing time needs to be calculated first, the index position of the stepper on which the timing node falls is determined, the number of rounds of the stepper which needs to be cycled is recorded, and the timing nodes are recorded on the index linked list of the stepper at the cycle time.

As shown in fig. 2, a specific implementation manner of S101 according to an embodiment of the present invention specifically includes a step of determining, according to the absolute time and a corresponding index value, an index position of a stepper at a cycle time into which a to-be-inserted timing node is inserted, including:

s201, calculating a time offset value when the timing node to be inserted is inserted according to the absolute time and the corresponding index value.

It should be noted that, the time offset value T _ duration of the timing node to be inserted is Tsys _ tm-T _ btm + T _ out, where Tsys _ tm represents the system time value when the node is currently inserted, the first time the node is inserted must start from the first index value at the bottom, T _ btm is equal to Tsys _ tm value, and T _ bidx is equal to 0, which indicates that the first time the node is inserted must be based on stepper index value 0; at the Nth insertion, T _ btm is updated after each polling call, and the value range is [ 0-MAX _ TIMER ], so that the difference between the current system time and T _ btm is greater than 0.

S202, determining the total stepping number of the timing node to be inserted according to the preset stepping time scale value and the time deviation value.

Note that, the total number of STEPs T _ off to be inserted into the timing node is (T _ duration + (STEP _ TIMER-1))/STEP _ TIMER, that is: "/" indicates a quotient.

And S203, determining the stepping index value and the stepping cycle number of the timing node to be inserted according to the stepping total number, the index value, the stepping maximum value and the maximum value of the number of each step.

It should be noted that the step index value T _ index of the timing node to be inserted is (T _ off + T _ bidx)% MAX _ TMR, that is: "%" indicates the remainder. And the number of stepping cycle rounds T _ remaining to be inserted into the timing node is T _ off/MAX _ TIMER.

And S204, determining the index position of the timing node to be inserted according to the stepping index value and the stepping cycle number.

And S102, inserting the timing node to be inserted into the cycle time stepper according to the index position, inquiring a corresponding event from the index linked list according to the timer identifier, and executing a callback function corresponding to the event.

In the embodiment of the invention, because the time stepper is an array data structure type, the linked list head for storing the time node can be obtained directly according to the index value T _ index of the array, the time node is added into the linked list head, and meanwhile, the T _ domains and the T _ id value are stored on the time node, thereby facilitating the deletion of the following time node.

Through the analysis, for the insertion of the time node, only a few simple remainders, modulo and simple calculation of the head of the inserted double-linked list are needed, the complexity of the algorithm is irrelevant to the number of the existing timing nodes in the time stepper, and the time complexity is O (1).

S103, carrying out single-thread polling detection overtime timing node on the stepper at the cycle moment, feeding back the overtime result in a linked list mode, and determining the overtime execution time as the next timing time.

The polling detection is invoked by a user thread, and only one single thread invocation is allowed for the same time stepper instance, mainly to avoid the lock of multithreading from influencing efficiency and safety, if timers need to be created in different threads, a plurality of time stepper instances can be created. And when polling call is carried out each time, the current system time is transmitted, after the detection is finished, the overtime result is returned in a linked list mode, and meanwhile, the time T _ left (millisecond) for waiting next time of detection is returned, wherein 1 represents that no overtime node can be waited.

As shown in fig. 3, a specific implementation manner of S103 according to the embodiment of the present invention is specifically that, a step of performing single-thread polling detection on a timeout timing node of a loop stepper, feeding back a result of timeout in a linked list manner, and determining that the timeout execution time is the next timing time includes:

s301, calculating the time difference between the detection time and the absolute time of the timing node to be polled.

It should be noted that the time difference T _ on between the detection time and the absolute time of the timing node to be polled is Tsys _ tm-T _ btm.

S302, calculating a stepping value of the timing node to be polled according to the time difference value and the time scale value of each stepping.

It should be noted that, the STEP value T _ n of the timing node to be polled is T _ on/STEP _ TIMER; t _ left ═ STEP _ TIMER-T _ off% STEP _ TIMER.

And S303, judging whether the step value of the timing node to be polled is larger than zero, if so, executing the step S304, and if not, exiting the polling.

S304, acquiring the current index value of the timing node to be polled.

S305, judging whether an overtime timing node exists in the passed scale numerical value, if so, executing a step S306; if not, go to step S307.

It should be noted that, it is determined whether there is a node overtime in the passing scale value, and if so, the node overtime is added to the overtime linked list. The specific polling scanning process is detailed as follows:

if the polling detection time passes through a scale and is exactly equal to 128ms, the head address of the linked list is obtained from the bottom T _ bidx value positioning, time nodes are scanned aiming at the nodes in the linked list, whether T _ domains is greater than 0 is checked, if yes, the T _ domains value is reduced by 1, and if not, the overtime time is deleted from the linked list and added into the overtime linked list.

If the time of polling detection passes through a plurality of scales, the above processes are executed circularly, and the specific circulating times are related to whether the linked list has timing nodes or not by the number of passed scales and the selected step index value.

S306, marking the corresponding timing node as overtime and outputting;

and S307, updating the index value and the stepping value of the timing node to be polled.

It should be noted that after the polling process is completed, there are several values that need to be re-assigned, which indicates that the stepper is a relative bottom design method, and a new value is calculated with respect to the following parameters when the timing node is calculated each time:

T_btm＝T_btm+T_n*STEP_TIMER

T_bidx＝(T_bidx+T_n)％MAX_TMR

the thread cycle can also be used as the time of next polling call according to the T _ left delay time, so that the idle time of a user thread can be reduced, the delay time needs to be recalculated when a new timing node is inserted, and the method adopts the minimum precision time 128ms as the timing call interval. If there are m timing nodes on the T _ n step scale, the time complexity of the scan is o (m).

In the embodiment of the invention, the default time node is inserted once, the time node is called once when the time node is overtime, and if a repeat timer is needed, the time node is inserted once again after the execution is finished. There is an advantage in that the timeout starts to be timed each time after the execution is completed. The traditional repeating timer is called at fixed time intervals, firstly, if a certain time is too long for calling, the time interval is called for a short time (T-execution time), secondly, if the execution time is too long and exceeds the multiple of the T time, the accumulated times of calling are executed for multiple times at the same time, therefore, the traditional timer is triggered according to the fixed time, and the execution interval cannot be adjusted according to the callback execution time. Compared with the traditional repeat timer, the repeat timer provided by the embodiment of the invention rejoins the timing node according to the time point after the execution is finished each time, ensures that the same time is called each time, can self-reckon the time according to the time point after the execution is finished, can not be influenced by the overtime execution time, ensures that the overtime time is called each time and does not generate the overtime accumulation effect.

Specifically, the method for implementing the timer may further include: deletion of timing nodes.

Acquiring an index value of a timing node to be deleted according to the moment stepper identification of the timing node of the transmitted parameter;

It should be noted that the array index value of the stepper is directly obtained according to the T _ id value of the time stepper identifier of the timing node of the incoming parameter, the head of the linked list is obtained by easily picking the address, the timing node value can be deleted according to the incoming parameter, and the node element can be directly deleted from the double linked list. And the positioning and the deletion of the nodes are independent of the number of the nodes pressed down in the stepper at the moment, and the time complexity is O (1).

The method for implementing the timer, provided by the embodiment of the invention, defines a cycle time stepper by absolute time started by a system in advance, initializes the cycle time stepper, allocates a corresponding index position for each timing node, is used for storing the timing node, comprises a timer identifier and a timing duration, and registers an event of the timing node and a callback function corresponding to the event in an index linked list of the cycle time stepper, and comprises the following steps: determining the index position of the stepper at the cycle time of the to-be-inserted timing node according to the absolute time and the corresponding index value; inserting a timing node to be inserted into the cycle time stepper according to the index position, inquiring a corresponding event from the index linked list according to the timer identifier, and executing a callback function corresponding to the event; and a timing node for detecting the overtime of the single-thread polling of the stepper at the circulating moment feeds back the overtime result in a linked list mode, and determines the overtime execution time as the next timing time. The invention realizes the insertion and deletion of the timing node through the stepper at the cycle time, judges the lost time scale by using the current system time in a mode of active polling of the user thread, simplifies the node book to be compared, improves the efficiency of overtime judgment, and confirms the next timing time according to the overtime execution time, thereby not being influenced by the image of the overtime execution time, ensuring that the fixed overtime time is called every time and generating no overtime accumulation effect.

Referring to fig. 4, based on the method for implementing a timer disclosed in the foregoing embodiment, this embodiment correspondingly discloses an apparatus for implementing a timer, which specifically includes: a first processing unit 401, a second processing unit 402 and a third processing unit 403, wherein:

the first processing unit 401 is configured to determine, according to the absolute time and the corresponding index value, an index position where the to-be-inserted timing node is inserted into the stepper at the cycle time;

the second processing unit 402 is configured to insert a timing node to be inserted into the cycle time stepper according to the index position, query a corresponding event from the index linked list according to the timer identifier, and execute a callback function corresponding to the event;

the third processing unit 403 is configured to perform a timeout timing node for single thread polling detection on the stepper at the cycle time, feed back a result that has been timed out in a linked list manner, and determine that the timeout execution time is the next timing time.

Further, the first processing unit 401 is configured to:

determining the total number of steps of the timing node to be inserted according to the preset step time scale value and the time deviation value;

Further, the third processing unit 403 is configured to:

calculating the time difference between the detection time and the absolute time of the timing node to be polled;

calculating a stepping value of a timing node to be polled according to the time difference value and the time scale value of each stepping;

if yes, marking the corresponding timing node as overtime and outputting;

Further, still include: a fourth processing unit configured to:

The data monitoring device based on the browser comprises a processor and a memory, wherein the first processing unit, the second processing unit, the third processing unit, the fourth processing unit and the like are stored in the memory as program units, and the processor executes the program units stored in the memory to realize corresponding functions.

The processor comprises a kernel, and the kernel calls the corresponding program unit from the memory. The kernel can be set to be one or more, and the time complexity of the timer node insertion in the using process of the timer is reduced by adjusting the kernel parameters.

The memory may include volatile memory in a computer readable medium, Random Access Memory (RAM) and/or nonvolatile memory such as Read Only Memory (ROM) or flash memory (flash RAM), and the memory includes at least one memory chip.

The embodiment of the invention provides a storage medium, wherein a program is stored on the storage medium, and the program is executed by a processor to realize the timer.

The embodiment of the invention provides a processor, which is used for running a program, wherein the method for implementing the timer is executed when the program runs.

The embodiment of the invention provides equipment, which comprises a processor, a memory and a program which is stored on the memory and can run on the processor, wherein the processor executes the program and realizes the following steps:

determining the index position of the stepper at the cycle time of the to-be-inserted timing node according to the absolute time and the corresponding index value;

inserting a timing node to be inserted into the cycle time stepper according to the index position, inquiring a corresponding event from the index linked list according to the timer identifier, and executing a callback function corresponding to the event;

and a timing node for detecting the overtime of the single-thread polling of the stepper at the circulating moment feeds back the overtime result in a linked list mode, and determines the overtime execution time as the next timing time.

Further, the step of determining the index position of the cycle time stepper into which the timing node to be inserted is inserted according to the absolute time and the corresponding index value includes:

Further, the step of performing single-thread polling detection overtime timing node on the stepper at the cycle time, feeding back the overtime result in a linked list mode, and determining the overtime execution time as the next timing time includes:

if yes, marking the corresponding timing node as overtime and outputting;

Further, still include:

The device herein may be a server, a PC, a PAD, a mobile phone, etc.

The present application further provides a computer program product adapted to perform a program for initializing the following method steps when executed on a data processing device:

if yes, marking the corresponding timing node as overtime and outputting;

Further, still include:

As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.

The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.

These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.

In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.

The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). The memory is an example of a computer-readable medium.

Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.

It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in the process, method, article, or apparatus that comprises the element.

The above are merely examples of the present application and are not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A method for realizing a timer is characterized in that a cycle time stepper is defined by absolute time started by a system in advance, the cycle time stepper is initialized, a corresponding index position is allocated to each timing node and used for storing the timing node, the timing node comprises a timer identifier and a timing duration, and an event of the timing node and a callback function corresponding to the event are registered in an index linked list of the cycle time stepper, and the method comprises the following steps:

2. The method of claim 1, wherein the step of determining an index position at which the timing node to be inserted is inserted into the stepper at the cycle time based on the absolute time and the corresponding index value comprises:

3. The method as claimed in claim 1, wherein the step of the timing node performing single-threaded polling detection timeout on the stepper at the cycle time feeding back the result of timeout in a linked list manner and determining the timeout execution time as the next timing time comprises:

if yes, marking the corresponding timing node as overtime and outputting;

4. The method of claim 1, further comprising:

5. An apparatus for implementing a timer, comprising:

the first processing unit is used for determining the index position of the stepper at the cycle time of the timing node to be inserted according to the absolute time and the corresponding index value;

the second processing unit is used for inserting the timing node to be inserted into the cycle time stepper according to the index position, inquiring a corresponding event from an index linked list according to a timer identifier, and executing a callback function corresponding to the event;

6. The apparatus of claim 5, wherein the first processing unit is configured to:

7. The apparatus of claim 5, wherein the third processing unit is configured to:

if yes, marking the corresponding timing node as overtime and outputting;

8. The apparatus of claim 5, further comprising: a fourth processing unit configured to:

acquiring an index value of the deleted timing node according to the time stepper identification of the timing node of the transmitted parameter;

and determining the head of the linked list of the timing node to be deleted according to the index value, and deleting the timing node to be deleted from the index linked list.

9. A computer-readable storage medium, characterized in that the storage medium includes a stored program,

wherein, when the program runs, the device in which the storage medium is located is controlled to execute the implementation method of the timer according to any one of claims 1-4.