CN111722265A - Satellite-borne single particle monitor - Google Patents
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- CN111722265A CN111722265A CN202010511603.3A CN202010511603A CN111722265A CN 111722265 A CN111722265 A CN 111722265A CN 202010511603 A CN202010511603 A CN 202010511603A CN 111722265 A CN111722265 A CN 111722265A
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Abstract
The invention belongs to the technical field of space particle measuring devices, and particularly relates to a satellite-borne single particle monitor, which comprises: the device comprises a first semiconductor detector (1), a second semiconductor detector (2), a third semiconductor detector (3), a device to be tested (4), a printed board (5), a preamplification circuit board (6), a first aluminum shielding box (7), a second aluminum shielding box (8), a third aluminum shielding box (9) and an FPGA processing circuit; a device to be tested (4) is welded and installed on one side of the printed board (5), a second aluminum shielding box (8) is installed on the printed board, and a first semiconductor detector (1) and a second semiconductor detector (2) are correspondingly installed at the top and the bottom of the printed board; and a third aluminum shielding box (9) is fixed on the other side of the printed board (5) through a second mounting hole (14), each semiconductor detector is respectively connected with the FGPA processing circuit through respective detection branch circuits, and the device to be tested (5) is connected with the FPGA processing circuit through a monitoring circuit arranged on the device to be tested.
Description
Technical Field
The invention belongs to the technical field of space particle measuring devices, and particularly relates to a satellite-borne single particle monitor.
Background
When a satellite runs in orbit, the space environment is complex and severe, and a large number of charged particles existing in the orbital space can be brought into play by threatening the safety or the efficiency of the spacecraft in orbit through various radiation effects including a single particle effect, a displacement damage effect, a total dose effect, a charge-discharge effect and the like. The single event effect is one of the radiation effects which are most harmful to an electronic system of a spacecraft, and can cause the change of the logic state of an electronic device for a satellite, the disorder of the logic function of a circuit, the error of data processed by a computer, the error of an instruction, the 'flying' of a program, the paralysis of the computer, the burning of a bulk silicon CMOS device and a power device by large current induced by the electronic device, so that the satellite is abnormal and failed, and even the satellite is in a disastrous situation.
Single event effect detection generally involves two aspects: spatial radiation LET (linear energy transfer, also called energy transfer linear density) spectrum and device single event upset event; and (3) detecting the spatial radiation LET spectrum on the orbit by adopting a silicon detection technology, measuring the spatial radiation LET spectrum, and simultaneously carrying out statistical analysis on the single event upset event of the on-satellite device. Obtaining effective and accurate space environment effect parameters through measuring a space radiation LET spectrum, wherein the effective and accurate space environment effect parameters are used for evaluating the on-orbit single event effect characteristics of the device; and obtaining the probability record of the on-orbit single event upset event of the device by actually measuring the single event upset event of the device.
At present, the detection technology of the space particle radiation effect in China is in a starting stage, and the detection technology capability has a great difference with the international. The existing particle radiation measuring device basically uses a group of sensors, generally only can measure a particle radiation LET spectrum, cannot monitor single particle upset of key devices of satellite-borne equipment, and is single in function.
The problems of the prior art mainly include:
the existing particle radiation LET spectrum detector is a radiation effect measuring device, has a single function, and cannot simultaneously realize the integration of single particle upset monitoring of a satellite-borne key core device. Specifically, on one hand, the particle radiation effect measuring devices installed on various domestic satellites are all 'three-in-one' products, are only used for measuring a spatial particle LET spectrum, are single in function, and cannot realize simultaneous measurement of the spatial radiation LET spectrum and single particle inversion of a device to be measured; on the other hand, the conventional detection device is limited in terms of system integration level, satellite power consumption and the like, so that the requirements of high integration and low power consumption can be met while the two measurement targets are difficult to realize.
Disclosure of Invention
In order to solve the defects in the prior art, the invention provides a satellite-borne single particle monitor, in particular to a detection device capable of simultaneously measuring a particle space radiation LET spectrum and the single particle turnover frequency of a device to be detected, and overcomes the defects that the existing particle radiation LET spectrum measurement device only uses one group of sensors to measure the particle space radiation LET spectrum, can not simultaneously monitor the single particle turnover of the device and has a single measurement function.
The satellite-borne single particle monitor comprises: the device comprises a first semiconductor detector, a second semiconductor detector, a third semiconductor detector, a device to be tested, a printed board, a preamplification circuit board, a first aluminum shielding box, a second aluminum shielding box, a third aluminum shielding box and an FPGA processing circuit;
welding and mounting a device to be tested on one side of the printed board; a second aluminum shielding box is arranged on the device to be tested, and the top and the bottom of the second aluminum shielding box are respectively and correspondingly provided with a first semiconductor detector and a second semiconductor detector;
a first aluminum shielding box is arranged in the extending direction of one side of the second aluminum shielding box, a common wall provided with a first pin is shared between the first aluminum shielding box and the second aluminum shielding box, and the first aluminum shielding box is connected with a preamplification circuit board arranged in the first aluminum shielding box through the first pin; the preamplification circuit board is fixed on four first mounting holes positioned at four corners of the first aluminum shielding box;
the third aluminum shielding box is fixed on the other side of the printing plate through the second mounting hole, a third semiconductor detector is fixedly mounted in the third aluminum shielding box, and a second pin is arranged on the third aluminum shielding box and connected with the preamplification circuit board arranged in the first aluminum shielding box;
the first semiconductor detector, the second semiconductor detector and the third semiconductor detector are respectively connected with the FGPA processing circuit through respective detection branches, and the device to be tested is connected with the FPGA processing circuit through a monitoring circuit arranged on the device to be tested.
As an improvement of the above technical solution, the preamplifier circuit board is respectively provided with a first preamplifier, a second preamplifier and a third preamplifier, which are respectively and correspondingly connected to the first semiconductor detector, the second semiconductor detector and the third semiconductor detector, and respectively amplify and convert the charge signal collected by the first semiconductor detector, the charge signal collected by the second semiconductor detector and the charge signal collected by the third semiconductor detector to obtain corresponding amplified and converted voltage pulse signals.
As one improvement of the above technical solution, the first semiconductor detector is connected in sequence with a first preamplifier, a shaping circuit, a main amplifier, a peak value holder and an ADC acquisition circuit arranged on a detection branch corresponding thereto;
the second semiconductor detector is connected with a first preamplifier, a forming circuit, a main amplifier, a peak value retainer and an ADC acquisition circuit which are arranged on a detection branch corresponding to the second semiconductor detector in sequence;
the third semiconductor detector is connected with a first preamplifier, a forming circuit, a main amplifier, a peak value retainer and an ADC acquisition circuit which are arranged on a detection branch corresponding to the third semiconductor detector in sequence;
the three detection branches are all connected with an FPGA processing circuit, and the FPGA processing circuit is connected with a satellite through an interface circuit and a satellite interface.
As an improvement of the above technical solution, a noise detection circuit is additionally arranged between the main amplifier and the peak value holder in each detection branch, and is configured to perform amplification processing and analog-to-digital conversion according to a received noise signal, and input an obtained digital signal to the FPGA processing circuit.
As an improvement of the above technical solution, the instrument noise detection circuit includes: an amplifier and an ADC acquisition circuit;
the output end of the amplifier is connected with the input end of the ADC acquisition circuit, and the output end of the ADC acquisition circuit is connected with the input end of the FPGA processing circuit.
As an improvement of the above technical solution, the FPGA processing circuit includes:
the first data receiving module is used for receiving the converted digital signals obtained by each semiconductor detector through the corresponding detection branch;
the first data processing module is used for carrying out amplitude analysis and data processing according to the obtained three converted digital signals to obtain an LET spectrum of the space charged particles;
the second data receiving module is used for receiving overturning information generated after the high-energy charged particles in the space are incident to a sensitive area of the SRAM chip;
the second data processing module is used for carrying out data processing on the overturning information to obtain the single-particle overturning times of the device to be tested;
the third data receiving module is used for receiving the digital signal output by the noise detection circuit;
and the third data processing module is used for processing according to the received digital signal output by the noise detection circuit and detecting the working condition of each detection branch.
As an improvement of the above technical solution, the monitor further includes: and the output interface circuit is used for carrying out data communication with the satellite bus.
Compared with the prior art, the invention has the beneficial effects that:
the detection device can simultaneously measure the LET spectrum of the particle space radiation and the single particle turnover times of the device to be detected, in particular to measure the LET spectrum of high-energy protons and heavy ions and the single particle turnover times of the device to be detected; the requirements of high integration and low power consumption can be met while the two measurements are realized; when the method is used for LET spectrum measurement of space charged particle radiation, the working conditions of all detection branches can be known in time, and the signal-to-noise ratio is improved.
Drawings
FIG. 1 is a circuit connection block diagram of a satellite-borne single particle monitor according to the present invention;
FIG. 2 is a block diagram of a satellite-borne single particle monitor of the present invention;
FIG. 3 is a three-dimensional structure diagram of a satellite-borne single particle monitor without a pre-amplification circuit board;
FIG. 4 is a processing flow chart of an FPGA processing circuit of the satellite-borne single particle monitor.
Reference numerals:
1. first and second semiconductor detectors 2 and 2
3. Third semiconductor detector 4, device under test
5. Printed board 6, preamplification circuit board
7. A first aluminum shielding box 8 and a second aluminum shielding box
9. Third aluminum shielding box 10 and first mounting hole
11. First pin 12 and second pin
13. Common wall 14, second mounting hole
Detailed Description
The invention will now be further described with reference to the accompanying drawings.
The invention provides a satellite-borne single particle monitor, which is a space particle radiation effect measuring device, wherein the monitor is of a sandwich structure, a device 4 to be measured is clamped between a second semiconductor detector 2 and a third semiconductor detector 3, a first semiconductor detector 1 is arranged on the second semiconductor detector 2, and each semiconductor detector and a corresponding preamplifier are arranged in a corresponding aluminum shielding box, so that the noise interference is reduced, and the anti-interference capability is improved.
Specifically, as shown in fig. 1 and 2, the satellite-borne single particle monitor includes: the device comprises a first semiconductor detector 1, a second semiconductor detector 2, a third semiconductor detector 3, a device to be tested 4, a printed board 5, a preamplification circuit board 6, a first aluminum shielding box 7, a second aluminum shielding box 8 and a third aluminum shielding box 9;
a device 4 to be tested is fixedly arranged on one side of the printed board 5 and is conducted with the device 4 to be tested; a second aluminum shielding box 8 is arranged on the device to be tested 4, the top and the bottom of the second aluminum shielding box 8 are respectively and correspondingly provided with a first semiconductor detector 1 and a second semiconductor detector 2, and the second semiconductor detector 2 is arranged on the device to be tested 4;
the first aluminum shielding box 7 is arranged in the extending direction of one side of the second aluminum shielding box 8, the first aluminum shielding box 7 and the second aluminum shielding box 8 share a common wall 13, and the common wall 13 is provided with a first pin 11 for connecting with the preamplification circuit board 6 arranged in the first aluminum shielding box 7; four corners in the first aluminum shielding box 7 are respectively provided with a first mounting hole 10, and the preamplification circuit board 6 is fixed on the four first mounting holes 10 positioned at the four corners of the first aluminum shielding box 7 through screws;
a third aluminum shielding box 9 is fixed on the other side of the printed board 5 through a second mounting hole 14, a third semiconductor detector 3 is fixedly mounted in the third aluminum shielding box 9, and a second pin is arranged on the third aluminum shielding box 9 and is used for being connected with a preamplification circuit board 6 arranged in the first aluminum shielding box 7;
the first semiconductor detector 1, the second semiconductor detector 2 and the third semiconductor detector 3 are respectively connected with the FGPA processing circuit through respective detection branches, and the device to be tested 4 is connected with the FPGA processing circuit through a monitoring circuit arranged on the device to be tested.
The monitor further comprises: and the output interface circuit is used for carrying out data communication with the satellite bus.
The first semiconductor detector 1, the second semiconductor detector 2 and the third semiconductor detector 3 are all ion implantation detectors with the thickness of 300um and the diameter of phi 20mm, and the sensitive area of the ion implantation detectors is 8 mm.
The preamplifier circuit board 7 is respectively provided with a first preamplifier, a second preamplifier and a third preamplifier, which are respectively and correspondingly connected with the first semiconductor detector 1, the second semiconductor detector 2 and the third semiconductor detector 3, and the charge signals collected by the first semiconductor detector 1, the second semiconductor detector 2 and the third semiconductor detector 3 are respectively amplified and converted to obtain corresponding amplified and converted voltage pulse signals.
The first preamplifier, the second preamplifier and the third preamplifier all adopt an integrated operational amplifier capacitor feedback mode.
The first semiconductor detector 1 is connected with a first preamplifier, a forming circuit, a main amplifier, a peak value retainer and an ADC acquisition circuit which are arranged on a detection branch corresponding to the first semiconductor detector in sequence;
the second semiconductor detector 2 is connected with a first preamplifier, a forming circuit, a main amplifier, a peak value retainer and an ADC acquisition circuit which are arranged on a corresponding detection branch in sequence;
the third semiconductor detector 3 is connected with a first preamplifier, a forming circuit, a main amplifier, a peak value retainer and an ADC acquisition circuit which are arranged on a detection branch corresponding to the third semiconductor detector in sequence;
the three detection branches are all connected with an FPGA processing circuit, and the FPGA processing circuit is connected with a satellite through an interface circuit and a satellite interface.
Specifically, as shown in fig. 1, the output end of the preamplifier corresponding to each semiconductor detector is connected to the input end of the corresponding main amplifier, the output end of each main amplifier is connected to the input end of the corresponding peak value holder, the output end of each peak value holder is connected to the input end of the corresponding ADC acquisition circuit, the ADC acquisition circuit performs analog-to-digital conversion on the acquired signal, and the output end of the ADC acquisition circuit is connected to the input end of the FPGA processing circuit, and the output end of each main amplifier is connected to the instrument noise detection circuit for detecting the operating condition of each detection branch. The instrument noise detection circuit comprises an amplifier for amplifying a noise signal and an ADC acquisition circuit; the output end of the amplifier is connected with the input end of the ADC acquisition circuit, and the output end of the ADC acquisition circuit is connected with the input end of the FPGA processing circuit.
And a noise detection circuit is additionally arranged between the main amplifier and the peak value retainer in each detection branch circuit and is used for carrying out amplification processing and analog-to-digital conversion according to the received noise signals, inputting the obtained digital signals into the FPGA processing circuit, and detecting the working conditions of all devices on the corresponding detection branch circuit according to the processing result of the FPGA processing circuit, so that the influence on the reliability and the accuracy of the detection result due to the fault of the monitor in the process of carrying out space detection is avoided.
Wherein the instrument noise detection circuit comprises: the amplifier and the ADC acquisition circuit are used for amplifying the noise signal; the output end of the amplifier is connected with the input end of the ADC acquisition circuit, and the output end of the ADC acquisition circuit is connected with the input end of the FPGA processing circuit.
The device 4 to be tested is connected with the FPGA processing circuit through the monitoring circuit arranged on the device 4 to be tested and is used for inputting the overturning information generated on the device 4 to be tested which is scanned at regular time into the FPGA processing circuit.
The device 4 to be tested is composed of one or more of a CPU, an FPGA, an SRAM, an SDARM and a FLASH, and the number of single event upset times of the device is monitored through an FPGA processing circuit. In this embodiment, the device under test 4 is an SRAM chip.
The printed board 5 is a circuit board.
Because the weak charge signal output by each semiconductor detector needs to be amplified and charge converted by the corresponding preamplifier, each semiconductor detector needs to be close to the corresponding preamplifier as much as possible, and meanwhile, each preamplifier needs to be installed in the corresponding aluminum shielding box, so that the purpose of reducing noise interference is achieved.
The working principle of the single particle monitor is as follows:
when the spatially high-energy charged particles are incident to each semiconductor detector, different energy losses are generated in the corresponding semiconductor detector, and the output of each semiconductor detector reflects the charge signal of the incident particle energy relationship, namely each semiconductor detector outputs the charge signal; the charge signal is amplified and converted by a preamplifier correspondingly connected with the semiconductor detector to obtain a voltage pulse signal, the voltage pulse signal is input to the input end of the main amplifier to be amplified, the amplified signal is input to the input end of the peak value holder to be pulse peak value held to obtain a pulse peak value held signal, the signal is input to an ADC acquisition circuit to be subjected to analog-to-digital conversion, the converted digital signal is input to an FPGA processing circuit to be subjected to amplitude analysis and data processing to obtain the amplitude of the space charged particles, different amplitudes represent the charged particles with different energies, and the LET spectrum of the space charged particles can be obtained according to the obtained amplitude of the space charged particles and the known thickness of the semiconductor detector.
The method comprises the steps that space high-energy charged particles enter a sensitive area of an SRAM chip, single-particle upset occurs in a storage unit on the SRAM chip, namely the content is changed from 0 to 1 or from 1 to 0, the single-particle upset occurs is recorded as a digital signal of single-particle upset, the digital signal is used as upset information, the upset information is input into a monitoring circuit to be recorded and input into an FPGA processing circuit to be subjected to data processing, and the single-particle upset times of a device to be tested are obtained.
The processing procedure of the FPGA processing circuit is as follows, as shown in fig. 4:
step S3-1, when a reset signal arrives at any time, the initialization is carried out again;
step S3-2, judging whether the data packet is sent to be finished; if the data packet is sent, carrying out 1-second timed zero clearing on a storage unit on the SRAM chip; the data packet is a space charged particle LET spectrum processed by the FPGA processing circuit, and the single particle turning times, time information, a packet head, a packet tail and an identification of the device to be tested.
Step S3-3, when a timing command exists, time code correction is carried out;
step S3-4, when an instruction is injected, analyzing the instruction;
step S3-5, when a trigger signal exists, starting ADC acquisition conversion, and comparing and caching the ADC conversion result by a threshold value;
step S3-6, determining whether the acquisition time is a predetermined time, in this embodiment, the predetermined time may be set to 1 second, and if so, acquiring the engineering parameters and writing the engineering parameters into the SRAM memory;
step S3-7, judging whether there is data request command, if yes, sending the completed data packet; when no data packet is completed, the data packet is sent again after waiting for the completion of the current data packet; after the transmission is completed, the RAM is formatted and a new packing process is started.
The FPGA processing circuit comprises:
the first data receiving module is used for receiving the converted digital signals obtained by each semiconductor detector through the corresponding detection branch;
the first data processing module is used for carrying out amplitude analysis and data processing according to the obtained three converted digital signals to obtain an LET spectrum of the space charged particles;
specifically, the three obtained converted digital signals are compared with three corresponding amplitude values, namely three amplitude values, of the three corresponding spatially charged particles by using the existing amplitude comparison method, and are compared with three corresponding different threshold voltages obtained through theoretical calculation, and according to the comparison result, the LET spectrum of the spatially charged particles is obtained by simultaneously combining the known thickness of each semiconductor detector.
The second data receiving module is used for receiving overturning information generated after the high-energy charged particles in the space are incident to a sensitive area of the SRAM chip;
the second data processing module is used for carrying out data processing on the overturning information to obtain the single-particle overturning times of the device to be tested;
specifically, the high-energy spatial charged particles enter a sensitive area of the device to be detected 4, single-particle upset occurs, namely the content is changed from 0 to 1 or from 1 to 0, the single-particle upset occurs and is recorded as a digital signal of single-particle upset, the digital signal is used as upset information, the upset information is input into a monitoring circuit to be recorded, the monitoring circuit performs timing scanning, the scanned upset information is input into a second data processing module to perform data processing, and the single-particle upset times of the device to be detected are obtained.
The third data receiving module is used for receiving the digital signal output by the noise detection circuit;
and the third data processing module is used for processing according to the received digital signal output by the noise detection circuit and detecting the working condition of each detection branch.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and are not limited. Although the present invention has been described in detail with reference to the embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (7)
1. An on-board single particle monitor, comprising: the device comprises a first semiconductor detector (1), a second semiconductor detector (2), a third semiconductor detector (3), a device to be tested (4), a printed board (5), a preamplification circuit board (6), a first aluminum shielding box (7), a second aluminum shielding box (8), a third aluminum shielding box (9) and an FPGA processing circuit;
a device to be tested (4) is welded and mounted on one side of the printed board (5); a second aluminum shielding box (8) is arranged on the device to be tested (4), and the top and the bottom of the second aluminum shielding box (8) are respectively provided with a first semiconductor detector (1) and a second semiconductor detector (2) correspondingly;
a first aluminum shielding box (7) is arranged in the extending direction of one side of the second aluminum shielding box (8), a common wall (13) provided with a first pin (11) is shared between the first aluminum shielding box (7) and the second aluminum shielding box (8), and the common wall is connected with a front amplification circuit board (6) arranged in the first aluminum shielding box (7) through the first pin (11); the preamplification circuit board (6) is fixed on four first mounting holes (10) positioned at four corners of the first aluminum shielding box (7);
a third aluminum shielding box (9) is fixed on the other side of the printed board (5) through a second mounting hole (14), a third semiconductor detector (3) is fixedly mounted in the third aluminum shielding box (9), and a second pin (12) is arranged on the third aluminum shielding box (9) and connected with a preamplification circuit board (6) arranged in the first aluminum shielding box (7);
the first semiconductor detector (1), the second semiconductor detector (2) and the third semiconductor detector (3) are respectively connected with the FGPA processing circuit through respective detection branches, and the device to be tested (5) is connected with the FPGA processing circuit through a monitoring circuit arranged on the device to be tested.
2. The spaceborne single particle monitor according to claim 1, wherein the preamplification circuit board (7) is respectively provided with a first preamplifier, a second preamplifier and a third preamplifier, which are respectively and correspondingly connected with the first semiconductor detector (1), the second semiconductor detector (2) and the third semiconductor detector (3), and respectively amplify and convert the charge signal collected by the first semiconductor detector (1), the charge signal collected by the second semiconductor detector (2) and the charge signal collected by the third semiconductor detector (3) to obtain corresponding amplified and converted voltage pulse signals.
3. The on-board single particle monitor according to claim 2, wherein the first semiconductor detector (1) is connected with a first preamplifier, a shaping circuit, a main amplifier, a peak value holder and an ADC (analog to digital converter) acquisition circuit arranged on a corresponding detection branch in sequence;
the second semiconductor detector (2) is connected with a first preamplifier, a forming circuit, a main amplifier, a peak value retainer and an ADC acquisition circuit which are arranged on a detection branch corresponding to the second semiconductor detector in sequence;
the third semiconductor detector (3) is connected with a first preamplifier, a forming circuit, a main amplifier, a peak value retainer and an ADC acquisition circuit which are arranged on a detection branch corresponding to the third semiconductor detector in sequence;
the three detection branches are all connected with an FPGA processing circuit, and the FPGA processing circuit is connected with a satellite through an interface circuit and a satellite interface.
4. The on-board single event monitor of claim 3, wherein a noise detection circuit is added between the main amplifier and the peak value holder in each detection branch for performing amplification processing and analog-to-digital conversion according to the received noise signal, and inputting the obtained digital signal to the FPGA processing circuit.
5. The on-board single particle monitor of claim 4, wherein the instrument noise detection circuit comprises: an amplifier and an ADC acquisition circuit;
the output end of the amplifier is connected with the input end of the ADC acquisition circuit, and the output end of the ADC acquisition circuit is connected with the input end of the FPGA processing circuit.
6. The on-board single particle monitor of claim 1, wherein the FPGA processing circuit comprises:
the first data receiving module is used for receiving the converted digital signals obtained by each semiconductor detector through the corresponding detection branch;
the first data processing module is used for carrying out amplitude analysis and data processing according to the obtained three converted digital signals to obtain an LET spectrum of the space charged particles;
the second data receiving module is used for receiving overturning information generated after the high-energy charged particles in the space are incident to a sensitive area of the SRAM chip;
the second data processing module is used for carrying out data processing on the overturning information to obtain the single-particle overturning times of the device to be tested;
the third data receiving module is used for receiving the digital signal output by the noise detection circuit;
and the third data processing module is used for processing according to the received digital signal output by the noise detection circuit and detecting the working condition of each detection branch.
7. The on-board single particle monitor of claim 1, further comprising: and the output interface circuit is used for carrying out data communication with the satellite bus.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113109859A (en) * | 2021-04-08 | 2021-07-13 | 西北核技术研究所 | Method for obtaining heavy ion single event upset cross section with low LET value |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040031928A1 (en) * | 2000-10-19 | 2004-02-19 | Smith Arthur Ernest | Detector for airborne alpha partice radiation |
| US20080282817A1 (en) * | 2002-06-11 | 2008-11-20 | Intelligent Technologies International, Inc. | Remote Monitoring of Fixed Structures |
| CN102183779A (en) * | 2010-12-29 | 2011-09-14 | 中国科学院空间科学与应用研究中心 | Multidirectional high energy particle detector |
| CN108072890A (en) * | 2016-11-15 | 2018-05-25 | 中国科学院国家空间科学中心 | A kind of three-dimensional High energy particles Radiation effect comprehensive survey device |
| WO2019102173A1 (en) * | 2017-11-23 | 2019-05-31 | The Secretary Of State For Defence | Detector and method for detection of airborne beta particles |
| CN110646833A (en) * | 2019-09-18 | 2020-01-03 | 北京空间飞行器总体设计部 | Satellite single event upset monitoring method based on monolithic array particle detector |
-
2020
- 2020-06-08 CN CN202010511603.3A patent/CN111722265B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040031928A1 (en) * | 2000-10-19 | 2004-02-19 | Smith Arthur Ernest | Detector for airborne alpha partice radiation |
| US20080282817A1 (en) * | 2002-06-11 | 2008-11-20 | Intelligent Technologies International, Inc. | Remote Monitoring of Fixed Structures |
| CN102183779A (en) * | 2010-12-29 | 2011-09-14 | 中国科学院空间科学与应用研究中心 | Multidirectional high energy particle detector |
| CN108072890A (en) * | 2016-11-15 | 2018-05-25 | 中国科学院国家空间科学中心 | A kind of three-dimensional High energy particles Radiation effect comprehensive survey device |
| WO2019102173A1 (en) * | 2017-11-23 | 2019-05-31 | The Secretary Of State For Defence | Detector and method for detection of airborne beta particles |
| CN110646833A (en) * | 2019-09-18 | 2020-01-03 | 北京空间飞行器总体设计部 | Satellite single event upset monitoring method based on monolithic array particle detector |
Non-Patent Citations (4)
| Title |
|---|
| 于向前等: "基于电荷泵的空间粒子探测器偏压电源设计", 《核电子学与探测技术》 * |
| 李论等: "CSNS中子辐射剂量监测器前置放大电路设计", 《核电子学与探测技术》 * |
| 沈国红: "HXMT卫星空间环境监测器及初步观测结果", 《空间科学学报》 * |
| 沈国红: "高能质子探测器数据传输系统设计", 《现代电子技术》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113109859A (en) * | 2021-04-08 | 2021-07-13 | 西北核技术研究所 | Method for obtaining heavy ion single event upset cross section with low LET value |
| CN113109859B (en) * | 2021-04-08 | 2024-04-30 | 西北核技术研究所 | Method for obtaining low LET value heavy ion single event upset section |
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| CN111722265B (en) | 2022-05-03 |
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