CN111722149A

CN111722149A - Cable detection equipment, method and system and computer readable storage medium

Info

Publication number: CN111722149A
Application number: CN202010537359.8A
Authority: CN
Inventors: 邓文博; 孔祥涛
Original assignee: Inspur Electronic Information Industry Co Ltd
Current assignee: Inspur Electronic Information Industry Co Ltd
Priority date: 2020-06-12
Filing date: 2020-06-12
Publication date: 2020-09-29

Abstract

The application discloses cable detection equipment, a method and a system thereof, and a computer readable storage medium, wherein the equipment comprises: the FPGA and the prompter are connected with the FPGA; a first IO interface of the FPGA is connected with an input interface of a target cable, and a second IO interface of the FPGA is connected with an output interface of the target cable; the FPGA sends a target instruction to a target cable through the first IO interface, judges whether the target instruction is received or not through the second IO interface, controls the prompter to send prompt information for representing the communication of the target cable if the target instruction is received through the second IO interface, and controls the prompter to send prompt information for representing the open circuit of the target cable if the target instruction is not received through the second IO interface. In this application, only need through send instruction alright with the detection of realization to the target cable, detection speed is fast, and the rate of accuracy is high, in addition, can also improve the detection diversity that the cable detected.

Description

Cable detection equipment, method and system and computer readable storage medium

Technical Field

The present application relates to the field of cable detection technologies, and more particularly, to a cable detection apparatus, method, system, and computer-readable storage medium.

Background

With the advent of the big data era, various network data are explosively increased, environments of server application are also diversified, and meanwhile, more and more configurations need to be supported by the server, such as different IO and storage modules, are expanded. In order to achieve flexible configuration, different types of cables are required inside the server to interconnect the mainboard and each module, so that a complete system is formed.

In order to ensure that the cable can be used normally, a cable sample needs to be measured in the early stage of server design to confirm whether the cable is manufactured according to the design requirements. The existing cable detection method is to manually detect whether a cable is connected or not by means of a multimeter.

However, the number of cables and cable pins used in the server design are large, and if a universal meter is used for detecting the path, the process is complicated, the workload is large, the time is wasted, and confusion is easy to omit; the applicability is low.

In summary, how to provide the applicability of cable detection is a problem to be solved by those skilled in the art.

Disclosure of Invention

The utility model aims at providing a cable check out test set, it can solve the technical problem who how to improve the suitability that the cable detected to a certain extent. The application also provides a cable detection method, a system and a computer readable storage medium.

In order to achieve the above purpose, the present application provides the following technical solutions:

a cable detection apparatus comprising: the FPGA and the prompter are connected with the FPGA;

a first IO interface of the FPGA is connected with an input interface of a target cable, and a second IO interface of the FPGA is connected with an output interface of the target cable;

the FPGA sends a target instruction to the target cable through the first IO interface, judges whether the target instruction is received or not through the second IO interface, controls the prompter to send prompt information representing the communication of the target cable if the target instruction is received through the second IO interface, and controls the prompter to send prompt information representing the open circuit of the target cable if the target instruction is not received through the second IO interface.

Preferably, the interface types of the first IO interface and the second IO interface include a slimlineX8 cable interface, a MiniSAS cable interface, an oculink cable interface, and a slimlineX4 cable interface.

Preferably, pins of the target cable are connected with IO interfaces of the FPGA in a one-to-one correspondence manner;

the FPGA sends a target instruction to the target cable through the first IO interface, judges whether the target instruction is received or not through the second IO interface, controls the prompter to send prompt information representing the communication of the target cable if the target instruction is received through the second IO interface, and controls the prompter to send prompt information representing the open circuit of the target cable if the target instruction is not received through the second IO interface, wherein the prompt information comprises:

the FPGA determines a current pin to be detected in pins of the target cable, generates a target instruction for detecting the current pin to be detected, sends the target instruction to the target cable through the first IO interface, judges whether the target instruction is received or not through the second IO interface, controls the prompter to send prompt information representing the communication of the current pin to be detected if the target instruction is received through the second IO interface, and controls the prompter to send prompt information representing the open circuit of the current pin to be detected if the target instruction is not received through the second IO interface; after the detection of all pins of the target cable is finished, judging whether all the pins of the target cable are communicated, if so, controlling the prompter to send out the prompt information for representing the communication of the target cable, and if not, controlling the prompter to send out the prompt information for representing the existence of open circuit of the target cable.

Preferably, the method further comprises the following steps: the controller is connected with the FPGA;

the controller is used for transmitting a control instruction for detecting whether the cable is detected to the FPGA so as to control whether the FPGA executes the cable detection operation.

Preferably, the method further comprises the following steps: and the power supply device is connected with the FPGA and the prompter and is used for supplying power to the FPGA and the prompter.

Preferably, the indicator comprises an LED light.

A cable detection method is applied to an FPGA and comprises the following steps:

sending a target instruction to a target cable through a first IO interface of the target cable, wherein the first IO interface is connected with an input interface of the target cable;

judging whether the target instruction is received or not through a second IO interface of the target cable, wherein the second IO interface is connected with an output interface of the target cable;

if the target instruction is received through the second IO interface, sending prompt information representing the communication of the target cable;

and if the target instruction is not received through the second IO interface, sending out prompt information for representing that the target cable has open circuit.

after the prompt message for representing that the target cable has an open circuit is sent, the method further comprises the following steps:

recording pin information of the target cable connected with the first IO interface;

and recording pin information of the target cable connected with the second IO interface.

A cable detection system is applied to FPGA, includes:

the first transmitting module is used for transmitting a target instruction to a target cable through a first IO interface of the first transmitting module, and the first IO interface is connected with an input interface of the target cable;

the first judgment module is used for judging whether the target instruction is received or not through a second IO interface of the first judgment module, and the second IO interface is connected with an output interface of the target cable; if the target instruction is received through the second IO interface, sending prompt information representing the communication of the target cable; and if the target instruction is not received through the second IO interface, sending out prompt information for representing that the target cable has open circuit.

A computer-readable storage medium for an FPGA, the computer-readable storage medium having a computer program stored thereon, the computer program, when executed by a processor, implementing a cable detection method as described in any one of the above.

The application provides a cable check out test set includes: the FPGA and the prompter are connected with the FPGA; a first IO interface of the FPGA is connected with an input interface of a target cable, and a second IO interface of the FPGA is connected with an output interface of the target cable; the FPGA sends a target instruction to a target cable through the first IO interface, judges whether the target instruction is received or not through the second IO interface, controls the prompter to send prompt information for representing the communication of the target cable if the target instruction is received through the second IO interface, and controls the prompter to send prompt information for representing the open circuit of the target cable if the target instruction is not received through the second IO interface. In this application, FPGA's first IO interface is connected with the input interface of target cable, and the output interface of second IO interface and target cable is connected, thus, FPGA can transmit target instruction to target cable through first IO interface, and target cable can transmit target instruction to second IO interface, FPGA can judge whether to receive target instruction through the second IO interface and judge whether the target cable feeds through, also only need through send command alright realize the detection to target cable, detection speed is fast, the rate of accuracy is high, in addition, no matter how the type of target cable changes, IO interface on FPGA all is connected with target cable's interface, so this application can also improve the detection diversity that the cable detected. The cable detection method, the cable detection system and the computer-readable storage medium solve the corresponding technical problems.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.

Fig. 1 is a schematic structural diagram of a cable detection apparatus provided in an embodiment of the present application;

fig. 2 is a flowchart of a cable detection method according to an embodiment of the present disclosure;

fig. 3 is a schematic structural diagram of a cable detection system according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

Referring to fig. 1, fig. 1 is a schematic structural diagram of a cable detection apparatus according to an embodiment of the present disclosure.

The utility model provides a cable check out test set includes: an FPGA (Field Programmable gate array) 1 and a prompter 2 connected with the FPGA 1;

a first IO interface of the FPGA1 is connected with an input interface of a target cable, and a second IO interface of the FPGA1 is connected with an output interface of the target cable;

the FPGA1 sends a target instruction to the target cable through the first IO interface, and judges whether the target instruction is received through the second IO interface, if the target instruction is received through the second IO interface, the prompter 2 is controlled to send prompt information for representing the communication of the target cable, and if the target instruction is not received through the second IO interface, the prompter 2 is controlled to send prompt information for representing the open circuit of the target cable.

Also in this application, FPGA's first IO interface can be connected with the input interface of target cable, and the second IO interface can be connected with the output interface of target cable, and like this, FPGA's first IO interface alright be connected with second IO interface through the target cable to whether communicate the communication link that provides for follow-up FPGA with the help of target instruction test target cable. It should be noted that the IO interface of the FPGA is connected to the interface of the target cable, which means that the port type of the IO interface of the FPGA is matched with the port type of the target cable in the present application, and the port type of the IO interface of the FPGA can be determined according to the port type of the target cable; in addition, the type of the target cable is not limited in the present application, for example, the target cable may be a slimine x8 cable, a MiniSAS cable, an oculink cable, a slimine x4 cable, a slimine x 8-2 slimine x4 cable, or the like.

In practical application, a first IO interface of the FPGA is connected with an input interface of a target cable, after a second IO interface of the FPGA is connected with an output interface of the target cable, the FPGA can judge whether the target cable is communicated by sending a target instruction, and the prompter is controlled to send corresponding prompt information, so that a user can check a judgment result, for example, the FPGA can send the target instruction to the target cable through the first IO interface, judge whether the target instruction is received through the second IO interface, if the target instruction is received through the second IO interface, the prompter is controlled to send prompt information representing that the target cable is communicated, if the target instruction is not received through the second IO interface, the prompter is controlled to send prompt information representing that the target cable is disconnected, and the like.

The application provides a cable check out test set includes: the FPGA and the prompter are connected with the FPGA; a first IO interface of the FPGA is connected with an input interface of a target cable, and a second IO interface of the FPGA is connected with an output interface of the target cable; the FPGA sends a target instruction to a target cable through the first IO interface, judges whether the target instruction is received or not through the second IO interface, controls the prompter to send prompt information for representing the communication of the target cable if the target instruction is received through the second IO interface, and controls the prompter to send prompt information for representing the open circuit of the target cable if the target instruction is not received through the second IO interface. In this application, FPGA's first IO interface is connected with the input interface of target cable, and the output interface of second IO interface and target cable is connected, thus, FPGA can transmit target instruction to target cable through first IO interface, and target cable can transmit target instruction to second IO interface, FPGA can judge whether to receive target instruction through the second IO interface and judge whether the target cable feeds through, also only need through send command alright realize the detection to target cable, detection speed is fast, the rate of accuracy is high, in addition, no matter how the type of target cable changes, IO interface on FPGA all is connected with target cable's interface, so this application can also improve the detection diversity that the cable detected.

In the cable detection device provided in the embodiment of the present application, the interface types of the first IO interface and the second IO interface may include a slimlineX8 cable interface, a MiniSAS cable interface, an oculink cable interface, a slimlineX4 cable interface, and the like.

It should be noted that in practical applications, the interface type of the IO interface of the FPGA may be directly set to match the target cable, or the IO interface of the FPGA may be connected to the interface of the target cable by means of a connector, for example, in fig. 1, CON _2, CON _3, CON _4, CON _5, CON _6, CON _7, and CON _8 are all corresponding connectors, and CON _1 and CON _2 are used to connect the IO interface to the cable of the slimlineX8 type, CON _3 and CON _4 are used to connect the IO interface to the cable of the MiniSAS type, CON _5 and CON _6 are used to connect the IO interface to the cable of the OuclinkX8 type, and CON _7 and CON _8 are used to connect the IO interface to the cable of the slimlineX4 type. For each connector, MN in the connector represents a corresponding pin on the connector to the pin of the target cable, such as a1 in CON _1 represents a pin corresponding to a1 pin of slimlineX8, and IO _ x _ y in FPGA represents a corresponding IO interface.

In the cable detection equipment provided by the embodiment of the application, pins of a target cable are connected with IO (input/output) interfaces of an FPGA (field programmable gate array) in a one-to-one correspondence manner;

correspondingly, FPGA sends the target instruction to the target cable through first IO interface to judge whether receive the target instruction through the second IO interface, if receive the target instruction through the second IO interface, then control the prompting device and send the suggestion information that the target cable of sign communicates, if not receive the target instruction through the second IO interface, then control the prompting device and send the suggestion information that the target cable of sign exists the broken circuit, include:

the FPGA determines a current pin to be detected in pins of a target cable, generates a target instruction for detecting the current pin to be detected, sends the target instruction to the target cable through a first IO interface, judges whether the target instruction is received or not through a second IO interface, controls a prompter to send prompt information for representing the communication of the current pin to be detected if the target instruction is received through the second IO interface, and controls the prompter to send prompt information for representing the open circuit of the current pin to be detected if the target instruction is not received through the second IO interface; after the detection of all pins of the target cable is finished, judging whether all the pins of the target cable are communicated, if all the pins of the target cable are communicated, controlling the prompter to send out prompt information for representing the communication of the target cable, and if not, controlling the prompter to send out prompt information for representing the existence of open circuit of the target cable.

That is, one pin of the target cable corresponds to one IO interface of the FPGA, at this time, connectivity between each pair of pins of the target cable may be detected, taking the target cable as a slimine x4 cable and the result of the cable detection device as shown in fig. 1 as an example, the target cable is connected to the IO interface of the FPGA through CON _7 and CON _8, assuming that the pin correspondence relationship of the slimine x4 cable is shown in table 1, and the a1 pin of the CON _7 end corresponds to the B1 pin of the CON _8 end, if the FPGA transmits the target command through the IO interface IO _7_1, the FPGA should receive the target command from the IO interface IO _8_20, therefore, the FPGA may transmit the target command to the IO interface IO _7_1, determine whether the target command can be received through the IO interface IO _8_20, and if the target command can be received through the IO interface IO _8_20, determine that the a1 pin of the target cable is connected to the B1 pin, if the target command cannot be received through the IO interface IO _8_20, it can be determined that a disconnection has occurred between the a1 pin and the B1 pin of the target cable.

Table 1 slimlineX4 cable pin correspondence table

In practical application, the type of the target instruction can be determined according to actual needs, for example, the target instruction may include an instruction composed of logic 1 and logic 0, and the FPGA sends logic 1 to the current pin to be detected through the first IO interface and sends logic 0 to other pins, that is, when testing the connectivity between the pins of the target cable, the FPGA may only send logic 1 to the IO connected to the current pin to be detected in the target cable and send logic 0 to the IO connected to other pins in the target cable, so that as long as the FPGA can receive logic 1, the FPGA can determine the current pin to be detected in the target cable to communicate. Of course, other testing methods are possible, and the present application is not limited thereto.

In a specific application scenario, in order to accurately obtain information of unconnected pins in a target cable, after a control prompter sends prompt information representing that the target cable has an open circuit, pin information of the target cable connected with a first IO interface can be recorded; recording pin information of a target cable connected with the second IO interface

In the cable detection device provided by the embodiment of the application, in order to facilitate control of the detection process, the cable detection device can further comprise a controller connected with the FPGA; the controller is used for transmitting a control instruction for detecting whether the cable is detected to the FPGA so as to control whether the FPGA executes the cable detection operation.

It should be noted that the BUTTON in fig. 1 of the present application is a controller, and the type of the controller is a switch, and the controller can find a corresponding control instruction to the FPGA by changing a level change condition detected by the FPGA, for example, when the controller causes the FPGA to receive a high level, the FPGA is set to perform a cable detection operation, and when the controller causes the FPGA to receive a low level, the FPGA is set not to perform the cable detection operation, and the like. Of course, the type of the controller may be determined according to actual needs, and the application is not specifically limited herein.

In the cable detection equipment provided by the embodiment of the application, in order to ensure that the cable detection equipment can work at any time and any place, a power supply connected with the FPGA and the prompter can be arranged in the cable detection equipment provided by the application, and the power supply is used for supplying power to the devices such as the FPGA and the prompter, namely supplying power to the cable detection equipment.

In the cable detection equipment provided by the embodiment of the application, in order to reduce the complexity of the cable detection equipment as much as possible, the prompter can be set into the LED lamps, and the number and the types of the LED lamps can be determined according to actual needs.

Correspondingly, the FPGA can send corresponding prompt information by controlling the LED lamp, for example, different prompt information can be represented by controlling the on and off of the LED lamp, for example, the LED lamp can be controlled to emit light to represent the connection of a target cable, and the LED lamp can be controlled to be off to represent the existence of open circuit of the target cable. Of course, different prompt messages and the like can be represented by means of the light emitting color of the LED lamp, which is not limited herein.

In a specific application scenario, in the cable detection device shown in fig. 1 of the present application, the correspondence between the switch keys for controlling various cables and the LED lamps for representing whether the cable detection passes or not may be as shown in table 2, and of course, other correspondence may also exist.

TABLE 2 Cable types and corresponding switch buttons and LED lamps

Referring to fig. 2, fig. 2 is a flowchart of a cable detection method according to an embodiment of the present disclosure.

The cable detection method provided by the embodiment of the application is applied to the FPGA and can comprise the following steps:

step S101: and sending a target instruction to the target cable through a first IO interface of the target cable, wherein the first IO interface is connected with an input interface of the target cable.

Step S102: judging whether a target instruction is received or not through a second IO interface of the cable, wherein the second IO interface is connected with an output interface of a target cable; if the target instruction is received through the second IO interface, step S103 is executed; if the target instruction is not received through the second IO interface, step S104 is executed.

Step S103: sending out prompt information for representing the connection of the target cable;

step S104: and sending out prompt information for indicating that the target cable is disconnected.

In the cable detection method provided by the embodiment of the application, pins of a target cable can be correspondingly connected with IO (input/output) interfaces of an FPGA (field programmable gate array) one by one;

after the FPGA sends out prompt information for representing that the target cable is broken, pin information of the target cable connected with the first IO interface can be recorded; and recording pin information of the target cable connected with the second IO interface.

For corresponding descriptions of each step in the cable detection method provided in the embodiment of the present application, please refer to corresponding descriptions in the foregoing embodiments, which are not described herein again.

Referring to fig. 3, fig. 3 is a schematic structural diagram of a cable detection system according to an embodiment of the present disclosure.

The cable detection system provided by the embodiment of the application is applied to the FPGA and can comprise:

the first sending module 101 is configured to send a target instruction to a target cable through a first IO interface of the first sending module, where the first IO interface is connected to an input interface of the target cable;

the first judging module 102 is configured to judge whether a target instruction is received through a second IO interface of the first judging module, where the second IO interface is connected to an output interface of a target cable; if a target instruction is received through the second IO interface, sending prompt information representing the communication of the target cable; and if the target instruction is not received through the second IO interface, sending out prompt information for representing that the target cable has open circuit.

For corresponding descriptions of each module in the cable detection system provided in the embodiment of the present application, please refer to corresponding descriptions in the above embodiments, which are not described herein again.

The computer-readable storage medium provided in the embodiments of the present application stores therein a computer program, and when executed by a processor, the computer program implements the steps of the cable detection method described in the above embodiments.

The computer-readable storage media to which this application relates include Random Access Memory (RAM), memory, Read Only Memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage media known in the art.

For a description of a relevant part in the cable detection method, the cable detection system, and the computer-readable storage medium provided in the embodiments of the present application, please refer to a detailed description of a corresponding part in the cable detection apparatus provided in the embodiments of the present application, which is not described herein again. In addition, parts of the above technical solutions provided in the embodiments of the present application, which are consistent with the implementation principles of corresponding technical solutions in the prior art, are not described in detail so as to avoid redundant description.

It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the application. Thus, the present application is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A cable detection apparatus, comprising: the FPGA and the prompter are connected with the FPGA;

2. The cable detection apparatus of claim 1, wherein the interface types of the first IO interface and the second IO interface include a slimlineX8 cable interface, a MiniSAS cable interface, an oculink cable interface, a slimlineX4 cable interface.

3. The cable detection device according to claim 1, wherein pins of the target cable are connected with IO interfaces of the FPGA in a one-to-one correspondence;

the FPGA determines a current pin to be detected in pins of the target cable, generates a target instruction for detecting the current pin to be detected, sends the target instruction to the target cable through the first IO interface, judges whether the target instruction is received or not through the second IO interface, controls the prompter to send prompt information representing the communication of the current pin to be detected if the target instruction is received through the second IO interface, and controls the prompter to send prompt information representing the open circuit of the current pin to be detected if the target instruction is not received through the second IO interface; after the detection of all pins of the target cable is finished, judging whether all the pins of the target cable are communicated, if so, controlling the prompter to send out the prompt information for representing the communication of the target cable, and if not, controlling the prompter to send out the prompt information for representing the existence of open circuit of the target cable;

the target instruction comprises an instruction consisting of logic 1 and logic 0, and the FPGA sends logic 1 to the current pin to be detected and sends logic 0 to other pins through the first IO interface.

4. The cable detection apparatus of claim 1, further comprising: the controller is connected with the FPGA;

5. The cable detection apparatus of claim 1, further comprising: and the power supply device is connected with the FPGA and the prompter and is used for supplying power to the FPGA and the prompter.

6. The cable detection apparatus of claim 1, wherein the annunciator comprises an LED light.

7. A cable detection method is characterized by being applied to an FPGA and comprising the following steps:

8. The method according to claim 7, wherein pins of the target cable are connected with IO interfaces of the FPGA in a one-to-one correspondence manner;

9. A cable detection system, characterized in that, be applied to FPGA, includes:

10. A computer-readable storage medium for an FPGA, in which a computer program is stored, which computer program, when being executed by a processor, implements the cable detection method according to claim 7 or 8.