CN111711983A - Wireless time synchronization method and system - Google Patents
Wireless time synchronization method and system Download PDFInfo
- Publication number
- CN111711983A CN111711983A CN202010459157.6A CN202010459157A CN111711983A CN 111711983 A CN111711983 A CN 111711983A CN 202010459157 A CN202010459157 A CN 202010459157A CN 111711983 A CN111711983 A CN 111711983A
- Authority
- CN
- China
- Prior art keywords
- time
- chip
- time value
- value
- wireless
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W56/00—Synchronisation arrangements
- H04W56/001—Synchronization between nodes
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Electric Clocks (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
The application relates to a wireless time synchronization method and a wireless time synchronization system. And determining the difference between the time values according to the first time value and the second time value. And acquiring a third time value, and determining a clock value according to the difference between the third time value and the time value. The wireless time synchronization method and the wireless time synchronization system provided by the application use the hardware of the first chip and the hardware of the second chip to automatically complete the whole time synchronization process, and can improve the time synchronization precision.
Description
Technical Field
The present application relates to the field of wireless communications technologies, and in particular, to a wireless time synchronization method and system.
Background
With the development of the internet of things technology, the application of network data acquisition equipment is more and more extensive. In some application occasions, the data acquired by different network data acquisition devices are strictly synchronized, and the time synchronization precision requirement reaches microsecond level. For example, when data is used by wireless sensors, strict synchronization of data acquisition between different wireless sensors is required.
In the conventional technology, a central processing unit is used for realizing the time synchronization process among a plurality of network acquisition devices, however, after the central processing unit is used for acquiring the data of the network acquisition devices, the problems of processing delay and low time synchronization precision exist.
Disclosure of Invention
In view of the foregoing, it is desirable to provide a wireless time synchronization method and system.
In a first aspect, an embodiment of the present application provides a wireless time synchronization method, including:
receiving a network message sent by a first chip, wherein the network message comprises a first time value;
acquiring a second time value according to the network message;
determining a difference between the time values according to the first time value and the second time value;
acquiring a third time value;
determining a clock value based on a difference between the third time value and the time value.
In one embodiment, the obtaining the second time value according to the network packet includes:
triggering a capturing task of a second high-speed timer according to the network message;
acquiring the second time value of the second high speed timer.
In one embodiment, the triggering the capture task of the second high speed timer according to the network packet includes:
generating a second trigger event according to the network message;
triggering an acquisition task of the second high speed timer with the second trigger event.
In one embodiment, the method further comprises the following steps:
acquiring a time deviation value;
determining a difference between the time values based on the time offset value, the first time value, and the second time value.
In a second aspect, an embodiment of the present application provides a wireless time synchronization method, including:
acquiring a first time value;
sending a network message to enable the second chip to receive the network message, and determining a clock value according to the network message;
and returning to the execution step according to a preset period to obtain a first time value.
In one embodiment, the obtaining the first time value includes:
and triggering the acquisition task of the first high-speed timer to acquire the first time value.
In one embodiment, the triggering the acquisition task of the first high speed timer to obtain the first time value includes:
generating a first trigger event;
and triggering the acquisition task of the first high-speed timer to acquire the first time value by utilizing the first trigger event.
In another aspect, an embodiment of the present application provides a wireless time synchronization system, including a second chip and a first chip, where the second chip is configured to execute the steps of the wireless time synchronization method provided in the first aspect; the first chip is configured to perform the steps of the wireless time synchronization method provided in the second aspect.
In one embodiment, the first chip comprises a first high speed timer for obtaining the first time value;
the second chip comprises a second high-speed timer for acquiring the second time value and the third time value.
In one embodiment, the first chip further comprises a first transceiver for generating a first trigger event;
the second chip includes a second transceiver for generating a second trigger event.
According to the wireless time synchronization method and the wireless time synchronization system provided by the embodiment of the application, the method obtains a second time value according to the received network message sent by the first chip, and determines the difference between the time values according to the first time value and the second time value. And determining a clock value according to the difference between the acquired third time value and the time value. According to the wireless time synchronization method provided by the embodiment of the application, the second chip acquires the network message sent by the first chip, and time synchronization between the first chip and the second chip is realized according to information contained in the network message. The whole time synchronization process is automatically completed only by using the first chip and the second chip, and a central processing unit can be avoided, so that the delay problem existing in the processing of the central processing unit is avoided, and the time synchronization precision can be improved.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments or the conventional technologies of the present application, the drawings used in the description of the embodiments or the conventional technologies will be briefly introduced below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a flowchart illustrating steps of a wireless time setting method according to an embodiment of the present application;
fig. 2 is a flowchart illustrating steps of a wireless time setting method according to an embodiment of the present application;
fig. 3 is a flowchart illustrating steps of a wireless time setting method according to an embodiment of the present application;
fig. 4 is a flowchart illustrating steps of a wireless time setting method according to an embodiment of the present application;
fig. 5 is a flowchart illustrating steps of a wireless time setting method according to an embodiment of the present application;
fig. 6 is a flowchart illustrating steps of a wireless time setting method according to an embodiment of the present application.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the present application are described in detail below with reference to the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. This application is capable of embodiments in many different forms than those described herein and that modifications may be made by one skilled in the art without departing from the spirit and scope of the application and it is therefore not intended to be limited to the specific embodiments disclosed below.
The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings). In the description of the present application, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", and the like, indicate orientations or positional relationships based on those shown in the drawings, and are used only for convenience in describing the present application and for simplicity in description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, are not to be considered as limiting the present application.
In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through intervening media. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
The wireless time setting method and the wireless time setting system can be applied to any equipment which needs high-precision time setting requirements. By arranging the chip in the equipment, high-precision time synchronization is realized by using the wireless time synchronization method, so that data acquired by the equipment is strictly synchronized.
The following describes the technical solutions of the present application and how to solve the above technical problems with specific examples. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments. Embodiments of the present application will be described below with reference to the accompanying drawings.
Referring to fig. 1, an embodiment of the present application provides a wireless time synchronization method, which includes S100-S300. The wireless time synchronization method provided by this embodiment is described with the second chip as an execution subject.
S100, receiving a network message sent by a first chip, wherein the network message comprises a first time value.
A message is a data unit exchanged and transmitted in a network, i.e. a data block to be sent by a station at one time. The message contains complete data information to be sent, and the length of the message is not consistent, and is not limited and variable. The first chip may send the network packet to the second chip according to actual needs. The first chip and the second chip may be the same in kind and structure or may be different. The first time value is a time value when the first chip sends the network packet, and may be recorded as TM0. The second chip may obtain the first time value through the network packet sent by the first chip. The first time value may be a clock value of the first chip at this time, or may be a time value having a certain relationship with the clock value of the first chip, that is, the clock value of the first chip may be calculated by a certain algorithm according to the time value. The network message may further include a message address, a message length, a message type, and a message identifier, and the second chip may recognize the message address, the message length, the message type, and the message identifierWhether the network message is sent by the first chip. In a specific embodiment, the first chip and the second chip are both nRF52832 chips, and the nRF52832 chip includes a transceiver module therein, and the transceiver module may be configured to receive the network packet sent by the first chip.
S200, acquiring a second time value according to the network message.
The second time value is a time value when the second chip receives the network packet, and may be denoted as Tsx0. And the second chip acquires the second time value in time when receiving the network message. The embodiment does not limit any specific method for acquiring the second time value, as long as the second time value can be acquired. The first time value and the second time value are time values belonging to the same type, that is, if the first time value is a clock value of the first chip, the second time value is a clock value of the second chip when the network packet is received.
S300, determining the difference between the time values according to the first time value and the second time value.
And the second chip calculates and processes the first time value and the second time value according to the first time value and the obtained second time value included in the received network message, and determines the difference between the time values, namely the deviation between the time of receiving the network message by the second chip and the time of sending the network message by the first chip. The difference in the time values can be denoted as Δ T.
And S400, acquiring a third time value.
And S500, determining a clock value according to the difference between the third time value and the time value.
The third time value is the time value of the second chip when time alignment is needed, and the third time value is recorded as Tsx. The third time value may be the same as the second time value or may be different from the second time value. Specifically, the second chip receives the network packetWhen the time alignment is directly carried out, the second time value and the third time value are the same; when the second chip receives the network message, the second chip does not need to perform time synchronization, and the time synchronization is started after a period of time, the second chip needs to acquire the third time value, and at this time, the third time value is different from the second time value. The third time value is of the same type of time value as the second time value and the first time value. In this embodiment, the method for obtaining the second time value and the third time value may be the same, and this embodiment does not limit this. The second chip may determine the clock value of the second chip according to the determined difference between the time values and the acquired third time value. The clock value may be noted as Ts. If the first time value, the second time value and the third time value are all clock values, the clock values can be represented by a formula Ts＝Tsx+ Δ T.
In this embodiment, there may be a plurality of second chips, that is, the plurality of second chips simultaneously receive the network packet sent by the first chip, so that accurate time synchronization between the plurality of second chips and the first chip can be achieved.
According to the wireless time synchronization method and the wireless time synchronization system provided by the embodiment of the application, the method obtains a second time value according to the received network message sent by the first chip, and determines the difference between the time values according to the first time value and the second time value. And determining a clock value according to the difference between the acquired third time value and the time value. According to the wireless time synchronization method provided by the embodiment of the application, the second chip acquires the network message sent by the first chip, and time synchronization between the first chip and the second chip is realized according to information contained in the network message. The whole time synchronization process is automatically completed only by using the first chip and the second chip, and a central processing unit can be avoided, so that the delay problem existing in the processing of the central processing unit is avoided, and the time synchronization precision can be improved.
Referring to fig. 2, in an embodiment, the step S200 of obtaining the second time value according to the network packet includes:
s210, according to the network message, triggering a capturing task of a second high-speed timer.
S220, acquiring the second time value of the second high-speed timer.
The second high-speed timer is a device included in the second chip and can be timed. The second height timer may indicate the clock value at this time, or may indicate a time value calculated from a very early time, from which the clock value at this time can be calculated. And after receiving the network message, the second chip triggers a capture task of the second high-speed timer, that is, the second high-speed timer acquires a time value at the moment, and the time value is the second time value. And the second chip acquires the second time value of the second high-speed timer at the moment.
Referring to fig. 3, in an embodiment, the triggering the acquisition task of the second high speed timer according to the network packet in step S210 includes:
s211, generating a second trigger event according to the network message.
S212, triggering the capturing task of the second high-speed timer by utilizing the second trigger event.
The second chip also includes a second transceiver therein. The second transceiver of the second chip may generate the second trigger event when receiving the network packet. And the second chip triggers the acquisition task of the second high-speed timer by utilizing the second trigger event. The second trigger event may be a level signal or other trigger signals. The second trigger event may be selected according to a kind of the high speed timer. The present embodiment does not set any limitation to the kind of the second trigger event generated by the second transceiver of the second chip, as long as the capture task of the second high-speed timer can be triggered.
Referring to fig. 4, in an embodiment, the wireless time synchronization method further includes
And S600, acquiring a time deviation value.
S700, determining the difference of the time values according to the time deviation value, the first time value and the second time value.
The time offset value is a fixed time offset generated by characteristics of the first chip and the second chip. The time deviation value may be an accurate time deviation value obtained by a worker through a plurality of experiments on the first chip and the second chip in advance. And the second chip calculates to obtain the difference of the time values according to the obtained time deviation value, the first time value and the second time value. In this embodiment, not only the time difference between the network packet received by the second chip and the network packet sent by the first chip is calculated, but also the time deviation value existing between the first chip and the second chip itself is considered, so that the difference between the finally obtained time values is very accurate, the clock value of the second chip determined by the difference between the third time value and the time value is more accurate, and the time synchronization precision between the second chip and the first chip is higher.
Referring to fig. 5, an embodiment of the present application provides a wireless time synchronization method, which includes steps S800-S820. The wireless time synchronization method provided by this embodiment is described with the first chip as an execution subject.
S800, acquiring a first time value.
The first time value is a time value of the first chip when the first chip sends the network message. The first time value may be a clock value of the first chip at this time, or may be a time value having a certain relationship with the clock value of the first chip, that is, the clock value of the first chip may be calculated by a certain algorithm according to the time value.
S810, sending a network message to enable the second chip to receive the network message, and determining a clock value according to the network message.
The network message comprises the first time value, the address of the message, the message length, the message type, the message identification and the like. After the first chip sends the network message, the second chip which needs to be paired with the first chip can receive the network message, and the clock value is determined according to the network message. The second chip determines a clock value according to the network packet, which may specifically refer to the description of steps S100 to S500 in the wireless time synchronization method, and is not described herein again.
And S820, returning to the execution step according to a preset period to obtain the first time value.
The preset period can be set in advance by a worker according to actual conditions. The first chip returns to perform step S800 and step S810 according to a preset cycle. Specifically, if the preset period is 40 minutes, the first chip sends a network packet every 10 minutes, and the second chip may update the time difference according to the received network packet. When the second chip needs to be paired with the first chip, only the third time value needs to be obtained, and the difference between the third time value and the latest time value needs to be calculated to determine the clock value of the second chip.
In the wireless time synchronization method provided by this embodiment, the method sends the network packet by obtaining the first time value, so that the second chip can determine the clock value according to the network packet, thereby implementing time synchronization with the first chip. In the wireless time synchronization method provided by this embodiment, the first chip and the second chip implement accurate time synchronization through transmission of the network packet. And the first chip may send the network packet according to the preset period, that is, the second chip may perform time synchronization again after a period of time, so that it is avoided that the clock value of the second chip deviates from the clock value of the first chip after a period of time, and the deviation is larger when the time is longer, thereby improving the time synchronization accuracy of the first chip and the second chip in a long time.
Referring to fig. 6, in an embodiment, the obtaining of the first time value in step S800 includes:
and S801, triggering a capturing task of a first high-speed timer, and acquiring the first time value.
The first chip comprises a first high-speed timer. When the first chip needs to send the network message, the first chip triggers a capture task of the first high-speed timer, that is, the first high-speed timer obtains a time value at the moment, and the time value is the first time value. The first chip acquires the first time value of the first high-speed timer at this time. For the description of the first high speed timer, reference may be made to the description of the second high speed timer, which is not described herein again.
Referring to fig. 6, in an embodiment, the triggering the acquisition task of the first high speed timer to obtain the first time value in step S810 includes:
s802, generating a first trigger event.
And S803, triggering the capture task of the first high-speed timer to acquire the first time value by using the first trigger event.
The first chip also includes a first transceiver therein. The first transceiver may generate the first trigger event when the first chip needs to send the network packet. The first chip triggers an acquisition task of the first high speed timer with the first trigger event. The first trigger event may be a level signal, or may be other trigger signals. The second trigger event may be of the same kind as the first trigger event.
It should be understood that although the various steps in the flow charts of fig. 1-6 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 1-6 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternating with other steps or at least some of the sub-steps or stages of other steps.
An embodiment of the present application provides a wireless time setting system, which includes a second chip and a first chip, wherein the second chip is configured to perform the steps of the methods provided in the embodiments shown in fig. 1 to fig. 4 in the foregoing embodiments, and the first chip is configured to perform the steps of the methods provided in the embodiments shown in fig. 5 and fig. 6 in the foregoing embodiments.
In one embodiment, the first chip includes a first high speed timer for obtaining a first time value. The second chip includes a second high speed timer for obtaining a second time value. For the first high speed timer and the second high speed timer, reference may be specifically made to the description of the first high speed timer and the second high speed timer in the wireless time synchronization method, and details are not repeated here.
In one embodiment, the first chip further comprises a first transceiver for generating a first trigger event. The second chip also includes a second transceiver to generate a second trigger event. The description of the first transceiver and the second transceiver may refer to the description of the first transceiver and the second transceiver in the wireless time synchronization method, and is not repeated here.
In a specific embodiment, the first chip and the second chip are both nRF52832 chips. The PPI mechanism of the nRF52832 chip is utilized. Sending the first trigger event (event _ READY) through the first transceiver (NRF _ RADIO) of the first chip, triggering a capture task of the first high-speed timer, and acquiring the first time value. And the network message containing the first time value is sent out through the first transceiver. After receiving the network packet, the second transceiver (NRF _ RADIO) of the second chip generates the second trigger event (EVENTS _ ADDRESS), which triggers the capture task of the second high-speed timer to obtain the second time value. And the second chip determines the difference between the time values according to the first time value and the second time value. When the second chip needs to be paired, the second transceiver (NRF _ RADIO) of the second chip generates a trigger event (EVENTS _ ADDRESS), triggers a capture task of the second high-speed timer, and acquires the third time value. And the second chip determines the clock value of the second chip according to the difference between the third time value and the time value, so that the time synchronization of the second chip and the second chip is realized.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (10)
1. A wireless time synchronization method, comprising:
receiving a network message sent by a first chip, wherein the network message comprises a first time value;
acquiring a second time value according to the network message;
determining a difference between the time values according to the first time value and the second time value;
acquiring a third time value;
determining a clock value based on a difference between the third time value and the time value.
2. A wireless time synchronization method according to claim 1, wherein said obtaining a second time value according to the network packet includes:
triggering a capturing task of a second high-speed timer according to the network message;
acquiring the second time value of the second high speed timer.
3. A wireless time synchronization method as claimed in claim 2, wherein said triggering the acquisition task of the second high speed timer according to the network packet includes:
generating a second trigger event according to the network message;
triggering an acquisition task of the second high speed timer with the second trigger event.
4. A wireless time synchronization method as claimed in claim 1, further comprising:
acquiring a time deviation value;
determining a difference between the time values based on the time offset value, the first time value, and the second time value.
5. A wireless time synchronization method, comprising:
acquiring a first time value;
sending a network message to enable a second chip to receive the network message, and determining a clock value according to the network message;
and returning to the execution step according to a preset period to obtain a first time value.
6. A wireless time pairing method as claimed in claim 5, wherein said obtaining a first time value comprises:
and triggering the acquisition task of the first high-speed timer to acquire the first time value.
7. A wireless time synchronization method as claimed in claim 6, wherein said triggering the acquisition task of the first high speed timer to obtain the first time value comprises:
generating a first trigger event;
and triggering the acquisition task of the first high-speed timer to acquire the first time value by utilizing the first trigger event.
8. A wireless time setting system, comprising a second chip and a first chip, wherein the second chip is used for executing the steps of the wireless time setting method according to any one of claims 1 to 4; the first chip is used for executing the steps of the wireless time synchronization method of any one of claims 5 to 7.
9. A wireless time tick system according to claim 8 wherein the first chip comprises a first high speed timer for obtaining the first time value;
the second chip comprises a second high-speed timer for acquiring a second time value and a third time value.
10. A wireless time tick system according to claim 8 wherein the first chip further comprises a first transceiver for generating a first trigger event;
the second chip also includes a second transceiver to generate a second trigger event.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010459157.6A CN111711983A (en) | 2020-05-27 | 2020-05-27 | Wireless time synchronization method and system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010459157.6A CN111711983A (en) | 2020-05-27 | 2020-05-27 | Wireless time synchronization method and system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111711983A true CN111711983A (en) | 2020-09-25 |
Family
ID=72537714
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010459157.6A Pending CN111711983A (en) | 2020-05-27 | 2020-05-27 | Wireless time synchronization method and system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111711983A (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010024152A (en) * | 1997-09-19 | 2001-03-26 | 러셀 비. 밀러 | Mobile station assisted timing synchronization in a cdma communication system |
| CN101447861A (en) * | 2008-12-29 | 2009-06-03 | 中兴通讯股份有限公司 | IEEE 1588 time synchronization system and implementation method thereof |
| CN101650548A (en) * | 2009-08-31 | 2010-02-17 | 江苏方天电力技术有限公司 | Time setting device for digital substation |
| CN101834712A (en) * | 2010-04-19 | 2010-09-15 | 浙江大学 | Method for realizing accurate time synchronization by utilizing IEEE1588 protocol |
| CN110492965A (en) * | 2019-09-05 | 2019-11-22 | 南京南瑞继保电气有限公司 | The method and apparatus of serial message clock synchronization in a kind of master-slave system |
-
2020
- 2020-05-27 CN CN202010459157.6A patent/CN111711983A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20010024152A (en) * | 1997-09-19 | 2001-03-26 | 러셀 비. 밀러 | Mobile station assisted timing synchronization in a cdma communication system |
| CN101447861A (en) * | 2008-12-29 | 2009-06-03 | 中兴通讯股份有限公司 | IEEE 1588 time synchronization system and implementation method thereof |
| CN101650548A (en) * | 2009-08-31 | 2010-02-17 | 江苏方天电力技术有限公司 | Time setting device for digital substation |
| CN101834712A (en) * | 2010-04-19 | 2010-09-15 | 浙江大学 | Method for realizing accurate time synchronization by utilizing IEEE1588 protocol |
| CN110492965A (en) * | 2019-09-05 | 2019-11-22 | 南京南瑞继保电气有限公司 | The method and apparatus of serial message clock synchronization in a kind of master-slave system |
Non-Patent Citations (1)
| Title |
|---|
| 来清民等: "《ARM Cortex-M3嵌入式系统设计和典型实例 基于LM3S811》", 30 June 2013 * |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7191354B2 (en) | Method for synchronizing a first clock to a second clock, processing unit and synchronization system | |
| US11218238B2 (en) | Method, computer-readable medium, system, and vehicle comprising the system for validating a time function of a master and the clients in a network of a vehicle | |
| JP6546357B2 (en) | Sensing system and time synchronization method | |
| CN109714700B (en) | Synchronization method, positioning method, main base station and positioning system | |
| CN105610652B (en) | Method and device for acquiring data transmission delay | |
| EP3573386A1 (en) | Method and device for synchronizing data packets from embedded data sensors monitoring body motion of a patient | |
| CN109714757B (en) | Method and device for preparing eSIM card in shared mode | |
| JP6838848B2 (en) | Systems and methods for synchronizing processor operations over communication networks | |
| CN114885429A (en) | Communication method and device, storage medium, transmitting UE, network device and receiving UE | |
| EP3525528B1 (en) | Positioning method and positioning apparatus | |
| US11050548B2 (en) | Image transmission system, imaging terminal, display terminal, adjustment method, adjustment assistance method, and non-transitory computer-readable recording medium storing program | |
| CN112583509B (en) | Method and device for acquiring time stamp of data stream, storage medium and electronic device | |
| CN106533603A (en) | Time synchronizing method and device for distributed system | |
| CN112187556B (en) | Congestion measurement method and network node | |
| US7889764B2 (en) | Method for the synchronization of data, such as distributed data, taking account of clock drifts and inaccuracies | |
| WO2018041108A1 (en) | Method, apparatus, and device for determining clock time of time synchronization packet | |
| CN109272576B (en) | Data processing method, MEC server, terminal equipment and device | |
| US11128989B2 (en) | Identification and location of personal area network device | |
| CN111711983A (en) | Wireless time synchronization method and system | |
| CN116684028B (en) | Multi-sensor time synchronization method, device, equipment and storage medium | |
| CN111102689A (en) | Method and device for adjusting clock synchronization | |
| US20170117980A1 (en) | Time synchronization for network device | |
| CN114586297A (en) | Synchronization method and device | |
| US20180270005A1 (en) | Wireless communications device, computer readable medium storing program, and method | |
| CN116015523A (en) | Time synchronization method and device and electronic equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: Room 86, room 406, No.1, Yichuang street, Zhongxin Guangzhou Knowledge City, Huangpu District, Guangzhou City, Guangdong Province Applicant after: Southern Power Grid Digital Grid Research Institute Co.,Ltd. Address before: Room 1301, Chengtou building, No. 106, Fengze East Road, Nansha District, Guangzhou City, Guangdong Province Applicant before: Southern Power Grid Digital Grid Research Institute Co.,Ltd. |
|
| CB02 | Change of applicant information | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200925 |
|
| RJ01 | Rejection of invention patent application after publication |