CN111710240A - Pixel circuit structure and display panel - Google Patents

Pixel circuit structure and display panel Download PDF

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Publication number
CN111710240A
CN111710240A CN202010587923.7A CN202010587923A CN111710240A CN 111710240 A CN111710240 A CN 111710240A CN 202010587923 A CN202010587923 A CN 202010587923A CN 111710240 A CN111710240 A CN 111710240A
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CN
China
Prior art keywords
pixel circuit
units
circuit structure
around
pixel
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202010587923.7A
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Chinese (zh)
Inventor
高琳华
张九占
马志丽
胡祖权
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kunshan Govisionox Optoelectronics Co Ltd
Original Assignee
Kunshan Govisionox Optoelectronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kunshan Govisionox Optoelectronics Co Ltd filed Critical Kunshan Govisionox Optoelectronics Co Ltd
Priority to CN202010587923.7A priority Critical patent/CN111710240A/en
Publication of CN111710240A publication Critical patent/CN111710240A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/57—Mechanical or electrical details of cameras or camera modules specially adapted for being embedded in other devices
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The invention provides a pixel circuit structure and a display panel, and solves the problem that when the conventional pixel circuit structure is used for providing a driving signal for a corresponding display pixel unit, the display effect of the periphery of an open hole area and a non-open hole area of the display panel is uneven. The pixel circuit structure includes: the display device comprises a plurality of pixel circuit units, a plurality of driving units and a plurality of control units, wherein the pixel circuit units are respectively used for providing driving signals for the display pixel units; and a connection portion configured to connect the pixel circuit units around the hollow area. Through setting up connecting portion, couple together the pixel circuit unit around the fretwork area, compensated the pixel circuit unit around the fretwork area and other pixel circuit unit's resistance and electric capacity difference, and then improved the homogeneity that shows around the display panel trompil district and not the district shows.

Description

Pixel circuit structure and display panel
Technical Field
The invention relates to the technical field of display, in particular to a pixel circuit structure and a display panel.
Background
With the continuous development of display technology, the display of electronic devices such as mobile phones has entered the full-screen era. Due to the requirements of visual effect and aesthetic degree, the comprehensive screen display is gradually developed from the Liuhai screen and the water drop screen to the punching screen. The perforated screen has the advantages of attractive appearance and large screen occupation ratio, but the process is complex to realize, and poor optical display is easy to occur. Due to the fact that holes are needed in the design of the punching screen, when the pixel circuit structure is designed, the pixel circuit units are arranged in a hollow area corresponding to the holes. Due to the existence of the hollow area, the difference exists between the resistance and the capacitance when the pixel circuit units around the hollow area and other pixel circuit units work, and therefore, when the existing pixel circuit structure is used for providing driving signals for the corresponding display pixel units, the display effect of the display and the non-hole area around the opening area of the perforated screen is uneven.
Disclosure of Invention
In view of the above, embodiments of the present invention provide a pixel circuit structure, and in addition, the present invention also provides a display panel including the pixel circuit structure, so as to solve the problem that when the conventional pixel circuit structure is applied to a display panel, the display effect around the opening area and the display effect in the non-opening area are not uniform.
According to a first aspect of the present invention, an embodiment of the present invention provides a pixel circuit structure, including: the display device comprises a plurality of pixel circuit units, a plurality of driving units and a plurality of control units, wherein the pixel circuit units are respectively used for providing driving signals for the display pixel units; and a connection portion configured to connect the pixel circuit units around the hollow area.
In one embodiment, the hollowed-out area is circular or square.
In one embodiment, the plurality of pixel circuit units are arranged in an array.
In one embodiment, the connection portion includes a first connection portion through which two of the pixel circuit units in the first array direction around the hollowed-out area are connected.
In one embodiment, the first connection portion includes a plurality of first connection units arranged at intervals, wherein two pixel circuit units opposite in the first array direction are connected by the first connection units.
In one embodiment, the first connection portion and the semiconductor trace of the pixel circuit unit are disposed on the same layer.
In one embodiment, the pixel circuit structure further includes a merged signal line for connecting at least two pixel circuit units adjacent in the first array direction around the hollow area; the connecting part comprises a second connecting part which comprises a plurality of second connecting units arranged side by side; and the two combined signal lines oppositely arranged in the second array direction of the pixel circuit units are connected through the second connecting unit.
In one embodiment, the plurality of second connection units are arranged to surround the hollow area.
In one embodiment, the second connection portion is disposed at the same layer as an initialization voltage signal line of the pixel circuit unit.
According to a second aspect of the present invention, an embodiment of the present invention provides a display panel, which includes a pixel circuit layer, the pixel circuit layer including any one of the pixel circuit structures described above; and the display pixel layer comprises an opening which is arranged corresponding to the hollow-out area.
According to the pixel circuit structure and the display panel provided by the embodiment of the invention, the pixel circuit units around the hollow area are connected through the arrangement of the connecting part, so that the resistance and capacitance difference between the pixel circuit units around the hollow area and other pixel circuit units is compensated. When the pixel circuit structure provided by the embodiment of the invention is used for providing the driving signal for the corresponding display pixel unit, the difference between the resistance and the capacitance of the pixel circuit unit around the hollow area and other pixel circuit units is reduced, so that the display uniformity of the display and the non-hole area around the display panel opening area is improved.
Drawings
Fig. 1 is a schematic diagram of a pixel circuit structure according to an embodiment of the invention.
Fig. 2 is a schematic diagram of a pixel circuit structure according to another embodiment of the invention.
Fig. 3 is a schematic diagram of a pixel circuit structure according to still another embodiment of the invention.
Fig. 4 is a schematic diagram of a pixel circuit structure according to another embodiment of the invention.
Fig. 5 is a schematic structural diagram of a display panel according to an embodiment of the invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic diagram of a pixel circuit structure according to an embodiment of the invention. As shown in fig. 1, the pixel circuit structure 100 includes a plurality of pixel circuit units 10 and a plurality of pixel circuit units 10' arranged around a hollow area CA. The pixel circuit units 10 are respectively used for providing driving signals to the display pixel units. The pixel circuit structure 100 further includes a connection portion 20 configured to connect the pixel circuit units 10' around the hollow area CA.
Specifically, the shape of the hollow area CA is determined according to the requirements of the actual application scenario, for example, when the pixel circuit structure 100 is applied to a display panel, the hollow area CA may be adjusted according to the shape of an opening of a display pixel layer in the display panel, and may be a circle or a square. In addition, the specific number of the pixel circuit units 10 may be determined according to the number of the display pixel units in the display panel in practical application, and the specific number of the pixel circuit units 10 is not specifically limited in the embodiment of the present invention.
The inventor of the application finds that due to the existence of the hollow-out area in the pixel circuit structure, the routing of the pixel circuit units around the hollow-out area is disconnected, and therefore the difference exists between the pixel circuit units around the hollow-out area and the resistance and the capacitance of other pixel circuit units during working.
In view of this, the embodiment of the invention provides the connection portion 20 to connect the disconnected traces of the pixel circuit units 10 'around the hollow area CA, so as to reduce the difference between the resistance and the capacitance of the pixel circuit units 10' around the hollow area CA and the resistance and the capacitance of other pixel circuit units 10 during operation. Since the difference between the resistance and the capacitance of the pixel circuit unit 10' around the hollow area CA and the resistance and the capacitance of the other pixel circuit units 10 is reduced, when the pixel circuit structure 100 provided by the embodiment of the invention is applied to a display panel, the uniformity of the display around the opening area and the non-opening area of the display panel can be improved.
Fig. 2 is a schematic diagram of a pixel circuit structure according to another embodiment of the invention. As shown in fig. 2, the pixel circuit structure 200 includes a plurality of pixel circuit units 10 arranged in an array and pixel circuit units 10' surrounding the hollow area CA. The pixel circuit structure 200 further includes a first connection portion 21 configured to connect two pixel circuit cells 10 'in a first array direction (y direction shown in fig. 2) among the pixel circuit cells 10' around the hollow area CA.
Specifically, the first connection portion 21 includes a plurality of first traces 001 disposed oppositely along a first array direction (y direction shown in fig. 2) as shown in fig. 2, and a plurality of second traces 002 disposed oppositely along a second array direction (x direction shown in fig. 2), and the first traces 001 and the second traces 002 are alternately connected to form a closed loop surrounding the hollow area CA. When the pixel circuit unit 10 operates, the broken traces of the pixel circuit units 10 'in the first array direction (the y direction shown in fig. 2) in the pixel circuit units 10' around the hollow area CA are connected by the first connection portion 21, so that the difference between the resistance and the capacitance of the pixel circuit units 10 around the other hollow area CA is reduced. In addition, since the pixel circuit units 10' share the first connection portion 21, a narrow layout space is advantageously implemented. It should be understood that, in actual design, the first trace 001 and the second trace 002 are not limited to the straight lines in fig. 2, and may be adjusted according to the requirements in the actual application process.
In the pixel circuit structure 200 according to the embodiment of the present invention, the first connection portions 21 connect the pixel circuit units 10' in the first array direction (the y direction shown in fig. 2) around the hollow area CA, so as to ensure uniformity of resistance and capacitance of the pixel circuit units 10 in the first array direction (the y direction shown in fig. 2) during operation.
In the embodiment of the invention, the first connection portion 21 and the semiconductor trace 101 of the pixel circuit unit 10 are disposed on the same layer.
Specifically, the semiconductor trace 101 of the pixel circuit unit 10 may be used to form a Thin Film Transistor (TFT) in the pixel circuit unit 10. Due to the existence of the hollow area CA, the semiconductor trace 101 of the pixel circuit unit 10 'around the hollow area CA is disconnected, so that the TFT characteristics of the pixel circuit unit 10' around the hollow area CA are not uniform with those of other pixel circuit units 10.
In the embodiment of the present invention, since the first connection portion 21 and the semiconductor trace 101 of the pixel circuit unit 10 are disposed on the same layer, the first connection portion 21 can connect the semiconductor trace 101 disconnected from the pixel circuit unit 10 around the hollow area CA, so as to reduce the difference between the TFT characteristics of the pixel circuit unit 10 around the hollow area CA and the TFT characteristics of other pixel circuit units 10. In addition, by disposing the first connection portion 21 and the semiconductor trace 101 of the pixel circuit unit 10 on the same layer, the first connection portion 21 and the layout of the semiconductor layer can be designed as a whole to improve the overall stability of the semiconductor layer, and the layout change design of the pixel circuit structure can be simplified.
Furthermore, when the pixel circuit structure 200 is designed, since the first connection portion 21 and the semiconductor trace 101 of the pixel circuit unit 10 are disposed on the same layer, the first connection portion 21 and the semiconductor trace 101 of the pixel circuit unit 10 can be prepared by the same process, which can save the manufacturing time and material cost of the pixel circuit structure 200, and is more beneficial to manufacturing. The material for forming the first connection portion 21 and the semiconductor trace 101 of the pixel circuit unit 10 may be low temperature polysilicon, amorphous silicon, monocrystalline silicon, or oxide semiconductor, which is not particularly limited in the embodiment of the invention.
In the embodiment of the present invention, the first connection portion 21 and the semiconductor traces of the pixel circuit unit 10 are disposed on the same layer, so that the uniformity of the TFT characteristics of the pixel circuit unit 10' around the hollow area CA and the pixel circuit units 10 around other non-hollow areas CA is ensured.
Fig. 3 is a schematic diagram of a pixel circuit structure according to still another embodiment of the invention. As shown in fig. 3, the pixel circuit structure 300 includes a plurality of pixel circuit units 10 arranged in an array and pixel circuit units 10' surrounding the hollow area CA. The pixel circuit structure 300 further includes a first connection portion 21, the first connection portion 21 including a plurality of first connection units 211 arranged at intervals, wherein the pixel circuit units 10' opposite in the first array direction (y direction as shown in fig. 3) are connected by the first connection units 211. Specifically, two pixel circuit units 10' opposing in the first array direction (the y direction as shown in fig. 3) are each connected by a corresponding one of the first connection units 211. In the pixel circuit structure 300 according to the embodiment of the invention, since the opposite pixel circuit units 10 'do not share the trace of the first connection portion 21, the difference between the resistance and the capacitance of the pixel circuit units 10' around the hollow area and the resistance and the capacitance of the pixel circuit units 10 around the other non-hollow area CA can be further improved, and the uniformity of the resistance and the capacitance of the pixel circuit units 10 in the first array direction (the y direction shown in fig. 3) during operation can be further ensured.
Fig. 4 is a schematic diagram of a pixel circuit structure according to another embodiment of the invention. As shown in fig. 4, the pixel circuit structure 400 includes a plurality of pixel circuit units 10 arranged in an array and pixel circuit units 10' surrounding the hollow area CA. The pixel circuit structure 400 further includes a merged signal line 30 for connecting at least two pixel circuit units 10' adjacent in the first array direction (y direction shown in fig. 4) around the hollow area CA. In addition, the pixel circuit structure 400 further includes a second connection portion 22, the second connection portion 22 includes a plurality of second connection units 221 arranged side by side, and two merged signal lines 30 oppositely arranged in a second array direction (x direction shown in fig. 4) of the pixel circuit units 10 are connected by the second connection units 221.
Specifically, the merge signal line 30 is used to merge signal lines of at least two pixel circuit units 10' adjacent in the first array direction (y direction shown in fig. 4) around the hollow area CA. The embodiment of the present invention does not specifically limit the specific number of the pixel circuit units 10 'connected to the combined signal line 30, and the specific number of the connected pixel circuit units 10' can be adjusted according to the requirements of practical applications. Compared with the method of directly connecting the signal lines of the two pixel units 10' opposite to the second array direction (the x direction shown in fig. 4) around the hollow area CA through the second connection unit 221, the method can achieve a narrower wiring space design while ensuring that the resistance-capacitance difference is reduced.
In the pixel circuit structure 400 provided in the embodiment of the present invention, the merged signal line 30 is used to connect at least two pixel circuit units 10' around the hollow area CA, and then the two merged signal lines 30 that are oppositely disposed are connected by the second connection unit 221, so that the uniformity of the resistance and the capacitance of the pixel circuit units 10 in the second array direction (the x direction shown in fig. 4) during operation is ensured, and a narrower routing space design can be realized.
In an embodiment of the invention, the plurality of second connection units 221 are disposed to surround the hollow area CA.
Specifically, as shown in fig. 4, the second connection portion 22 includes a plurality of second connection units 221 arranged side by side. When the second connection unit 221 connects the combined signal line 30 close to the upper portion of the hollow area CA, the second connection unit 221 is disposed to surround one side of the upper portion of the hollow area CA; when the second connection unit 221 ' connects the merged signal line 30 ' near the lower portion of the hollow area CA, the second connection unit 221 ' is disposed to surround one side of the lower portion of the hollow area CA. In the embodiment of the invention, the plurality of second connection units 221 are arranged to surround the hollow area CA, so that the uniformity of the capacitance and the resistance of the pixel circuit units 10' around the hollow area CA in the second array direction (the x direction shown in fig. 4) during operation can be further ensured.
In an embodiment of the present invention, the second connection portion 22 is disposed at the same layer as the initialization voltage signal line 102 of the pixel circuit unit 10.
Specifically, the initialization voltage signal line 102 may be used to provide the initialization voltage signal to the pixel circuit unit 10. Due to the existence of the hollow area CA, the initialization voltage signal line 102 of the pixel circuit unit 10 around the hollow area CA is disconnected. If the initialization voltage signal lines 102 of two pixel circuit units 10' opposite to each other in the second array direction (the x direction shown in fig. 4) are directly connected, the length of the initialization voltage signal line 102 will be increased due to the routing of the routing lines around the hollow area, and thus the resistance capacitance on the initialization voltage signal line 102 of the pixel circuit unit 10 around the hollow area CA is different from the resistance capacitance on the initialization voltage signal line 102 of the other pixel circuit units 10.
The pixel circuit structure 400 according to the embodiment of the present invention is formed by disposing the second connecting portion 22 and the initialization voltage signal line 102 of the pixel circuit unit 10 on the same layer. The initialization voltage signal lines 102 of at least two adjacent pixel circuit units 10' in the first array direction (x direction shown in fig. 4) around the hollow area CA may be connected through the merged signal line 30, and then the merged signal lines 30 arranged oppositely are connected through the second connection unit 221, so as to compensate for the difference in the length of the routing while ensuring the reduction of the wiring space, and further ensure the consistency of the resistance and capacitance on the initialization voltage signal lines 102 of the pixel circuit units 10 around the hollow area and around the non-hollow area.
Fig. 5 is a schematic structural diagram of a display panel according to an embodiment of the invention. As shown in fig. 5, the display panel 1000 includes a pixel circuit layer (below the display pixel layer 500), and the pixel circuit layer includes any of the above-mentioned pixel circuit structures. The display panel 1000 further includes a display pixel layer 500, wherein the display pixel layer 500 includes an opening 501 disposed corresponding to the hollow area CA.
Specifically, the area of the opening 501 in the display pixel layer 500 can be used for setting a camera module, and the rest areas are used for displaying, so that the larger screen occupation ratio is realized. In addition, the projection of the opening 501 on the pixel circuit layer is located in the hollow area CA, so that the packaging reliability of the display panel 1000 during packaging can be ensured.
According to the display panel 1000 provided by the embodiment of the invention, the pixel circuit structure is provided with the connecting part for connecting the pixel circuit units around the hollow area, so that the resistance and capacitance difference between the pixel circuit units around the hollow area and other pixel circuit units is compensated, and the uniformity of display around the open area and non-open area of the display panel 1000 is improved.
It will be understood that the foregoing is illustrative of particular embodiments of the invention and that the invention is not limited thereto, as many similar variations are possible. All modifications which would occur to one skilled in the art and which are, therefore, directly derived or suggested from the disclosure herein are deemed to be within the scope of the present invention.
It should be understood that the terms such as first, second, etc. used in the embodiments of the present invention are only used for clearly describing the technical solutions of the embodiments of the present invention, and are not used to limit the protection scope of the present invention.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and the like that are within the spirit and principle of the present invention are included in the present invention.

Claims (10)

1. A pixel circuit structure, comprising:
the display device comprises a plurality of pixel circuit units, a plurality of driving units and a plurality of control units, wherein the pixel circuit units are respectively used for providing driving signals for the display pixel units; and
and a connection part configured to connect the pixel circuit units around the hollow area.
2. The pixel circuit structure of claim 1, wherein the hollowed-out area is circular or square.
3. The pixel circuit structure according to claim 1, wherein the plurality of pixel circuit units are arranged in an array.
4. The pixel circuit structure according to claim 3, wherein the connection portion includes a first connection portion through which two of the pixel circuit units around the hollow area in the first array direction are connected.
5. The pixel circuit structure according to claim 4, wherein the first connection portion includes a plurality of first connection units arranged at intervals, and wherein two pixel circuit units opposite in the first array direction are connected by the first connection units.
6. The pixel circuit structure according to claim 4, wherein the first connection portion is disposed on the same layer as the semiconductor trace of the pixel circuit unit.
7. The pixel circuit structure according to claim 3, further comprising a merged signal line for connecting at least two pixel circuit units adjacent in the first array direction around the hollow area;
the connecting part comprises a second connecting part which comprises a plurality of second connecting units arranged side by side;
and the two combined signal lines oppositely arranged in the second array direction of the pixel circuit units are connected through the second connecting unit.
8. The pixel circuit structure according to claim 7, wherein the plurality of second connection units are disposed to surround the hollow area.
9. The pixel circuit structure according to claim 7, wherein the second connection portion is provided in the same layer as an initialization voltage signal line of the pixel circuit unit.
10. A display panel, comprising:
a pixel circuit layer comprising the pixel circuit structure of any one of claims 1-9; and
and the display pixel layer comprises an opening which is correspondingly arranged with the hollow-out area.
CN202010587923.7A 2020-06-24 2020-06-24 Pixel circuit structure and display panel Pending CN111710240A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010587923.7A CN111710240A (en) 2020-06-24 2020-06-24 Pixel circuit structure and display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010587923.7A CN111710240A (en) 2020-06-24 2020-06-24 Pixel circuit structure and display panel

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Publication Number Publication Date
CN111710240A true CN111710240A (en) 2020-09-25

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160006996A (en) * 2014-07-10 2016-01-20 네오뷰코오롱 주식회사 Circle type display and manufacturing method the same
CN107689196A (en) * 2017-09-05 2018-02-13 信利（惠州）智能显示有限公司 A kind of AMOLED display screens and its wiring method
CN108182886A (en) * 2018-01-02 2018-06-19 上海天马微电子有限公司 Array substrate, display panel and display device
CN208141719U (en) * 2018-04-24 2018-11-23 昆山国显光电有限公司 Display panel and display device
CN109143645A (en) * 2018-09-13 2019-01-04 厦门天马微电子有限公司 A kind of display panel, its driving method and display device
CN109285466A (en) * 2018-09-27 2019-01-29 武汉天马微电子有限公司 A kind of display panel and display device
CN110610667A (en) * 2019-10-28 2019-12-24 武汉天马微电子有限公司 Display panel and display device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20160006996A (en) * 2014-07-10 2016-01-20 네오뷰코오롱 주식회사 Circle type display and manufacturing method the same
CN107689196A (en) * 2017-09-05 2018-02-13 信利（惠州）智能显示有限公司 A kind of AMOLED display screens and its wiring method
CN108182886A (en) * 2018-01-02 2018-06-19 上海天马微电子有限公司 Array substrate, display panel and display device
CN208141719U (en) * 2018-04-24 2018-11-23 昆山国显光电有限公司 Display panel and display device
CN109143645A (en) * 2018-09-13 2019-01-04 厦门天马微电子有限公司 A kind of display panel, its driving method and display device
CN109285466A (en) * 2018-09-27 2019-01-29 武汉天马微电子有限公司 A kind of display panel and display device
CN110610667A (en) * 2019-10-28 2019-12-24 武汉天马微电子有限公司 Display panel and display device

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Application publication date: 20200925