CN111697017A - Image sensor and preparation method thereof - Google Patents

Image sensor and preparation method thereof Download PDF

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CN111697017A
CN111697017A CN202010789254.1A CN202010789254A CN111697017A CN 111697017 A CN111697017 A CN 111697017A CN 202010789254 A CN202010789254 A CN 202010789254A CN 111697017 A CN111697017 A CN 111697017A
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layer
semiconductor wafer
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image sensor
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CN111697017B (en
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吴永芬
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Jiyuan Dadi Communication Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/1469Assemblies, i.e. hybrid integration
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/1462Coatings
    • H01L27/14621Colour filter arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14625Optical elements or arrangements associated with the device
    • H01L27/14627Microlenses
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14601Structural or functional details thereof
    • H01L27/14636Interconnect structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/146Imager structures
    • H01L27/14683Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14685Process for coatings or optical elements
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

The invention relates to an image sensor and a preparation method thereof, wherein the method comprises the following steps: preparing a CMOS processor chip and a photodiode chip, bonding the CMOS processor chip and the photodiode chip together, and thinning the photodiode chip; then forming an antireflection film on the photodiode chip; forming a photoresist layer on the antireflection film, and forming a first groove in the photoresist layer; then forming a grid structure in the groove; forming criss-cross second grooves in the photoresist layer surrounded by each grid structure, depositing a metal material in the second grooves by using a mask to form metal grids, and removing the photoresist layer; then forming a filter in the area surrounded by each grid structure, wherein the filter wraps the metal grids; a lens structure is then formed on each of the filters.

Description

Image sensor and preparation method thereof
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to an image sensor and a preparation method thereof.
Background
The image sensor receives an optical signal from an object and converts the optical signal into an electrical signal, which may then be transmitted for further processing, such as digitization, and then storage in a storage device, such as a memory, optical or magnetic disk, or for display on a display, printing, or the like. Image sensors are commonly used in devices such as digital cameras, video cameras, scanners, facsimile machines, and the like.
The image sensor pixel array generally includes two parts, namely a photosensitive pixel array and a shading pixel array, wherein the photosensitive pixel array is used for sensing and acquiring image information, information acquired by the shading pixel array is used for reference information calibration in image information processing, and real image information is equal to information acquired by the photosensitive pixel array minus information acquired by the shading pixel, namely, the black level calibration is called. In order to ensure the accuracy of the black level calibration, it is necessary to ensure the stability of the photosensitive pixel array and the light-shielded pixel array.
Disclosure of Invention
The present invention is directed to overcome the above-mentioned shortcomings of the prior art and to provide an image sensor and a method for manufacturing the same.
In order to achieve the purpose, the invention adopts the technical scheme that:
a method of manufacturing an image sensor, comprising the steps of:
1) preparing a CMOS processor chip: providing a first semiconductor wafer, forming a plurality of CMOS functional regions arranged at intervals on the first semiconductor wafer, then forming a first redistribution layer on the first semiconductor wafer, and forming a first embedded conductive structure on the first redistribution layer.
2) Preparing a photodiode chip: providing a second semiconductor wafer, forming a plurality of photodiode functional regions arranged at intervals on the second semiconductor wafer, then forming a second redistribution layer on the second semiconductor wafer, and forming a second damascene conductive structure on the second redistribution layer.
3) Bonding the first and second semiconductor wafers together such that the first and corresponding second damascene conductive structures are bonded to each other.
4) And then thinning the second semiconductor wafer.
5) And then forming an antireflection film on the second semiconductor wafer.
6) Forming a photoresist layer on the antireflection film, and forming a first groove in the photoresist layer; a grid structure is then formed in the grooves.
7) Then, second grooves which are criss-cross are formed in the photoresist layer surrounded by each grid structure, then metal materials are deposited in the second grooves by using a mask to form metal grids, and then the photoresist layer is removed.
8) Then, a filter is formed in the area surrounded by each grid structure, and the filter wraps the metal mesh.
9) A lens structure is then formed on each of the filters.
Preferably, in step 1), the first redistribution layer includes a first dielectric layer and one or more first metal interconnection layers formed in the first dielectric layer, and the specific steps of forming the first damascene conductive structure on the first redistribution layer are as follows: forming a first passivation layer on the first redistribution layer, etching the first passivation layer to form a first via exposing the first metal interconnect layer, and then depositing a metal conductive material in the first via to form the first damascene conductive structure.
Preferably, in step 2), the second redistribution layer includes a second dielectric layer and one or more second metal interconnection layers formed in the second dielectric layer, and the specific steps of forming a second damascene conductive structure on the second redistribution layer are as follows: forming a second passivation layer on the second redistribution layer, etching the second passivation layer to form a second via exposing the second metal interconnect layer, and then depositing a metal conductive material in the second via to form the second damascene conductive structure.
Preferably, in the step 4), the second semiconductor wafer is thinned to 50 to 100 micrometers.
Preferably, in the step 5), the formation method of the anti-reflective film is a thermal oxidation method, an ALD method or a PECVD method, and the material of the anti-reflective film is one or more of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide and aluminum nitride.
Preferably, in the step 6), the material of the grid structure is one or more of gold, silver, copper, aluminum, tungsten, titanium, palladium, nickel, and platinum, and the grid structure is formed by thermal evaporation, magnetron sputtering, electron beam evaporation, electroplating, or electroless plating.
Preferably, in the step 7), the material of the metal grid is one of gold, silver, copper and aluminum, and the metal grid is formed by thermal evaporation, magnetron sputtering, electron beam evaporation or electroplating process.
Preferably, in the step 8), the optical filter includes an organic material.
The invention also provides an image sensor which is prepared and formed by adopting the method.
Compared with the prior art, the invention has the following advantages:
in the manufacturing process of the image sensor, the criss-cross second grooves are formed in the photoresist layer surrounded by each grid structure, then the metal material is deposited in the second grooves by using the mask to form the metal grids, the optical filter is formed in the region surrounded by each grid structure, the optical filter wraps the metal grids, the metal grids are formed in the optical filter to divide the optical filter into a plurality of sub-regions, and therefore the thermal expansion of the optical filter in a high-temperature environment can be inhibited, and the stability of the light-shielding pixel array and the light-shielding pixel array in the image sensor is effectively improved.
And through forming CMOS processor chip and photodiode chip separately, and then bond CMOS processor chip in photodiode chip below, the photodiode of the upper strata converts incident light into the electric signal, and the processing of the pixel signal is accomplished by the CMOS signal processor under each pixel, because the two superpose from top to bottom, do not limit the spatial resolution, can realize the purpose of the high resolution at the same time.
Drawings
Fig. 1 to 8 are schematic structural views of respective manufacturing processes of the image sensor of the present invention.
Detailed Description
The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the disclosure, its application, or uses. That is, the structures and methods herein are shown by way of example to illustrate different embodiments of the structures and methods of the present disclosure. Those skilled in the art will understand, however, that they are merely illustrative of exemplary ways in which the disclosure may be practiced and not exhaustive. Furthermore, the figures are not necessarily to scale, some features may be exaggerated to show details of particular components
The invention provides a preparation method of an image sensor, which comprises the following steps:
1) preparing a CMOS processor chip: providing a first semiconductor wafer, forming a plurality of spaced-apart CMOS functional regions on the first semiconductor wafer, then forming a first redistribution layer on the first semiconductor wafer, forming a first damascene conductive structure on the first redistribution layer, the first redistribution layer including a first dielectric layer and one or more first metal interconnect layers formed in the first dielectric layer, the forming a first damascene conductive structure on the first redistribution layer being performed by: forming a first passivation layer on the first redistribution layer, etching the first passivation layer to form a first via exposing the first metal interconnect layer, and then depositing a metal conductive material in the first via to form the first damascene conductive structure.
2) Preparing a photodiode chip: providing a second semiconductor wafer, forming a plurality of spaced photodiode functional regions on the second semiconductor wafer, forming a second redistribution layer on the second semiconductor wafer, forming a second damascene conductive structure on the second redistribution layer, the second redistribution layer including a second dielectric layer and one or more second metal interconnect layers formed in the second dielectric layer, the forming a second damascene conductive structure on the second redistribution layer being performed by: forming a second passivation layer on the second redistribution layer, etching the second passivation layer to form a second via exposing the second metal interconnect layer, and then depositing a metal conductive material in the second via to form the second damascene conductive structure.
3) Bonding the first and second semiconductor wafers together such that the first and corresponding second damascene conductive structures are bonded to each other.
4) And then thinning the second semiconductor wafer to 50-100 microns.
5) And then forming an antireflection film on the second semiconductor wafer, wherein the formation method of the antireflection film is a thermal oxidation method, an ALD method or a PECVD method, and the material of the antireflection film is one or more of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide and aluminum nitride.
6) Forming a photoresist layer on the antireflection film, and forming a first groove in the photoresist layer; and then forming a grid structure in the groove, wherein the grid structure is made of one or more of gold, silver, copper, aluminum, tungsten, titanium, palladium, nickel and platinum, and is formed by thermal evaporation, magnetron sputtering, electron beam evaporation, electroplating or chemical plating.
7) And then forming second grooves which are criss-cross in a photoresist layer surrounded by each grid structure, depositing a metal material in the second grooves by using a mask to form a metal grid, removing the photoresist layer, wherein the metal grid is made of one of gold, silver, copper and aluminum, and is formed by a thermal evaporation process, a magnetron sputtering process, an electron beam evaporation process or an electroplating process.
8) Then, a filter is formed in the area surrounded by each grid structure, the filter wraps the metal mesh, and the filter comprises organic materials.
9) A lens structure is then formed on each of the filters.
The invention also provides an image sensor which is prepared and formed by adopting the method.
A method of manufacturing an image sensor according to one or more exemplary embodiments of the present disclosure is described below with reference to fig. 1 to 8.
As shown in fig. 1, the preparation of CMOS processor chips: providing a first semiconductor wafer 10, forming a plurality of CMOS functional regions 11 spaced apart on the first semiconductor wafer 10, then forming a first redistribution layer 12 on the first semiconductor wafer 10, forming a first damascene conductive structure 13 on the first redistribution layer 12, the first redistribution layer 12 including a first dielectric layer and one or more first metal interconnect layers formed in the first dielectric layer, the step of forming the first damascene conductive structure 13 on the first redistribution layer 12 being: a first passivation layer is formed on the first redistribution layer, the first passivation layer is etched to form a first via exposing the first metal interconnect layer, and then a metal conductive material is deposited in the first via to form the first damascene conductive structure 13.
The first semiconductor wafer 10 may be made of any semiconductor material suitable for a semiconductor device (such as Si, SiC, SiGe, etc.), among others. The first semiconductor wafer 10 may also be a semiconductor portion of various composite substrates such as silicon-on-insulator (SOI) and silicon germanium-on-insulator (sige-on-insulator), and the doping type of the first semiconductor wafer 10 may be N-type doping or P-type doping. The first dielectric layer is made of one or more of silicon nitride, silicon oxide and silicon oxynitride, the first dielectric layer is prepared by a PECVD method, and the first metal interconnection layer is made of one or more of copper, aluminum, silver, silicon, titanium, palladium and gold, specifically aluminum, silicon-aluminum alloy and copper. The first metal interconnection layer is formed through evaporation, magnetron sputtering or electroplating process. The specific steps of forming the first damascene conductive structure 13 on the first redistribution layer 12 are as follows: a first passivation layer, which may be silicon oxide or aluminum oxide, is formed on the first redistribution layer 12 by a PECVD or ALD method, and then a via hole is formed in the first passivation layer on the first redistribution layer 12 by a photolithography and etching process. Then, a seed layer is formed by sputtering Ti/Cu, and a metal layer is formed by electroplating copper, wherein the thickness of the metal layer is preferably 2-10 μm, and more preferably 5-8 μm. The metal layer is then subjected to a chemical mechanical polishing process to obtain the first damascene conductive structure 13 damascene in the via.
As shown in fig. 2, preparation of the photodiode chip: providing a second semiconductor wafer 20, forming a plurality of spaced apart photodiode regions 21 on the second semiconductor wafer 20, forming a second redistribution layer 22 on the second semiconductor wafer 20, forming a second damascene conductive structure 23 on the second redistribution layer 22, the second redistribution layer 22 including a second dielectric layer and one or more second metal interconnect layers formed in the second dielectric layer, the forming of the second damascene conductive structure 23 on the second redistribution layer being performed by: forming a second passivation layer on the second redistribution layer, etching the second passivation layer to form a second via exposing the second metal interconnect layer, and then depositing a metal conductive material in the second via to form the second damascene conductive structure.
The second semiconductor wafer 20 may be made of any semiconductor material suitable for semiconductor devices, such as Si, SiC, SiGe, etc., among others. The second semiconductor wafer 20 may be a semiconductor portion of various composite substrates such as silicon-on-insulator (SOI) and silicon germanium-on-insulator (sige-on-insulator), and the photodiode functional region formed in the second semiconductor wafer 20 may be formed by forming an N-type doped region in the P-type second semiconductor wafer 20. Here, the N-type doped region constituting the photodiode may be formed by an ion implantation process, that is, by implanting N-type dopant into the P-type second semiconductor wafer 20. It will be appreciated by those skilled in the art that the second semiconductor wafer 20 may also be N-type doped, in which case the doped regions forming the photodiodes are P-type doped.
The second dielectric layer is made of one or more of silicon nitride, silicon oxide and silicon oxynitride, the second dielectric layer is prepared by a PECVD method, and the second metal interconnection layer is made of one or more of copper, aluminum, silver, silicon, titanium, palladium and gold, specifically aluminum, silicon-aluminum alloy and copper. The second metal interconnection layer is formed through evaporation, magnetron sputtering or electroplating process. The specific steps of forming the first damascene conductive structure 23 on the second redistribution layer 22 are as follows: a second passivation layer, which may be silicon oxide or aluminum oxide, is formed on the second redistribution layer 22 by PECVD or ALD method, and then a via hole is formed in the second passivation layer on the second redistribution layer 22 by photolithography and etching processes. Then, a seed layer is formed by sputtering Ti/Cu, and a metal layer is formed by electroplating copper, wherein the thickness of the metal layer is preferably 2-10 μm, and more preferably 5-8 μm. And then, performing chemical mechanical polishing treatment on the metal layer to obtain a second damascene conductive structure 23 damascene in the through hole.
As shown in fig. 3, the first semiconductor wafer 10 and the second semiconductor wafer 20 are bonded together, such that the first damascene conductive structures 13 and the corresponding second damascene conductive structures 23 are bonded to each other. The specific process comprises the following steps: the first damascene conductive structure 13 of the first semiconductor wafer 10 and the second damascene conductive structure 23 of the second semiconductor wafer 20 are aligned with each other, then bonded using a pressure of 3-6MPa, and baked at 150-250 c for 30-60 minutes.
As shown in fig. 4, the second semiconductor wafer 20 is then thinned to 50-100 μm, and the second semiconductor wafer 20 is polished by a chemical mechanical polishing process, so as to obtain a suitable thickness by the thinning process.
As shown in fig. 5, an anti-reflective film 30 is then formed on the second semiconductor wafer, the formation method of the anti-reflective film 30 is a thermal oxidation method, an ALD method or a PECVD method, the material of the anti-reflective film 30 is one or more of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide and aluminum nitride, and the anti-reflective film 30 is used for reducing reflected light and increasing the amount of transmitted light, thereby improving the sensitivity of the image sensor.
As shown in fig. 6, a photoresist layer 40 is then formed on the anti-reflection film 30, and then a first groove 41 is formed in the photoresist layer 40; next, a grid structure 50 is formed in the first groove 41, the material of the grid structure 50 is one or more of gold, silver, copper, aluminum, tungsten, titanium, palladium, nickel, and platinum, and the grid structure 50 is formed by thermal evaporation, magnetron sputtering, electron beam evaporation, electroplating, or chemical plating.
As shown in fig. 7, second grooves are formed in a photoresist layer surrounded by each of the grid structures 50, and then a metal material is deposited in the second grooves by using a mask to form metal grids 60, and then the photoresist layer is removed, wherein the metal grids 60 are formed by thermal evaporation, magnetron sputtering, electron beam evaporation or electroplating, and the metal grids 60 are made of one of gold, silver, copper and aluminum.
As shown in fig. 8, a filter 70 is then formed in the region surrounded by each of the grid structures, the filter wraps the metal mesh 60, the filter 70 includes an organic material, and the specific process is as follows: a photoresist material containing a dye is spin-coated on the second semiconductor wafer 20 to form the optical filters 70, and then a lens structure 80 is formed on each of the optical filters 70, the lens structure 80 being used to change an optical path such that light enters the optical filter 7 along a specific optical path.
In the manufacturing process of the image sensor, the criss-cross second grooves are formed in the photoresist layer surrounded by each grid structure, then the metal material is deposited in the second grooves by using the mask to form the metal grids, the optical filter is formed in the region surrounded by each grid structure, the optical filter wraps the metal grids, the metal grids are formed in the optical filter to divide the optical filter into a plurality of sub-regions, and therefore the thermal expansion of the optical filter in a high-temperature environment can be inhibited, and the stability of the light-shielding pixel array and the light-shielding pixel array in the image sensor is effectively improved.
And through forming CMOS processor chip and photodiode chip separately, and then bond CMOS processor chip in photodiode chip below, the photodiode of the upper strata converts incident light into the electric signal, and the processing of the pixel signal is accomplished by the CMOS signal processor under each pixel, because the two superpose from top to bottom, do not limit the spatial resolution, can realize the purpose of the high resolution at the same time.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention.

Claims (9)

1. A method of manufacturing an image sensor, comprising: the method comprises the following steps:
1) preparing a CMOS processor chip: providing a first semiconductor wafer, forming a plurality of CMOS functional regions arranged at intervals on the first semiconductor wafer, then forming a first redistribution layer on the first semiconductor wafer, and forming a first embedded conductive structure on the first redistribution layer;
2) preparing a photodiode chip: providing a second semiconductor wafer, forming a plurality of photodiode functional regions arranged at intervals on the second semiconductor wafer, then forming a second redistribution layer on the second semiconductor wafer, and forming a second damascene conductive structure on the second redistribution layer;
3) bonding the first semiconductor wafer and the second semiconductor wafer together such that the first damascene conductive structure and the corresponding second damascene conductive structure are bonded to each other;
4) then thinning the second semiconductor wafer;
5) then forming an antireflection film on the second semiconductor wafer;
6) forming a photoresist layer on the antireflection film, and forming a first groove in the photoresist layer; then forming a grid structure in the groove;
7) forming criss-cross second grooves in the photoresist layer surrounded by each grid structure, depositing a metal material in the second grooves by using a mask to form metal grids, and removing the photoresist layer;
8) then forming a filter in the area surrounded by each grid structure, wherein the filter wraps the metal grids;
9) a lens structure is then formed on each of the filters.
2. The method for manufacturing an image sensor according to claim 1, wherein: in step 1), the first redistribution layer includes a first dielectric layer and one or more first metal interconnection layers formed in the first dielectric layer, and the step of forming the first damascene conductive structure on the first redistribution layer includes: forming a first passivation layer on the first redistribution layer, etching the first passivation layer to form a first via exposing the first metal interconnect layer, and then depositing a metal conductive material in the first via to form the first damascene conductive structure.
3. The method for manufacturing an image sensor according to claim 1, wherein: in step 2), the second redistribution layer includes a second dielectric layer and one or more second metal interconnection layers formed in the second dielectric layer, and the specific steps of forming a second damascene conductive structure on the second redistribution layer are as follows: forming a second passivation layer on the second redistribution layer, etching the second passivation layer to form a second via exposing the second metal interconnect layer, and then depositing a metal conductive material in the second via to form the second damascene conductive structure.
4. The method for manufacturing an image sensor according to claim 1, wherein: in the step 4), the second semiconductor wafer is thinned to 50-100 microns.
5. The method for manufacturing an image sensor according to claim 1, wherein: in the step 5), the formation method of the anti-reflection film is a thermal oxidation method, an ALD method or a PECVD method, and the material of the anti-reflection film is one or more of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide and aluminum nitride.
6. The method for manufacturing an image sensor according to claim 1, wherein: in the step 6), the material of the grid structure is one or more of gold, silver, copper, aluminum, tungsten, titanium, palladium, nickel and platinum, and the grid structure is formed by thermal evaporation, magnetron sputtering, electron beam evaporation, electroplating or chemical plating.
7. The method for manufacturing an image sensor according to claim 1, wherein: in the step 7), the metal grid is made of one of gold, silver, copper and aluminum, and is formed through a thermal evaporation process, a magnetron sputtering process, an electron beam evaporation process or an electroplating process.
8. The method for manufacturing an image sensor according to claim 1, wherein: in the step 8), the optical filter includes an organic material.
9. An image sensor formed by the method of any one of claims 1 to 8.
CN202010789254.1A 2020-04-08 2020-08-07 Image sensor and preparation method thereof Active CN111697017B (en)

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Cited By (1)

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WO2022222123A1 (en) * 2021-04-23 2022-10-27 京东方科技集团股份有限公司 Preparation method for metal grid, and thin-film sensor and preparation method therefor

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US20150115382A1 (en) * 2012-08-22 2015-04-30 Taiwan Semiconductor Manufacturing Company, Ltd. Image Sensor Comprising Reflective Guide Layer and Method of Forming the Same
CN109427831A (en) * 2017-08-31 2019-03-05 台湾积体电路制造股份有限公司 Image Sensor device
CN110112159A (en) * 2019-05-13 2019-08-09 德淮半导体有限公司 Imaging sensor and forming method thereof

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Publication number Priority date Publication date Assignee Title
US20150115382A1 (en) * 2012-08-22 2015-04-30 Taiwan Semiconductor Manufacturing Company, Ltd. Image Sensor Comprising Reflective Guide Layer and Method of Forming the Same
CN109427831A (en) * 2017-08-31 2019-03-05 台湾积体电路制造股份有限公司 Image Sensor device
CN110112159A (en) * 2019-05-13 2019-08-09 德淮半导体有限公司 Imaging sensor and forming method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022222123A1 (en) * 2021-04-23 2022-10-27 京东方科技集团股份有限公司 Preparation method for metal grid, and thin-film sensor and preparation method therefor

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