CN111682770A - Primary side current sampling double closed-loop digital control method of active clamping forward converter - Google Patents

Primary side current sampling double closed-loop digital control method of active clamping forward converter Download PDF

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CN111682770A
CN111682770A CN202010559541.3A CN202010559541A CN111682770A CN 111682770 A CN111682770 A CN 111682770A CN 202010559541 A CN202010559541 A CN 202010559541A CN 111682770 A CN111682770 A CN 111682770A
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electrically connected
resistor
capacitor
current
voltage
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许国
孙尧
崔玉娇
陈孝莺
韩华
王辉
粟梅
刘永露
熊文静
但汉兵
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Central South University
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Central South University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention provides a primary side current sampling double closed-loop digital control method of an active clamping forward converter, which comprises the following steps: step 1, the voltage at two ends of an output load is sampled by a voltage sampling circuit, and the sampled voltage value is processed by a voltage sampling operational amplifier conditioning circuit and then input into a DSP. The invention adopts double closed-loop digital control, the output voltage of the active clamping forward converter is sampled by a voltage sampling circuit and fed back into the DSP, a current reference is output by a voltage loop controller, the primary current of a transformer is sampled by a primary current sampling circuit and fed back into the DSP, the average value of the primary current is obtained as a current feedback, the current feedback is compared with the current reference and is output as a duty ratio by a controller in the DSP, the purpose of double closed-loop digital control is achieved, the efficiency and the reliability of the active clamping forward converter are improved, and the double closed-loop digital control enables the active clamping forward converter to be flexibly and simply controlled and has quick dynamic response.

Description

Primary side current sampling double closed-loop digital control method of active clamping forward converter
Technical Field
The invention relates to the technical field of power electronics, in particular to a primary side current sampling double closed-loop digital control method of an active clamping forward converter.
Background
Switching power supplies were introduced in the 70's of the 20 th century, replacing linear regulated power supplies in many instances. Switching power supplies, an alternative to linear power supplies, overcome many disadvantages. The inverter frequency in a switching power supply is usually very high (above 20 kHz), so that the size of the transformer is greatly reduced, thereby reducing the power supply size. Meanwhile, the loss of the power electronic device working in the switching state is small, and the efficiency of the transformer is improved.
Various electronic devices and electrical control equipment all adopt a switching power supply as a power supply. Because the integration level of the electronic device is continuously increased, the functions are stronger and stronger, and the size is smaller and smaller, a novel power supply with small size, light weight, high efficiency and good performance is urgently needed, and powerful power is provided for the development of the switching power supply technology.
High frequency, miniaturization, modularization and digitization are the development directions of the direct current switching power supply. High frequency is the basis of miniaturization and modularization, and a switching power supply with a switching frequency of hundreds of hertz to megahertz is used at present. The power-to-weight ratio or the volume ratio is an important index for characterizing the miniaturization of the power supply. Modularization and miniaturization can not be separated, meanwhile, the modularization obviously improves the reliability and the use flexibility of the power supply, and the production and the use are simplified. The parallel connection, the serial connection and the cascade connection of the module power supply are convenient for users to use and production. Digital control power supplies are gradually emerging, which, besides having the advantages of short development cycle, programmability, high integration, low sensitivity, power management, etc., can also use a programming method to implement complex control algorithms, easily adjusting control strategies [9 ].
The continuous improvement of the frequency of the switching power supply also brings new problems for people, and the switching loss is continuously increased along with the improvement of the switching frequency, so that the problem becomes a key problem for preventing the improvement of the power supply efficiency. To solve this problem, in the 80 s of the 20 th century, scholars proposed soft switching techniques to solve the switching losses. The soft switching technology can reduce the switching loss and improve the electromagnetic interference condition.
The active clamping forward converter is provided aiming at the requirements of complex and changeable working environment, wide-range load operation and high efficiency of a plate electrode power supply of an electric locomotive. The magnetic reset of the transformer and the soft switching of the switching tube are realized through the clamping circuit. The excitation circuit can be suitable for occasions with wide-range input voltage, excitation energy is fully fed back to a power grid, and the excitation circuit has great advantages in circuit performance and efficiency. In order to make the converter have good dynamic performance, an active clamping forward converter model is established and a reasonable control method is selected through analysis. In the voltage mode control, when there is a disturbance such as load current or input voltage, it is necessary to wait for the change of the load voltage to cause the change of the error amplification signal before implementing the corresponding control process, which may cause a delay of one or more switching cycles, which is not favorable for the dynamic response of the system. Thus, a current control method with faster dynamic response is adopted. Compared with the traditional analog control, the digital control has the advantages of simplicity, flexibility, programmability, strong adjustability, insensitivity to aging and ambient temperature and capability of realizing real-time communication. In the environment of electric locomotive operation and operation, digital control has great advantages in real-time communication and parameter adjustment. The double-closed-loop control based on the primary current sampling is a simple control method with quick transient closed-loop response and quick transient response to the change of input voltage and output load.
Disclosure of Invention
The invention provides a primary side current sampling double closed loop digital control method of an active clamping forward converter, and aims to solve the problems of low efficiency, complex control and slow dynamic response of a system of a traditional converter.
In order to achieve the above object, an embodiment of the present invention provides an active clamp forward converter including:
the power supply comprises a power supply, a first end of a primary side current sampling circuit is electrically connected with a positive end of the power supply, a second end of the primary side current sampling circuit is electrically connected with a negative end of the power supply, a third end of the primary side current sampling circuit is electrically connected with a first end of a current sampling operational amplifier conditioning circuit, and a fourth end of the primary side current sampling circuit is electrically connected with a second end of the current sampling operational amplifier conditioning circuit;
the first end of the clamping capacitor is electrically connected with the positive electrode end of the power supply;
the drain end of the main switching tube is electrically connected with the second end of the clamping capacitor;
a first end of the resonant inductor is electrically connected with a first end of the clamping capacitor;
the first end of the excitation inductor is electrically connected with the second end of the resonance inductor, and the second end of the excitation inductor is electrically connected with the source end of the main switching tube;
the first end of the primary side of the transformer is electrically connected with the first end of the excitation inductor, and the second end of the primary side of the transformer is electrically connected with the second end of the excitation inductor;
the drain end of the auxiliary switch tube is electrically connected with the second end of the excitation inductor, and the source end of the auxiliary switch tube is electrically connected with the negative end of the power supply;
the synchronous rectification circuit comprises a first synchronous rectification switching tube and a second synchronous rectification switching tube, wherein the drain end of the first synchronous rectification switching tube is electrically connected with the first end of the secondary side of the transformer, the drain end of the second synchronous rectification switching tube is electrically connected with the second end of the secondary side of the transformer, and the source end of the second synchronous rectification switching tube is electrically connected with the source end of the first synchronous rectification switching tube;
the output filter circuit comprises a filter inductor and a filter capacitor, wherein the first end of the filter inductor is electrically connected with the drain end of the first synchronous rectification switch tube, the first end of the filter capacitor is electrically connected with the second end of the filter inductor, and the second end of the filter capacitor is electrically connected with the source end of the first synchronous rectification switch tube;
the first end of the output resistor is respectively electrically connected with the first end of the filter capacitor and the first end of the voltage sampling circuit, the second end of the voltage sampling circuit is electrically connected with the first end of the voltage sampling operational amplifier conditioning circuit, the third end of the voltage sampling circuit is electrically connected with the second end of the voltage sampling operational amplifier conditioning circuit, and the second end of the output resistor is electrically connected with the second end of the filter capacitor.
Wherein the voltage sampling circuit comprises:
a first resistor, a first end of the first resistor being electrically connected to a first end of the output resistor;
a first end of the second resistor is electrically connected with a second end of the first resistor, and a second end of the second resistor is electrically connected with a ground terminal;
a first end of the third resistor is electrically connected with the second end of the first resistor;
a first end of the fourth resistor is electrically connected with the second end of the second resistor;
a first end of the first capacitor is electrically connected with a second end of the third resistor, and a second end of the first capacitor is electrically connected with a second end of the fourth resistor;
a first end of the second capacitor is electrically connected with a VDD1 end of the differential isolation voltage sampling chip, and a second end of the second capacitor is electrically connected with a ground end;
a first end of the third capacitor is electrically connected with a first end of the second capacitor, and a second end of the third capacitor is electrically connected with a second end of the second capacitor;
the VINP end of the differential isolation voltage sampling chip is electrically connected with the first end of the first capacitor, the VINN end of the differential isolation voltage sampling chip is electrically connected with the second end of the first capacitor, the GND1 end of the differential isolation voltage sampling chip is electrically connected with a ground end, and the GND2 end of the differential isolation voltage sampling chip is electrically connected with the ground end;
a first end of the fourth capacitor is electrically connected with the VDD2 end of the differential isolation voltage sampling chip, and a second end of the fourth capacitor is electrically connected with a ground end;
a first end of the fifth capacitor is electrically connected with a first end of the fourth capacitor, and a second end of the fifth capacitor is electrically connected with a second end of the fourth capacitor;
a first end of the fifth resistor is electrically connected with the VOUTP end of the differential isolation voltage sampling chip;
a first end of the sixth resistor is electrically connected with the VOUTN end of the differential isolation voltage sampling chip;
and a first end of the sixth capacitor is electrically connected with the second end of the fifth resistor, and a second end of the sixth capacitor is electrically connected with the second end of the sixth resistor.
Wherein, the voltage sampling operational amplifier conditioning circuit includes:
a first end of the seventh resistor is electrically connected with the first end of the sixth capacitor;
a first end of the eighth resistor is electrically connected with the second end of the sixth capacitor;
a first input end of the first isolation amplifier is electrically connected with the second end of the seventh resistor, and a second input end of the first isolation amplifier is electrically connected with the second end of the eighth resistor;
a first end of the seventh capacitor is electrically connected with the second end of the eighth resistor, and a second end of the seventh capacitor is electrically connected with a ground end;
a first end of the ninth resistor is electrically connected with the second input end of the first isolation amplifier, and a second end of the ninth resistor is electrically connected with the second end of the seventh capacitor;
a first end of the eighth capacitor is electrically connected with the first input end of the first isolation amplifier, and a second end of the eighth capacitor is electrically connected with the output end of the first isolation amplifier;
a tenth resistor, a first end of the tenth resistor being electrically connected to the first end of the eighth capacitor, and a second end of the tenth resistor being electrically connected to the second end of the eighth capacitor;
an eleventh resistor, wherein a first end of the eleventh resistor is electrically connected to the output end of the first isolation amplifier;
a first input end of the first voltage follower is electrically connected with an output end of the first voltage follower, and a second input end of the first voltage follower is electrically connected with a second end of the eleventh resistor;
a twelfth resistor, wherein a first end of the twelfth resistor is electrically connected with an output end of the first voltage follower;
and a first end of the ninth capacitor is electrically connected with the second end of the twelfth resistor, and a second end of the ninth capacitor is electrically connected with a ground terminal.
Wherein, the former limit current sampling circuit includes:
the first end of the primary side of the current transformer is electrically connected with the positive end of the power supply, and the second end of the primary side of the current transformer is electrically connected with the negative end of the power supply;
the negative end of the voltage stabilizing diode is electrically connected with the first end of the secondary side of the current transformer;
the positive end of the first diode is electrically connected with the positive end of the voltage stabilizing diode, and the negative end of the first diode is electrically connected with the second end of the secondary side of the current transformer;
the anode end of the second diode is electrically connected with the cathode end of the first diode;
and a first end of the thirteenth resistor is electrically connected with the negative end of the voltage stabilizing diode, and a second end of the thirteenth resistor is electrically connected with the negative end of the second diode.
Wherein, the current sampling operational amplifier conditioning circuit includes:
a fourteenth resistor, a first end of the fourteenth resistor being electrically connected to a first end of the thirteenth resistor;
a fifteenth resistor, a first end of the fifteenth resistor being electrically connected to a second end of the thirteenth resistor;
a first input end of the second isolation amplifier is electrically connected with the second end of the fourteenth resistor, and a second input end of the second isolation amplifier is electrically connected with the second end of the fifteenth resistor;
a tenth capacitor, wherein a first end of the tenth capacitor is electrically connected to a second end of the fifteenth resistor, and a second end of the tenth capacitor is electrically connected to a ground terminal;
a sixteenth resistor, a first end of the sixteenth resistor being electrically connected to the second input terminal of the second isolation amplifier, and a second end of the sixteenth resistor being electrically connected to the second end of the tenth capacitor;
a first end of the eleventh capacitor is electrically connected with the first input end of the second isolation amplifier, and a second end of the eleventh capacitor is electrically connected with the output end of the second isolation amplifier;
a seventeenth resistor, a first end of the seventeenth resistor being electrically connected to the first end of the eleventh capacitor, and a second end of the seventeenth resistor being electrically connected to the second end of the eleventh capacitor;
an eighteenth resistor, a first end of which is electrically connected with the output end of the second isolation amplifier;
a first input end of the second voltage follower is electrically connected with an output end of the second voltage follower, and a second input end of the second voltage follower is electrically connected with a second end of the eighteenth resistor;
a nineteenth resistor, wherein a first end of the nineteenth resistor is electrically connected with an output end of the second voltage follower;
and a first end of the twelfth capacitor is electrically connected with the second end of the nineteenth resistor, and a second end of the twelfth capacitor is electrically connected with a ground terminal.
The first end of the ninth capacitor is electrically connected with the first end of the DSP, the first end of the twelfth capacitor is electrically connected with the second end of the DSP, the third end of the DSP is electrically connected with the gate end of the main switching tube, and the fourth end of the DSP is electrically connected with the gate end of the auxiliary switching tube; the main switch tube, the auxiliary switch tube, the first synchronous rectification switch tube and the second synchronous rectification switch tube respectively comprise a body diode and a parasitic junction capacitor of a drain source electrode which are connected in an anti-parallel mode.
Wherein, include:
step 1, sampling voltages at two ends of an output load through a voltage sampling circuit, inputting the sampled voltage values into a DSP after the voltage values are processed by a voltage sampling operational amplifier conditioning circuit, and outputting reference values of a current loop after the voltage values pass through a voltage loop controller in the DSP;
step 2, sampling the primary current of the transformer through a primary current sampling circuit, conditioning the sampled primary current value through a current sampling operational amplifier processing circuit, inputting the conditioned primary current value into a DSP, and outputting a duty ratio after the DSP passes through a current loop controller;
and 3, comparing the duty ratio with the carrier in the DSP to generate a PWM signal, and controlling the main switching tube and the auxiliary switching tube through the PWM signal.
Wherein, the step 1 specifically comprises:
adopt digital control to constitute two closed-loop control system, two closed-loop control system use the voltage ring as the outer loop, the current ring is the inner ring, the voltage ring uses voltage sampling circuit to sample the output voltage of active clamp forward converter as the feedback of voltage ring, divide pressure through first resistance and second resistance, sampling output voltage, adopt difference isolation voltage sampling chip, keep apart active clamp forward converter and DSP, difference isolation voltage sampling chip output difference signal is through voltage sampling fortune put modulate circuit, produce the signal that can input to DSP and carry out the processing, the ratio of seventh resistance and tenth resistance is:
Figure BDA0002545580770000071
wherein R is1Denotes a seventh resistance, Rf1Denotes a tenth resistance, GisoRepresenting a first isolation amplifier amplification factor;
the resistance ratio of the seventh resistor to the tenth resistor is designed to be 0.5, the output signal in the voltage sampling circuit is half of the input signal, the sampling signal is processed to be less than or equal to 3.3V, and the voltage V is outputOAfter being sampled by the voltage sampling circuit, the signals are input into the DSP and a reference signal V set in a programrefThe difference value of (a) is used as an error, PI control is realized through program operation, a final sampling value entering a DSP is output from an active clamping forward converter, and the parameter calculation is as follows:
Figure BDA0002545580770000072
wherein u represents the output voltage of the active clamp forward circuit, GrDenotes the coefficient of partial pressure, GisoDenotes the first isolation amplifier amplification factor, M denotes the operational circuit amplification factor, u1Representing the final sampled value of the main circuit output voltage.
Wherein, the step 2 specifically comprises:
the output of a voltage ring is used as a reference value of a current loop, a primary side current in an active clamping forward converter is used as feedback of the current loop, a current transformer is used for sampling the primary side current, a sampling signal can be isolated to the ground, high precision is achieved, the primary side current value is sampled through the current transformer, the current signal is converted into a voltage signal through a primary side current sampling circuit, the primary side current in the active clamping forward circuit is superposition of current of an exciting inductor and input side current under each working mode, when the primary side current is increased in the forward direction, the primary side current sampling circuit is sampled through the current transformer, a second diode is conducted, the current signal is converted into a voltage signal, and the voltage signal enters a current sampling operational amplifier conditioning circuit; when the primary current is zero, the exciting current of the current transformer is still positive, the voltage stabilizing diode is broken down, the current transformer starts to demagnetize, the primary current reacts on the thirteenth resistor and is converted into a voltage signal, the voltage signal is processed by the current sampling operational amplifier conditioning circuit to output a signal I, the signal I is input into the DSP to be subjected to A/D conversion, the voltage signal sampled in the second isolation amplifier is input into the DSP according to n times of the input signal I to be subjected to A/D conversion, and the ratio of the seventeenth resistor to the fourteenth resistor is as follows:
Figure BDA0002545580770000081
wherein R isf2Denotes a seventeenth resistance, R5Represents a fourteenth resistance, n represents a magnification;
the current rises when the main switching tube is conducted, the current is zero when the main switching tube is turned off, the current corresponding to the middle moment when the main switching tube is conducted is approximate to the average current of the primary side current, the current corresponding to the moment corresponding to the half duty ratio is sampled by using the DSP, the sampling is performed once in each period, the current average value of five periods is taken, and the current average value is used as feedback to be input into the DSP.
Wherein, the step 3 specifically comprises:
the duty ratio signal output by the current loop is compared with a carrier generated by the setting of the PWM module in the DSP to output a PWM signal, and the PWM signal is input into a driving chip to drive the main switching tube and the auxiliary switching tube.
The scheme of the invention has the following beneficial effects:
the primary side current sampling double closed-loop digital control method of the active clamping forward converter in the above embodiment of the invention adopts double closed-loop digital control on the basis that the active clamping forward converter realizes the efficiency improvement of a soft switch in a wide load range, samples the output voltage of the active clamping forward converter through the voltage sampling circuit, feeds the output voltage back into the DSP, outputs a current reference through the voltage loop controller, samples the primary side current of the transformer through the primary side current sampling circuit, feeds the primary side current back into the DSP, obtains the average value of the primary side current as current feedback, compares the current feedback with the current reference, outputs as a duty ratio through the controller in the DSP, achieves the purpose of double closed-loop digital control, realizes the soft switching of the active clamping forward converter in a wide voltage range and a wide load range, and can improve the efficiency and the reliability of the active clamping forward converter, the double closed-loop digital control enables the active clamping forward converter to be flexibly and simply controlled and has quick dynamic response.
Drawings
FIG. 1 is a flow chart of the present invention;
fig. 2 is a specific circuit schematic diagram of the active clamp forward converter of the present invention;
FIG. 3 is a specific circuit diagram of the voltage sampling circuit of the present invention (1);
FIG. 4 is a specific circuit diagram of the voltage sampling circuit of the present invention (2);
FIG. 5 is a voltage loop control block diagram of the present invention;
FIG. 6 is a schematic diagram of a primary current waveform of the present invention;
fig. 7 is a specific circuit schematic diagram (1) of the primary side current sampling circuit of the present invention;
fig. 8 is a specific circuit diagram of the primary side current sampling circuit of the present invention (2);
FIG. 9 is a schematic diagram of the control method of the present invention.
[ description of reference ]
1-a power supply; 2-a clamping capacitor; 3-main switching tube; 4-resonant inductance; 5-excitation inductance; 6-a transformer; 7-auxiliary switching tube; 8-a first synchronous rectification switching tube; 9-a second synchronous rectification switching tube; 10-a filter inductance; 11-a filter capacitance; 12-output resistance; 13-DSP; 14-a voltage sampling circuit; 15-a primary side current sampling circuit; 16-a first resistance; 17-a second resistance; 18-a third resistance; 19-a fourth resistance; 20-a first capacitance; 21-a second capacitance; 22-a third capacitance; 23-differential isolation voltage sampling chip; 24-a fourth capacitance; 25-a fifth capacitance; 26-fifth resistance; 27-a sixth resistance; 28-a sixth capacitance; 29-seventh resistance; 30-eighth resistance; 31-a first isolation amplifier; 32-a seventh capacitance; 33-ninth resistance; 34-an eighth capacitance; 35-tenth resistance; 36-eleventh resistance; 37-a first voltage follower; 38-twelfth resistance; 39-ninth capacitance; 40-a current transformer; 41-a zener diode; 42-a first diode; 43-a second diode; 44-thirteenth resistance; 45-fourteenth resistance; 46-a fifteenth resistance; 47-a second isolation amplifier; 48-tenth capacitance; 49-sixteenth resistance; 50-eleventh capacitance; 51-seventeenth resistance; 52-eighteenth resistance; 53-a second voltage follower; 54-nineteenth resistance; 55-twelfth capacitance; 56-voltage sampling, operational amplification and conditioning circuit; 57-current sampling operational amplifier conditioning circuit.
Detailed Description
In order to make the technical problems, technical solutions and advantages of the present invention clearer, the following detailed description is made with reference to the accompanying drawings and specific embodiments.
The invention provides a primary side current sampling double closed-loop digital control method of an active clamping forward converter, aiming at the problems of low efficiency, complex and fussy control and slow dynamic response of the system of the existing converter.
As shown in fig. 1 to 9, an embodiment of the present invention provides an active-clamp forward converter including: the power supply comprises a power supply 1, wherein the positive end of the power supply 1 is electrically connected with the first end of a primary side current sampling circuit 15, the negative end of the power supply 1 is electrically connected with the second end of the primary side current sampling circuit 15, the third end of the primary side current sampling circuit 15 is electrically connected with the first end of a current sampling operational amplifier conditioning circuit 57, and the fourth end of the primary side current sampling circuit 15 is electrically connected with the second end of the current sampling operational amplifier conditioning circuit 57; a first end of the clamping capacitor 2 is electrically connected with a positive electrode end of the power supply 1; a main switching tube 3, wherein the drain end of the main switching tube 3 is electrically connected with the second end of the clamping capacitor 2; a resonant inductor 4, wherein a first end of the resonant inductor 4 is electrically connected with a first end of the clamping capacitor 2; the first end of the excitation inductor 5 is electrically connected with the second end of the resonance inductor 4, and the second end of the excitation inductor 5 is electrically connected with the source end of the main switching tube 3; a first end of a primary side of the transformer 6 is electrically connected with a first end of the excitation inductor, and a second end of the primary side of the transformer 6 is electrically connected with a second end of the excitation inductor; an auxiliary switching tube 7, a drain terminal of the auxiliary switching tube 7 is electrically connected with a second terminal of the excitation inductor 5, and a source terminal of the auxiliary switching tube 7 is electrically connected with a negative terminal of the power supply 1; the synchronous rectification circuit comprises a first synchronous rectification switching tube 8 and a second synchronous rectification switching tube 9, wherein the drain end of the first synchronous rectification switching tube 8 is electrically connected with the first end of the secondary side of the transformer 6, the drain end of the second synchronous rectification switching tube 9 is electrically connected with the second end of the secondary side of the transformer 6, and the source end of the second synchronous rectification switching tube 9 is electrically connected with the source end of the first synchronous rectification switching tube 8; the output filter circuit comprises a filter inductor 10 and a filter capacitor 11, wherein a first end of the filter inductor 10 is electrically connected with a drain end of the first synchronous rectification switch tube 8, a first end of the filter capacitor 11 is electrically connected with a second end of the filter inductor 10, and a second end of the filter capacitor 11 is electrically connected with a source end of the first synchronous rectification switch tube 8; the first end of the output resistor 12 is respectively electrically connected with the first end of the filter capacitor 11 and the first end of the voltage sampling circuit 14, the second end of the voltage sampling circuit 14 is electrically connected with the first end of the voltage sampling operational amplifier conditioning circuit 56, the third end of the voltage sampling circuit 14 is electrically connected with the second end of the voltage sampling operational amplifier conditioning circuit 56, and the second end of the output resistor 12 is electrically connected with the second end of the filter capacitor 11.
Wherein, the voltage sampling circuit 14 includes: a first resistor 16, wherein a first end of the first resistor 16 is electrically connected with a first end of the output resistor 12; a second resistor 17, a first end of the second resistor 17 being electrically connected to a second end of the first resistor 16, and a second end of the second resistor 17 being electrically connected to a ground terminal; a third resistor 18, a first end of the third resistor 18 being electrically connected to a second end of the first resistor 16; a fourth resistor 19, a first end of the fourth resistor 19 being electrically connected to a second end of the second resistor 17; a first capacitor 20, a first terminal of the first capacitor 20 is electrically connected to the second terminal of the third resistor 18, and a second terminal of the first capacitor 20 is electrically connected to the second terminal of the fourth resistor 19; a second capacitor 21, wherein a first end of the second capacitor 21 is electrically connected to the VDD1 end of the differential isolation voltage sampling chip 23, and a second end of the second capacitor 21 is electrically connected to a ground end; a third capacitor 22, wherein a first terminal of the third capacitor 22 is electrically connected to a first terminal of the second capacitor 21, and a second terminal of the third capacitor 22 is electrically connected to a second terminal of the second capacitor 21; a differential isolation voltage sampling chip 23, wherein a VINP end of the differential isolation voltage sampling chip 23 is electrically connected to a first end of the first capacitor 20, a VINN end of the differential isolation voltage sampling chip 23 is electrically connected to a second end of the first capacitor 20, a GND1 end of the differential isolation voltage sampling chip 23 is electrically connected to a ground end, and a GND2 end of the differential isolation voltage sampling chip 23 is electrically connected to the ground end; a fourth capacitor 24, a first end of the fourth capacitor 24 is electrically connected to the VDD2 end of the differential isolation voltage sampling chip 23, and a second end of the fourth capacitor 24 is electrically connected to a ground end; a fifth capacitor 25, wherein a first end of the fifth capacitor 25 is electrically connected to a first end of the fourth capacitor 24, and a second end of the fifth capacitor 25 is electrically connected to a second end of the fourth capacitor 24; a fifth resistor 26, wherein a first end of the fifth resistor 26 is electrically connected to the VOUTP end of the differential isolation voltage sampling chip 23; a sixth resistor 27, wherein a first end of the sixth resistor 27 is electrically connected to the VOUTN end of the differential isolation voltage sampling chip 23; a sixth capacitor 28, a first terminal of the sixth capacitor 28 is electrically connected to the second terminal of the fifth resistor 26, and a second terminal of the sixth capacitor 28 is electrically connected to the second terminal of the sixth resistor 27.
The voltage sampling op-amp conditioning circuit 56 comprises: a seventh resistor 29, wherein a first end of the seventh resistor 29 is electrically connected to a first end of the sixth capacitor 28; an eighth resistor 30, a first end of the eighth resistor 30 being electrically connected to a second end of the sixth capacitor 28; a first isolation amplifier 31, a first input terminal of the first isolation amplifier 31 being electrically connected to the second terminal of the seventh resistor 29, and a second input terminal of the first isolation amplifier 31 being electrically connected to the second terminal of the eighth resistor 30; a seventh capacitor 32, wherein a first end of the seventh capacitor 32 is electrically connected to a second end of the eighth resistor 30, and a second end of the seventh capacitor 32 is electrically connected to a ground terminal; a ninth resistor 33, a first end of the ninth resistor 33 is electrically connected to the second input terminal of the first isolation amplifier 31, and a second end of the ninth resistor 33 is electrically connected to the second end of the seventh capacitor 32; an eighth capacitor 34, wherein a first terminal of the eighth capacitor 34 is electrically connected to the first input terminal of the first isolation amplifier 31, and a second terminal of the eighth capacitor 34 is electrically connected to the output terminal of the first isolation amplifier 31; a tenth resistor 35, a first terminal of the tenth resistor 35 is electrically connected to the first terminal of the eighth capacitor 34, and a second terminal of the tenth resistor 35 is electrically connected to the second terminal of the eighth capacitor 34; an eleventh resistor 36, wherein a first end of the eleventh resistor 36 is electrically connected to the output end of the first isolation amplifier 31; a first voltage follower 37, a first input terminal of the first voltage follower 37 being electrically connected to an output terminal of the first voltage follower 37, a second input terminal of the first voltage follower 37 being electrically connected to a second terminal of the eleventh resistor 36; a twelfth resistor 38, wherein a first end of the twelfth resistor 38 is electrically connected to the output end of the first voltage follower 37; and a ninth capacitor 39, wherein a first end of the ninth capacitor 39 is electrically connected to the second end of the twelfth resistor 38, and a second end of the ninth capacitor 39 is electrically connected to the ground terminal.
The primary side current sampling circuit 15 includes: a first end of a primary side of the current transformer 40 is electrically connected with a positive terminal of the power supply 1, and a second end of the primary side of the current transformer 40 is electrically connected with a negative terminal of the power supply 1; a zener diode 41, wherein a cathode end of the zener diode 41 is electrically connected with a first end of the secondary side of the current transformer 40; a first diode 42, wherein the positive end of the first diode 42 is electrically connected with the positive end of the zener diode 41, and the negative end of the first diode 42 is electrically connected with the second end of the secondary side of the current transformer 40; a second diode 43, a positive terminal of the second diode 43 being electrically connected to a negative terminal of the first diode 42; a thirteenth resistor 44, wherein a first end of the thirteenth resistor 44 is electrically connected to the negative terminal of the zener diode 41, and a second end of the thirteenth resistor 44 is electrically connected to the negative terminal of the second diode 43.
The current sampling op-amp conditioning circuit 57 includes: a fourteenth resistor 45, a first end of the fourteenth resistor 45 being electrically connected to a first end of the thirteenth resistor 44; a fifteenth resistor 46, a first end of the fifteenth resistor 46 being electrically connected to a second end of the thirteenth resistor 44; a second isolation amplifier 47, a first input terminal of the second isolation amplifier 47 being electrically connected to a second terminal of the fourteenth resistor 45, a second input terminal of the second isolation amplifier 47 being electrically connected to a second terminal of the fifteenth resistor 46; a tenth capacitor 48, wherein a first terminal of the tenth capacitor 48 is electrically connected to the second terminal of the fifteenth resistor 46, and a second terminal of the tenth capacitor 48 is electrically connected to the ground terminal; a sixteenth resistor 49, wherein a first terminal of the sixteenth resistor 49 is electrically connected to the second input terminal of the second isolation amplifier 47, and a second terminal of the sixteenth resistor 49 is electrically connected to the second terminal of the tenth capacitor 48; an eleventh capacitor 50, wherein a first terminal of the eleventh capacitor 50 is electrically connected to the first input terminal of the second isolation amplifier 47, and a second terminal of the eleventh capacitor 50 is electrically connected to the output terminal of the second isolation amplifier 47; a seventeenth resistor 51, a first end of the seventeenth resistor 51 is electrically connected to the first end of the eleventh capacitor 50, and a second end of the seventeenth resistor 51 is electrically connected to the second end of the eleventh capacitor 50; an eighteenth resistor 52, a first end of the eighteenth resistor 52 being electrically connected to the output end of the second isolation amplifier 47; a second voltage follower 53, a first input terminal of the second voltage follower 53 being electrically connected to an output terminal of the second voltage follower 53, a second input terminal of the second voltage follower 53 being electrically connected to a second terminal of the eighteenth resistor 52; a nineteenth resistor 54, wherein a first end of the nineteenth resistor 54 is electrically connected to the output end of the second voltage follower 53; a twelfth capacitor 55, wherein a first end of the twelfth capacitor 55 is electrically connected to the second end of the nineteenth resistor 54, and a second end of the twelfth capacitor 55 is electrically connected to the ground.
Wherein, the first terminal of the ninth capacitor 39 is electrically connected to the first terminal of the DSP13, the first terminal of the twelfth capacitor 55 is electrically connected to the second terminal of the DSP13, the third terminal of the DSP13 is electrically connected to the gate terminal of the main switch tube 3, and the fourth terminal of the DSP13 is electrically connected to the gate terminal of the auxiliary switch tube 7; the main switch tube 3, the auxiliary switch tube 7, the first synchronous rectification switch tube 8 and the second synchronous rectification switch tube 9 all include parasitic junction capacitors of anti-parallel body diodes and drain source electrodes.
The embodiment of the invention also provides a primary side current sampling double closed-loop digital control method of the active clamping forward converter, which comprises the following steps: step 1, sampling the voltage at two ends of an output load through a voltage sampling circuit 14, processing the sampled voltage value through a voltage sampling operational amplifier conditioning circuit 56, inputting the processed voltage value into a DSP13, and outputting a reference value of a current loop in a DSP13 through a voltage loop controller; step 2, sampling the primary current of the transformer 6 through a primary current sampling circuit 15, conditioning the sampled primary current value through a current sampling operational amplifier processing circuit 57, inputting the conditioned primary current value into a DSP13, and outputting a duty ratio through a current loop controller in a DSP 13; and step 3, comparing the duty ratio with the carrier in the DSP13 to generate a PWM signal, and controlling the main switching tube 3 and the auxiliary switching tube 7 through the PWM signal.
In the primary side current sampling double closed-loop digital control method of the active clamp forward converter according to the above embodiment of the present invention, in a light load operation mode of the active clamp forward converter, the main switching tube 3 is turned on to perform power transmission, the current in the filter inductor 10 is increased, after the main switching tube 3 is turned off, the main switching tube junction capacitor resonates with the excitation inductor 5 and the resonant inductor 4, the current in the filter inductor 10 continues to rise, after the voltage of the main switching tube junction capacitor rises to an input voltage level, the first synchronous rectification switching tube 8 and the second synchronous rectification switching tube 9 on the secondary side of the transformer 6 are commutated, the body diode of the first synchronous rectification switching tube 8 is turned on, the current in the filter inductor 10 starts to decrease, the first synchronous rectification switching tube 8 is driven, and the first synchronous rectification switching tube 8 realizes zero voltage conduction, when the voltage of the main switch tube junction capacitor rises to the level of the sum of the input voltage and the voltage of the clamping capacitor 2, the body diode of the auxiliary switch tube 7 is conducted, the zero voltage conduction of the auxiliary switch tube 7 is realized, reverse voltage is applied to two ends of the transformer 6 by the clamping capacitor 2, when leakage inductance current is reduced to be equal to excitation current due to the reverse voltage, the current conversion of the first synchronous rectification switch tube 8 and the second synchronous rectification switch tube 9 on the secondary side of the transformer 6 is finished, the excitation current starts to reverse after being reduced to zero, the reverse excitation current enables the main switch tube junction capacitor to start discharging, the main switch tube junction capacitor resonates with the resonant inductor 4, the voltage of the main switch tube junction capacitor is reduced to zero, the body diode of the main switch tube 3 starts to conduct follow current, the main switch tube 3 realizes the zero voltage conduction, and the time for reducing the current in the filter inductor 10 to zero is calculated through the DSP13, when the current in the filter inductor 10 decreases to zero, the drive of the first synchronous rectification switch tube 8 is turned off, and the current reversal is prevented. The problem of low efficiency of the converter in a light-load operation mode is solved through the operation mode, so that soft switching in a full-load range can be realized, soft switching of each switching tube in the active clamping forward converter is realized through combination of the active clamping forward converter and a synchronous rectification technology, and the efficiency of the active clamping forward converter is improved.
Wherein, the step 1 specifically comprises:
adopt digital control to constitute two closed loop control system, two closed loop control system use the voltage ring as the outer loop, the current ring is the inner loop, the voltage ring uses voltage sampling circuit 14 to sample the output voltage of active clamp forward converter as the feedback of voltage ring, divide voltage through first resistance 16 and second resistance 17, sample output voltage, adopt differential isolation voltage sampling chip 23, keep apart active clamp forward converter and DSP13, differential isolation voltage sampling chip 23 output differential signal is through voltage sampling fortune amplifier circuit 56, produce and to input the signal that carries out processing to DSP13, the ratio of seventh resistance 29 and tenth resistance 35 is:
Figure BDA0002545580770000141
wherein R is1Represents a seventh resistance 29, Rf1Represents a tenth resistance 35, GisoRepresents the amplification factor of the first isolation amplifier 31;
the resistance ratio of the seventh resistor 29 to the tenth resistor 35 is designed to be 0.5, the output signal in the voltage sampling circuit 14 is half of the input signal, the sampled signal is processed to be less than or equal to 3.3V, and the voltage V is outputOAfter being sampled by the voltage sampling circuit 14, the signals are input into the DSP13 and a reference signal V set in a programrefThe difference value of (d) is used as an error, PI control is realized through program operation, the final sampling value which is output from the active clamp forward converter to the DSP13 is obtained, and the parameter calculation is as follows:
Figure BDA0002545580770000151
wherein u represents the output voltage of the active clamp forward circuit, GrDenotes the coefficient of partial pressure, GisoDenotes the amplification factor of the first isolation amplifier 31, M denotes the amplification factor of the operational circuit, u1Representing the final sampled value of the main circuit output voltage.
In the method for digitally controlling the double closed-loop voltage loop for sampling the primary current of the active clamp forward converter according to the embodiment of the present invention, the method for digitally controlling the double closed-loop voltage loop includes: in order to make the active clamping forward converter simple and convenient and high in controllability, a double closed-loop control system is formed by adopting digital control, the double closed-loop control system takes voltage feedback as an outer loop, and the average value of inductive current feedback as an inner loop. Sampling the output voltage of the active clamp forward converter as a voltage loop using the voltage sampling circuit 14The feedback of (3) is obtained by dividing the voltage by the first resistor 16 and the second resistor 17, sampling the output voltage, selecting the differential isolation voltage sampling chip 23, isolating the active clamp forward converter from the DSP13 circuit, outputting a differential signal by the differential isolation voltage sampling chip 23, passing through the voltage sampling operational amplifier conditioning circuit 56, and finally generating a signal which can be input into the DSP13 for processing, wherein the output signal in the circuit is half of the input signal, so that the sampling signal is processed to be less than or equal to 3.3V, and outputting the voltage VOAfter being sampled by the voltage sampling circuit 14, the voltage enters the DSP13 and a reference signal V set in a programrefThe difference value of (d) is used as an error, and PI control is realized through program operation.
Wherein, the step 2 specifically comprises: the output of a voltage ring is used as a reference value of a current ring, a primary side current in an active clamping forward converter is used as feedback of the current ring, a current transformer 40 is used for sampling the primary side current, a sampling signal can be isolated from the ground, high precision is achieved, the primary side current value is sampled by the current transformer, the current signal is converted into a voltage signal through a primary side current sampling circuit 15, the primary side current in the active clamping forward circuit is superposition of the current of an exciting inductor 5 and the current of an input side under each working mode, when the primary side current is increased in the forward direction, the primary side current sampling circuit 15 is sampled by the current transformer 40, a second diode 43 is conducted, the current signal is converted into a voltage signal, and the voltage signal enters a current sampling operational amplifier conditioning circuit 57; when the primary current is zero, the exciting current of the current transformer 40 is still positive, the zener diode 41 is broken down, the current transformer 40 starts demagnetization, the primary current reacts on the thirteenth resistor 44 and is converted into a voltage signal, the voltage signal is processed by the current sampling, operational and conditioning circuit 57 to output a signal I, the signal I is input into the DSP13 for a/D conversion, the voltage signal sampled in the second isolation amplifier 47 is input into the DSP13 for a/D conversion according to n times of the input signal I, and the ratio of the seventeenth resistor 51 to the fourteenth resistor 45 is:
Figure BDA0002545580770000161
wherein R isf2Denotes a seventeenth resistor 51, R5Represents a fourteenth resistor 45, n represents the magnification;
when the main switching tube 3 is switched on, the current rises, when the main switching tube 3 is switched off, the current is zero, the current corresponding to the middle moment when the main switching tube 3 is switched on is approximate to the average current of the primary current, the current corresponding to the moment with the half duty ratio is sampled by using the DSP13, the current average value of five periods is taken, and the current average value is used as feedback to be input into the DSP 13.
The step 3 specifically comprises the steps that a duty ratio signal output by a current loop is compared with a carrier generated by the arrangement of a PWM module in a DSP to output a PWM signal, and the PWM signal is input into a driving chip to drive a main switching tube 3 and an auxiliary switching tube 7.
In the method for digitally controlling a primary side current sampling double closed-loop current loop of an active clamp forward converter according to the embodiment of the present invention, the method for digitally controlling the double closed-loop current loop includes: the output of the voltage loop is used as a reference value of the current loop, the magnitude of the inductive current is determined, and the magnitude of the primary current is further determined, the speed of the current loop is usually set to be much faster than that of the voltage loop, the magnitude of the primary current is changed by the voltage loop according to the conditions of the load and the input voltage, and the current loop responds and adjusts. The current loop takes the voltage loop output as a reference value, the current in the detection circuit is used as the feedback of the current loop, the current feedback can sample the direct current of the secondary side of the transformer 6 of the active clamp forward converter and can also sample the primary side current of the active clamp forward converter, the primary side current is sampled due to the fact that the sampling precision of a direct current sampling method is low or large loss and cost are generated, the primary side current of the active clamp forward converter is sampled by using the current transformer 40, the isolation of a sampling signal to the ground can be achieved, high precision can be achieved, the primary side current in the active clamp forward converter is the superposition of the exciting inductance 5 current and the input side current in each working mode, the current rises when the main switching tube 3 is conducted, and the current is zero when the main switching tube 3 is turned off. The current corresponding to the middle moment when the main switching tube is conducted is approximate to the average current of the primary side current. Therefore, the current at the moment corresponding to the half duty ratio is sampled by using the flexibility of programming of the DSP13, sampling is performed once in each period, an average value of five periods is taken, a primary side current value is sampled by the current transformer, a current signal is converted into a voltage signal by the primary side current sampling circuit 15, when the primary side current increases in the forward direction, the primary side current sampling circuit 15 is sampled by the current transformer 40, at this time, the second diode 43 is turned on, the current signal is converted into a differential voltage signal, and the differential voltage signal enters the current sampling, operational, amplification and conditioning circuit 57; when the primary current is zero, the exciting current of the current transformer 40 is still positive, the zener diode 41 is broken down, the current transformer 40 starts to demagnetize, the primary current reacts on the resistor, and is converted into a voltage signal, and the voltage signal is transmitted to the current sampling operational amplifier conditioning circuit 57 for processing. Since the analog signal that the ADC inside the DSP13 can process is 3.3V or less, signal conversion needs to be performed by the current sampling op-amp conditioning circuit 57, a differential signal passes through one of the second isolation amplifier 47 and the first voltage follower 37 to output a signal I, and the signal I is input to the DSP13 for a/D conversion. The signal sampled in the second isolation amplifier 47 is divided into 1: the ratio of 1 is input into the DSP13 for A/D conversion, an analog signal is converted into a digital signal inside the DSP13, and a sampling value is stored in an ADC result register. The digital value is used as a feedback value, a current loop is realized through programming, the DSP13 processes and calculates to generate a PWM signal, and the PWM signal is input into a driving chip to drive the main switching tube 3 and the auxiliary switching tube 7.
In order to control the output of the active clamp forward converter to be direct current, the primary side current sampling double closed-loop digital control method of the active clamp forward converter according to the above embodiment of the present invention first samples the output voltage V of the active clamp forward converter through the voltage sampling circuit 14OWill output a voltage VOA reference signal V input to the DSP13 and set in a programrefComparing and outputting an error signal, using the error signal as a reference value of a current loop, and passing through the primary side powerThe current sampling circuit 15 samples the current of the primary side of the active clamp forward converter, compares the reference value of the current loop with the sampled current of the primary side to output an error signal, inputs the error signal into the DSP13, the DSP13 generates a PWM control signal, and inputs the PWM signal into the main switching tube and the auxiliary switching tube respectively, so as to control the actions of the main switching tube and the auxiliary switching tube, and the feedback is adjusted according to the error all the time, so that the output of the active clamp forward converter can be ensured to be direct current.
The primary side current sampling double closed-loop digital control method of the active clamping forward converter integrates the advantages of current mode control and digital control, is simple and convenient to implement through pure digital, improves the controllability of a system, utilizes the advantages of circuit topology through PWM control of the main switching tube 3 and the auxiliary switching tube 7, further enlarges the input voltage range and the load range of the active clamping forward converter, effectively improves the efficiency and the power density of the active clamping forward converter, avoids the problems of cost and loss caused by direct current sampling of the secondary side of the transformer 6 through a primary side current sampling mode, calculates the primary side current sampling value through the DSP13, takes the intermediate value of a plurality of times of sampling currents as an average value, avoids the problems of instability and error of current peak value sampling, and improves the control precision of the active clamping forward converter, the control method has the advantages that the control flexibility of the circuit is improved, the dynamic response of the circuit is improved and the control is simple through a digital control double closed loop control mode, a current loop is formed by sampling the value of the primary side current duty ratio at the middle moment, the defect of digital control in the aspect of current sampling precision is overcome, the control precision is improved, the double closed loop digital control has high sensitivity, flexibility and programmability, the parameter design of a control loop is facilitated, and the control method is simple, flexible and extensible.
The primary side current sampling double closed-loop digital control method of the active clamping forward converter in the above embodiment of the invention adopts double closed-loop digital control, samples the output voltage of the active clamping forward converter through the voltage sampling circuit 14, feeds back the output voltage to the DSP13, outputs a current reference through a voltage loop controller, samples the primary side current of the transformer 6 through the primary side current sampling circuit 15, feeds back the primary side current average value obtained in the DSP13 as current feedback, compares the current feedback with the current reference, outputs as a duty ratio through a controller in the DSP13, achieves the purpose of double closed-loop digital control, realizes the soft switching of the active clamping forward converter in a wide voltage range and a wide load range, can improve the efficiency and reliability of the active clamping forward converter, and enables the active clamping forward converter to be flexibly and simply controlled through the double closed-loop digital control, the dynamic response is fast, and the efficiency is higher.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (10)

1. An active-clamp forward converter, comprising:
the power supply comprises a power supply, a first end of a primary side current sampling circuit is electrically connected with a positive end of the power supply, a second end of the primary side current sampling circuit is electrically connected with a negative end of the power supply, a third end of the primary side current sampling circuit is electrically connected with a first end of a current sampling operational amplifier conditioning circuit, and a fourth end of the primary side current sampling circuit is electrically connected with a second end of the current sampling operational amplifier conditioning circuit;
the first end of the clamping capacitor is electrically connected with the positive electrode end of the power supply;
the drain end of the main switching tube is electrically connected with the second end of the clamping capacitor;
a first end of the resonant inductor is electrically connected with a first end of the clamping capacitor;
the first end of the excitation inductor is electrically connected with the second end of the resonance inductor, and the second end of the excitation inductor is electrically connected with the source end of the main switching tube;
the first end of the primary side of the transformer is electrically connected with the first end of the excitation inductor, and the second end of the primary side of the transformer is electrically connected with the second end of the excitation inductor;
the drain end of the auxiliary switch tube is electrically connected with the second end of the excitation inductor, and the source end of the auxiliary switch tube is electrically connected with the negative end of the power supply;
the synchronous rectification circuit comprises a first synchronous rectification switching tube and a second synchronous rectification switching tube, wherein the drain end of the first synchronous rectification switching tube is electrically connected with the first end of the secondary side of the transformer, the drain end of the second synchronous rectification switching tube is electrically connected with the second end of the secondary side of the transformer, and the source end of the second synchronous rectification switching tube is electrically connected with the source end of the first synchronous rectification switching tube;
the output filter circuit comprises a filter inductor and a filter capacitor, wherein the first end of the filter inductor is electrically connected with the drain end of the first synchronous rectification switch tube, the first end of the filter capacitor is electrically connected with the second end of the filter inductor, and the second end of the filter capacitor is electrically connected with the source end of the first synchronous rectification switch tube;
the first end of the output resistor is respectively electrically connected with the first end of the filter capacitor and the first end of the voltage sampling circuit, the second end of the voltage sampling circuit is electrically connected with the first end of the voltage sampling operational amplifier conditioning circuit, the third end of the voltage sampling circuit is electrically connected with the second end of the voltage sampling operational amplifier conditioning circuit, and the second end of the output resistor is electrically connected with the second end of the filter capacitor.
2. The active-clamp forward converter of claim 1, wherein the voltage sampling circuit comprises:
a first resistor, a first end of the first resistor being electrically connected to a first end of the output resistor;
a first end of the second resistor is electrically connected with a second end of the first resistor, and a second end of the second resistor is electrically connected with a ground terminal;
a first end of the third resistor is electrically connected with the second end of the first resistor;
a first end of the fourth resistor is electrically connected with the second end of the second resistor;
a first end of the first capacitor is electrically connected with a second end of the third resistor, and a second end of the first capacitor is electrically connected with a second end of the fourth resistor;
a first end of the second capacitor is electrically connected with a VDD1 end of the differential isolation voltage sampling chip, and a second end of the second capacitor is electrically connected with a ground end;
a first end of the third capacitor is electrically connected with a first end of the second capacitor, and a second end of the third capacitor is electrically connected with a second end of the second capacitor;
the VINP end of the differential isolation voltage sampling chip is electrically connected with the first end of the first capacitor, the VINN end of the differential isolation voltage sampling chip is electrically connected with the second end of the first capacitor, the GND1 end of the differential isolation voltage sampling chip is electrically connected with a ground end, and the GND2 end of the differential isolation voltage sampling chip is electrically connected with the ground end;
a first end of the fourth capacitor is electrically connected with the VDD2 end of the differential isolation voltage sampling chip, and a second end of the fourth capacitor is electrically connected with a ground end;
a first end of the fifth capacitor is electrically connected with a first end of the fourth capacitor, and a second end of the fifth capacitor is electrically connected with a second end of the fourth capacitor;
a first end of the fifth resistor is electrically connected with the VOUTP end of the differential isolation voltage sampling chip;
a first end of the sixth resistor is electrically connected with the VOUTN end of the differential isolation voltage sampling chip;
and a first end of the sixth capacitor is electrically connected with the second end of the fifth resistor, and a second end of the sixth capacitor is electrically connected with the second end of the sixth resistor.
3. The active-clamp forward converter of claim 2 wherein the voltage sampling op-amp conditioning circuit comprises:
a first end of the seventh resistor is electrically connected with the first end of the sixth capacitor;
a first end of the eighth resistor is electrically connected with the second end of the sixth capacitor;
a first input end of the first isolation amplifier is electrically connected with the second end of the seventh resistor, and a second input end of the first isolation amplifier is electrically connected with the second end of the eighth resistor;
a first end of the seventh capacitor is electrically connected with the second end of the eighth resistor, and a second end of the seventh capacitor is electrically connected with a ground end;
a first end of the ninth resistor is electrically connected with the second input end of the first isolation amplifier, and a second end of the ninth resistor is electrically connected with the second end of the seventh capacitor;
a first end of the eighth capacitor is electrically connected with the first input end of the first isolation amplifier, and a second end of the eighth capacitor is electrically connected with the output end of the first isolation amplifier;
a tenth resistor, a first end of the tenth resistor being electrically connected to the first end of the eighth capacitor, and a second end of the tenth resistor being electrically connected to the second end of the eighth capacitor;
an eleventh resistor, wherein a first end of the eleventh resistor is electrically connected to the output end of the first isolation amplifier;
a first input end of the first voltage follower is electrically connected with an output end of the first voltage follower, and a second input end of the first voltage follower is electrically connected with a second end of the eleventh resistor;
a twelfth resistor, wherein a first end of the twelfth resistor is electrically connected with an output end of the first voltage follower;
and a first end of the ninth capacitor is electrically connected with the second end of the twelfth resistor, and a second end of the ninth capacitor is electrically connected with a ground terminal.
4. The active-clamp forward converter of claim 3, wherein the primary current sampling circuit comprises:
the first end of the primary side of the current transformer is electrically connected with the positive end of the power supply, and the second end of the primary side of the current transformer is electrically connected with the negative end of the power supply;
the negative end of the voltage stabilizing diode is electrically connected with the first end of the secondary side of the current transformer;
the positive end of the first diode is electrically connected with the positive end of the voltage stabilizing diode, and the negative end of the first diode is electrically connected with the second end of the secondary side of the current transformer;
the anode end of the second diode is electrically connected with the cathode end of the first diode;
and a first end of the thirteenth resistor is electrically connected with the negative end of the voltage stabilizing diode, and a second end of the thirteenth resistor is electrically connected with the negative end of the second diode.
5. The active-clamp forward converter of claim 4 wherein the current sampling op-amp conditioning circuit comprises:
a fourteenth resistor, a first end of the fourteenth resistor being electrically connected to a first end of the thirteenth resistor;
a fifteenth resistor, a first end of the fifteenth resistor being electrically connected to a second end of the thirteenth resistor;
a first input end of the second isolation amplifier is electrically connected with the second end of the fourteenth resistor, and a second input end of the second isolation amplifier is electrically connected with the second end of the fifteenth resistor;
a tenth capacitor, wherein a first end of the tenth capacitor is electrically connected to a second end of the fifteenth resistor, and a second end of the tenth capacitor is electrically connected to a ground terminal;
a sixteenth resistor, a first end of the sixteenth resistor being electrically connected to the second input terminal of the second isolation amplifier, and a second end of the sixteenth resistor being electrically connected to the second end of the tenth capacitor;
a first end of the eleventh capacitor is electrically connected with the first input end of the second isolation amplifier, and a second end of the eleventh capacitor is electrically connected with the output end of the second isolation amplifier;
a seventeenth resistor, a first end of the seventeenth resistor being electrically connected to the first end of the eleventh capacitor, and a second end of the seventeenth resistor being electrically connected to the second end of the eleventh capacitor;
an eighteenth resistor, a first end of which is electrically connected with the output end of the second isolation amplifier;
a first input end of the second voltage follower is electrically connected with an output end of the second voltage follower, and a second input end of the second voltage follower is electrically connected with a second end of the eighteenth resistor;
a nineteenth resistor, wherein a first end of the nineteenth resistor is electrically connected with an output end of the second voltage follower;
and a first end of the twelfth capacitor is electrically connected with the second end of the nineteenth resistor, and a second end of the twelfth capacitor is electrically connected with a ground terminal.
6. The active-clamp forward converter of claim 5, wherein a first terminal of the ninth capacitor is electrically connected to a first terminal of a DSP, a first terminal of the twelfth capacitor is electrically connected to a second terminal of the DSP, a third terminal of the DSP is electrically connected to a gate terminal of the main switching tube, and a fourth terminal of the DSP is electrically connected to a gate terminal of the auxiliary switching tube; the main switch tube, the auxiliary switch tube, the first synchronous rectification switch tube and the second synchronous rectification switch tube respectively comprise a body diode and a parasitic junction capacitor of a drain source electrode which are connected in an anti-parallel mode.
7. A primary side current sampling double closed-loop digital control method of an active clamp forward converter is characterized by comprising the following steps:
step 1, sampling voltages at two ends of an output load through a voltage sampling circuit, inputting the sampled voltage values into a DSP after the voltage values are processed by a voltage sampling operational amplifier conditioning circuit, and outputting reference values of a current loop after the voltage values pass through a voltage loop controller in the DSP;
step 2, sampling the primary current of the transformer through a primary current sampling circuit, conditioning the sampled primary current value through a current sampling operational amplifier processing circuit, inputting the conditioned primary current value into a DSP, and outputting a duty ratio after the DSP passes through a current loop controller;
and 3, comparing the duty ratio with the carrier in the DSP to generate a PWM signal, and controlling the main switching tube and the auxiliary switching tube through the PWM signal.
8. The active clamp converter and dual closed-loop digital control method of active clamp current sampling according to claim 7, wherein the dual closed-loop digital control method of active clamp forward converter of active clamp current sampling specifically comprises:
adopt digital control to constitute two closed-loop control system, two closed-loop control system use the voltage ring as the outer loop, the current ring is the inner ring, the voltage ring uses voltage sampling circuit to sample the output voltage of active clamp forward converter as the feedback of voltage ring, divide pressure through first resistance and second resistance, sampling output voltage, adopt difference isolation voltage sampling chip, keep apart active clamp forward converter and DSP, difference isolation voltage sampling chip output difference signal is through voltage sampling fortune put modulate circuit, produce the signal that can input to DSP and carry out the processing, the ratio of seventh resistance and tenth resistance is:
Figure FDA0002545580760000051
wherein R is1Denotes a seventh resistance, Rf1Denotes a tenth resistance, GisoRepresenting a first isolation amplifier amplification factor;
the resistance ratio of the seventh resistor to the tenth resistor is designed to be 0.5, the output signal in the voltage sampling circuit is half of the input signal, the sampling signal is processed to be less than or equal to 3.3V, and the voltage V is outputOAfter being sampled by the voltage sampling circuit, the signals are input into the DSP and a reference signal V set in a programrefThe difference value of (a) is used as an error, PI control is realized through program operation, a final sampling value entering a DSP is output from an active clamping forward converter, and the parameter calculation is as follows:
Figure FDA0002545580760000061
wherein u represents the output voltage of the active clamp forward circuit, GrDenotes the coefficient of partial pressure, GisoDenotes the first isolation amplifier amplification factor, M denotes the operational circuit amplification factor, u1Representing the final sampled value of the main circuit output voltage.
9. The method for digitally controlling the primary side current sampling double closed loops of the active-clamp forward converter according to claim 8, wherein the step 2 specifically comprises:
the output of a voltage ring is used as a reference value of a current loop, a primary side current in an active clamping forward converter is used as feedback of the current loop, a current transformer is used for sampling the primary side current, a sampling signal can be isolated to the ground, high precision is achieved, the primary side current value is sampled through the current transformer, the current signal is converted into a voltage signal through a primary side current sampling circuit, the primary side current in the active clamping forward circuit is superposition of current of an exciting inductor and input side current under each working mode, when the primary side current is increased in the forward direction, the primary side current sampling circuit is sampled through the current transformer, a second diode is conducted, the current signal is converted into a voltage signal, and the voltage signal enters a current sampling operational amplifier conditioning circuit; when the primary current is zero, the exciting current of the current transformer is still positive, the voltage stabilizing diode is broken down, the current transformer starts to demagnetize, the primary current reacts on the thirteenth resistor and is converted into a voltage signal, the voltage signal is processed by the current sampling operational amplifier conditioning circuit to output a signal I, the signal I is input into the DSP to be subjected to A/D conversion, the voltage signal sampled in the second isolation amplifier is input into the DSP according to n times of the input signal I to be subjected to A/D conversion, and the ratio of the seventeenth resistor to the fourteenth resistor is as follows:
Figure FDA0002545580760000062
wherein R isf2Denotes a seventeenth resistance, R5Represents a fourteenth resistance, n represents a magnification;
the current rises when the main switching tube is conducted, the current is zero when the main switching tube is turned off, the current corresponding to the middle moment when the main switching tube is conducted is approximate to the average current of the primary side current, the current corresponding to the moment corresponding to the half duty ratio is sampled by using the DSP, the sampling is performed once in each period, the current average value of five periods is taken, and the current average value is used as feedback to be input into the DSP.
10. The method for digitally controlling the primary side current sampling double closed loops of the active-clamp forward converter according to claim 9, wherein the step 3 specifically comprises:
the duty ratio signal output by the current loop is compared with a carrier generated by the setting of the PWM module in the DSP to output a PWM signal, and the PWM signal is input into a driving chip to drive the main switching tube and the auxiliary switching tube.
CN202010559541.3A 2020-06-18 2020-06-18 Primary side current sampling double closed-loop digital control method of active clamping forward converter Pending CN111682770A (en)

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