CN111669134B - Method, system, equipment and storage medium for controlling power of power amplifier under TDD system - Google Patents
Method, system, equipment and storage medium for controlling power of power amplifier under TDD system Download PDFInfo
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- CN111669134B CN111669134B CN202010491232.7A CN202010491232A CN111669134B CN 111669134 B CN111669134 B CN 111669134B CN 202010491232 A CN202010491232 A CN 202010491232A CN 111669134 B CN111669134 B CN 111669134B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W52/00—Power management, e.g. TPC [Transmission Power Control], power saving or power classes
- H04W52/04—TPC
- H04W52/52—TPC using AGC [Automatic Gain Control] circuits or amplifiers
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Abstract
The disclosure relates to a method, a system, equipment and a storage medium for controlling power of a power amplifier in a TDD system. The power amplifier power control method under the TDD system comprises the following steps: obtaining the output power of a power amplifier unit; when the output power of the power amplification unit is detected to meet the power correction condition, adjusting a reference signal for regulating and controlling the power of the power amplification unit to a target reference signal based on a target correction value in the current time slot; and controlling attenuation of the power amplifier unit according to the target reference signal. The embodiment of the disclosure can accurately and rapidly control the power amplifier power in the TDD mode.
Description
Technical Field
The disclosure relates to the technical field of mobile communication, and in particular relates to a method, a system, equipment and a storage medium for controlling power of a power amplifier in a TDD system.
Background
The power control is an indispensable function in the power amplifier unit, and mainly plays a role in protecting the power amplifier unit and avoiding unnecessary loss caused by burnout of the power amplifier unit due to overlarge output power. For the TDD system, the operation features that the transmitting frequency and the receiving frequency of the device are the same frequency, and the transmitting and receiving are defined in different time, which requires the transmitting and receiving signals to be switched by the rf switch. Therefore, how to perform accurate and rapid power control is a problem to be solved under the TDD system.
Disclosure of Invention
In order to solve the technical problems, the disclosure provides a method, a system, a device and a storage medium for controlling power of a power amplifier in a TDD system.
The disclosure provides a power amplifier power control method under a TDD system, comprising:
obtaining the output power of a power amplifier unit;
when the output power of the power amplification unit is detected to meet the power correction condition, adjusting a reference signal for regulating and controlling the power of the power amplification unit to a target reference signal based on a target correction value in the current time slot;
and controlling the power of the power amplifier unit according to the target reference signal.
Optionally, the target correction value is a difference value between the downlink power in the downlink normally open mode and the output power of the power amplifier unit in the TDD time slot.
Optionally, the power correction condition includes: and the output power of the power amplification unit exceeds a preset power threshold under the current time slot.
Optionally, before adjusting the reference signal for adjusting and controlling the power of the power amplifier unit to the target reference signal based on the target correction value in the current time slot, the method further includes:
and determining a target correction value under the current time slot based on the corresponding relation between the preset time slot and the correction value.
Optionally, the preset corresponding relation between the time slot and the correction value includes:
respectively counting the downlink power in a downlink normally-open mode and the output power of a power amplifier unit in a TDD time slot when signals of various time slots are counted;
calculating the difference value between the downlink power and the output power of the power amplifier unit when each time slot signal is calculated;
and establishing the corresponding relation between the plurality of time slots and the correction value according to the calculation result.
Optionally, the method further comprises:
pre-establishing and storing a power time slot correction corresponding table;
and recording the corresponding relation between the time slot and the corrected value in the power time slot correction corresponding table.
Optionally, adjusting the reference signal for regulating and controlling the power of the power amplifier unit to the target reference signal based on the target correction value in the current time slot includes:
determining a target attenuation value of the input power of the power amplifier unit based on the target voltage correction value in the current time slot;
and adjusting the reference signal to a target reference voltage corresponding to the target attenuation value according to the corresponding relation between the reference voltage and the attenuation value of the power amplifier control module.
Optionally, adjusting the reference signal to a target reference voltage corresponding to the target attenuation value includes:
the reference signal is adjusted to the target reference voltage via an operational amplification module.
The disclosure provides a power amplifier power control system under a TDD system, which is used for executing the power amplifier power control method under the TDD system, and comprises a main control module and a power amplifier control module;
the main control module is used for acquiring the output power of the power amplification unit, and when the output power of the power amplification unit is detected to meet the power correction condition, adjusting a reference signal for regulating and controlling the power of the power amplification unit to a target reference signal based on a target correction value in the current time slot, wherein the target correction value is a difference value between the downlink power in a downlink normally open mode and the output power of the power amplification unit in a TDD time slot;
the power amplifier control module is used for controlling the power of the power amplifier unit according to the target reference signal.
Optionally, the input end of the main control module is electrically connected with the output end of the power amplification unit, the output end of the main control module is electrically connected with the reference signal end of the power amplification control module, and the output end of the power amplification control module is electrically connected with the input end of the power amplification unit.
Optionally, the main control module includes an FPGA chip and a memory.
Optionally, the memory is configured with a power time slot correction corresponding table, and the power time slot correction corresponding table records the corresponding relation between the time slots and the correction values.
Optionally, the power amplifier control module comprises a radio frequency attenuation circuit, a standard reference voltage circuit and a control voltage input circuit;
the radio frequency attenuation circuit comprises a radio frequency input end, a radio frequency output end, a first reference voltage end and a second reference voltage end; the radio frequency output end is electrically connected with the input end of the power amplification unit, the first reference voltage end is electrically connected with the output end of the standard reference voltage circuit, and the second reference voltage end is electrically connected with the output end of the control voltage input circuit, wherein the input end of the control voltage input circuit is used as a reference signal end of the power amplification control module.
Optionally, the power amplifier further comprises an operational amplification module, the operational amplification module comprises a voltage amplification circuit and an emission follower circuit, the input end of the voltage amplification circuit is electrically connected with the output end of the main control module, the output end of the voltage amplification circuit is electrically connected with the input end of the emission follower circuit, and the output end of the emission follower circuit is electrically connected with the reference signal end of the power amplifier control module.
Optionally, the operational amplification module includes a first path of operational amplification circuit, a second path of operational amplification circuit, a third path of operational amplification circuit and a fourth path of operational amplification circuit, where the first path of operational amplification circuit is used as the voltage amplification circuit, the second path of operational amplification circuit is used as the emitter-follower circuit, and the third path of operational amplification circuit and the fourth path of operational amplification circuit are used as reserved circuits in FDD mode.
The present disclosure provides an electronic device including:
a processor;
a memory for storing the processor-executable instructions;
the processor is configured to read the executable instruction from the memory and execute the instruction to implement the power amplifier power control method in the TDD system provided by the present disclosure.
The present disclosure provides a computer-readable storage medium storing a computer program for executing the power amplifier power control method in the TDD system provided by the present disclosure.
Compared with the prior art, the technical scheme provided by the embodiment of the disclosure has the following advantages:
when the output power of the power amplification unit is confirmed to meet the power correction condition, the embodiment of the disclosure adjusts the reference signal for regulating and controlling the power of the power amplification unit to the target reference signal based on the target correction value in the current time slot, and directly controls the power of the power amplification unit according to the target reference signal, so that the output power of the power amplification unit does not meet the power correction condition, the rapid control of the power amplification unit is realized, and the power amplification unit is prevented from being burnt due to overlarge output power of the power amplification unit; in addition, the technical scheme provided by the embodiment of the disclosure does not need to set a fixed power control threshold, and can adjust the target reference signal according to the target correction value under different time slots, so that the difference of the power amplification power is accurately corrected, and the accuracy of power amplification power control is improved. Therefore, the embodiment of the disclosure realizes accurate and rapid control of the power amplifier power in a TDD system while protecting the power amplifier unit, and improves the reliability of the power amplifier unit.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure.
In order to more clearly illustrate the embodiments of the present disclosure or the solutions in the prior art, the drawings that are required for the description of the embodiments or the prior art will be briefly described below, and it will be obvious to those skilled in the art that other drawings can be obtained from these drawings without inventive effort.
Fig. 1 is a schematic flow chart of a power amplifier power control method in a TDD system according to an embodiment of the present disclosure;
fig. 2 is a flow chart of another method for controlling power of a power amplifier in a TDD system according to an embodiment of the present disclosure;
fig. 3 is a schematic diagram of a power slot correction table according to an embodiment of the disclosure;
fig. 4 is a block diagram of a power amplifier power control system in a TDD system according to an embodiment of the present disclosure;
fig. 5 is a block diagram of another power amplifier power control system in a TDD system according to an embodiment of the present disclosure;
fig. 6 is a circuit diagram of a power amplifier control module according to an embodiment of the disclosure;
fig. 7 is a circuit diagram of an operational amplifier module provided in an embodiment of the present disclosure;
fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the disclosure.
Detailed Description
In order that the above objects, features and advantages of the present disclosure may be more clearly understood, a further description of aspects of the present disclosure will be provided below. It should be noted that, without conflict, the embodiments of the present disclosure and features in the embodiments may be combined with each other.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure, but the present disclosure may be practiced otherwise than as described herein; it will be apparent that the embodiments in the specification are only some, but not all, embodiments of the disclosure.
In mobile communications, there are mainly two types of frequency division duplexing (Frequency Division Duplex, FDD) and time division duplexing (Time Division Duplex, TDD) for the current operation mode. For the FDD system, the power control method of the power amplifier unit is mature, and is mainly realized by adopting analog automatic power control (Automatic Level Control, ALC). The ALC circuit has the characteristics of high power control accuracy (0.2 dB) and quick response time (basically within us grade), and is widely applied to various communication equipment.
For the TDD system, the operating characteristics are that the transmitting frequency and the receiving frequency of the device are the same frequency, and the transmitting and receiving are defined in different time, which requires the transmitting and receiving signals to be switched by the radio frequency switch. For a TDD system in practical application, its transmission and reception are divided into different time periods, also called timeslots. For a complete signal of one frame, besides the protection time slot, other uplink time slots and downlink time slots are divided according to actual requirements. The TDD system is that the communication device operates in the continuous switching between the uplink and the downlink. Because of the existence of time slots, the uplink and the downlink are continuously switched, and the switching signal has a certain time delay and has a certain overshoot when switching. Although the power detection accuracy is still not high after the optimization algorithm (such as power signal zero-polishing processing), the error is basically 0.5-1dB, and the power detection error is larger under some time slot signals; meanwhile, the complexity of the algorithm is increased, and great manpower and material resources are paid for software part engineers, but the effect is very little.
In order to solve the above technical problems, the embodiments of the present disclosure provide the following technical solutions:
fig. 1 is a flow chart of a power amplifier power control method in a TDD system according to an embodiment of the present disclosure, where the method may be performed by a power amplifier power control system in the TDD system, where the system may be implemented by software and/or hardware, and may generally be integrated in an electronic device. As shown in fig. 1, the method includes:
step 110, obtaining the output power of the power amplifier unit.
Under the normal mode (namely, the TDD communication system adopts a time slot signal and the mode of continuously switching the uplink and the downlink), the output power of the power amplification unit is obtained.
In this embodiment, the power signal output by the power amplifying unit may be converted into a corresponding voltage signal by the power detector, and the output power of the power amplifying unit may be obtained based on the voltage signal.
And 120, when the output power of the power amplification unit is detected to meet the power correction condition, adjusting a reference signal for regulating and controlling the power of the power amplification unit to a target reference signal based on the target correction value in the current time slot.
The target correction value is a difference value between the downlink power in the downlink normally open mode and the output power of the power amplification unit in the TDD time slot (normal mode or uplink/downlink switching mode), and provides a basis for processing the relation between the reference signal and the power amplification power. The difference value may be a power difference value between the downlink power and the output power of the power amplifier unit, or may be a voltage difference value between voltages corresponding to the downlink power and the output power of the power amplifier unit.
For different time slot signals, the difference of the output power of the power amplification units is usually different, the target correction value is also different, and the obtained target reference signal is also different, so that the method and the device can adjust and obtain different target reference signals aiming at different time slot signals, thereby realizing the accurate control of different power amplification powers.
As an alternative of this embodiment, the plurality of time slots and the plurality of correction values have a one-to-one correspondence relationship, and the technical solution of this embodiment may preset the correspondence relationship between the time slots and the correction values, and when determining the current time slot signal type of the TDD communication system, that is, when determining the current time slot of the TDD communication system, the correction value corresponding to the current time slot is obtained according to the correspondence relationship between the time slots and the correction values, that is, the target correction value. The time slot signal type adopted by the TDD communication system can be set according to the requirements of operators; aiming at the base station, the time slot signal can be analyzed to further determine the type of the time slot signal adopted by the TDD communication system.
Specifically, the correspondence between the preset time slot and the correction value may include: respectively counting the downlink power in a downlink normally-open mode and the output power of a power amplification unit in a TDD time slot (normal mode) when various time slot signals are counted; respectively calculating the difference value between the downlink power and the output power of the power amplifier unit when each time slot signal is generated; and establishing the corresponding relation between the plurality of time slots and the correction value according to the calculation result. The correction value can be a digital value, and mainly quantizes the relation between the downlink power and the power amplifier output power. Therefore, the complex software algorithm can be avoided to accurately detect the output power of the power amplifier unit.
Further, a power slot correction correspondence table may be pre-established and stored; and recording the corresponding relation between the time slot and the corrected value in a power time slot correction corresponding table. Therefore, the target correction value under the current time slot can be searched by directly calling the power time slot correction corresponding table, so that the management and the processing of data are facilitated, and the searching speed of the correction value is improved.
In addition, the satisfaction of the power correction condition indicates that the input power and/or the output power of the power amplifier unit are not within the normal operating range of the power amplifier unit. Optionally, the power correction condition includes: the output power of the power amplification unit exceeds a preset power threshold under the current time slot. At this time, when the output power of the power amplification unit is detected to exceed the preset power threshold under the current time slot, the reference signal is adjusted based on the target correction value so as to attenuate the input power and/or the output power of the power amplification unit, ensure that the input power and/or the output power is restored to the normal working power of the power amplification unit, and prevent the power amplification unit from being damaged. The preset power threshold can be set according to actual conditions, the preset power thresholds corresponding to different time slots are different, and the preset power thresholds corresponding to different power amplifier units are also different.
And 130, controlling the power of the power amplifier unit according to the target reference signal.
The target reference signal is an adjusted reference signal, which is used for controlling the power of the power amplifier unit and can be a voltage signal. In this embodiment, the reference signal has a one-to-one correspondence with the power amplifier power, and the control amount, such as the attenuation value, of the power amplifier power is changed by adjusting the reference signal, so as to control the power of the power amplifier unit.
For example, the power of the power amplifying unit may be controlled via hardware circuitry. Optionally, the hardware circuit may be a power control circuit, such as an ALC circuit, which may process the relationship between voltage and attenuation, that is, the ALC circuit may adjust the attenuation value of the power amplifier according to the target reference signal, thereby reducing the power amplifier, avoiding burning of the power amplifier due to the excessive power amplifier, and effectively protecting the power amplifier.
According to the power amplification power control method under the TDD system, when the output power of the power amplification unit is confirmed to meet the power correction condition, the reference signal for regulating and controlling the power of the power amplification unit is regulated to the target reference signal based on the target correction value under the current time slot, and the power of the power amplification unit is directly controlled according to the target reference signal, so that the output power of the power amplification unit does not meet the power correction condition, the rapid control of the power amplification power is realized, and the power amplification unit is prevented from being burnt out due to overlarge output power of the power amplification unit; in addition, the technical scheme provided by the embodiment of the disclosure does not need to set a fixed power control threshold, and can adjust the target reference signal according to the target correction value under different time slots, so that the difference of the power amplification power is accurately corrected, and the accuracy of power amplification power control is improved. Therefore, the embodiment of the disclosure realizes accurate and rapid control of the power amplifier power in a TDD system while protecting the power amplifier unit, and improves the reliability of the power amplifier unit.
Based on the above technical solution, in a specific embodiment of the present disclosure, the method for controlling power of a power amplifier in the TDD system may be implemented by combining hardware with software. Specifically, the main control module, such as FPGA or MCU, acquires a voltage signal corresponding to the output power of the power amplification unit through the power detector, compares the voltage signal with a set voltage threshold, and determines that the output power of the power amplification unit exceeds a preset power threshold in the current time slot when the voltage signal is greater than the set voltage threshold. At this time, the current time slot is determined, the target correction value under the current time slot is searched through the corresponding relation between the time slot and the correction value, the reference signal input to the power amplifier control module is adjusted according to the target correction value, and the power amplifier control module outputs an attenuation value for controlling the attenuation of the power amplifier according to the adjusted reference signal, so that the power amplifier is attenuated according to the attenuation value.
Fig. 2 is a flow chart of another method for controlling power of a power amplifier in a TDD system according to an embodiment of the present disclosure, where the method for adjusting the reference signal is further optimized based on the above embodiment. Specifically, as shown in fig. 2, the method for controlling power of a power amplifier in a TDD system according to the present embodiment includes:
step 210, obtaining the output power of the power amplifier unit.
And 220, when the output power of the power amplification unit is detected to meet the power correction condition, determining a target attenuation value of the input power of the power amplification unit based on the target voltage correction value in the current time slot.
When the voltage value corresponding to the output power of the power amplification unit is detected to be larger than the set voltage threshold, the current time slot is determined according to the current time slot signal (the time slot can be preset), and then the correction value corresponding to the current time slot is searched by the power time slot correction corresponding table, so that the target correction value is obtained. Referring to fig. 3, the correspondence between 7 time slots and correction values is schematically illustrated, wherein 0,1,2,3,4,5,6 corresponding to a time slot is only used for distinguishing different time slots, the number corresponding to the correction value is a voltage value of a digital quantity corresponding to the output power of the power amplification unit, and the number of the table sequence number represents the table length. Then, a target attenuation value of the input power of the power amplifying unit is determined by the target correction value.
Step 230, adjusting the reference signal to a target reference voltage corresponding to the target attenuation value according to the corresponding relation between the reference voltage and the attenuation value of the power amplifier control module.
In general, the power amplifier control modules are different, and the corresponding relation between the reference voltage and the attenuation value is also different, so that the corresponding relation between the reference voltage and the attenuation value corresponding to the power amplifier control modules with various models can be configured in the main control module.
Optionally, adjusting the reference signal to a target reference voltage corresponding to the target attenuation value includes: the reference signal is adjusted to a target reference voltage via an operational amplifier module.
The main control module calculates the reference voltage provided to the operational amplification module according to the amplification factor of the operational amplification module to the voltage and the target reference voltage, so that the target reference voltage is adjusted by adjusting the reference voltage of the operational amplification module, and a larger dynamic range of the reference voltage and the power control can be ensured. In addition, the main control module can acquire the target reference voltage output by the operational amplification module in real time so as to detect whether the target reference voltage output by the operational amplification module is consistent with the target reference voltage determined by the main control module, and if not, the reference voltage provided to the operational amplification module can be continuously adjusted until the target reference voltage is consistent, so that the accurate control of the power amplification power is further ensured.
And 240, controlling the power of the power amplifier unit according to the target reference signal.
According to the power amplifier power control method under the TDD system, the corresponding relation between the reference voltage and the attenuation value of the power amplifier control module can be configured in the main control module, and the power amplifier power can be accurately and rapidly controlled by directly matching the corresponding relation between the reference voltage and the attenuation value and the power time slot correction corresponding table. The power control precision of the embodiment can reach 0.3dB, the reaction time is about 50ms, the high-precision power control is realized, and the engineering application is completely satisfied, so that the reliability and the safety of the power amplifier unit are further improved.
Fig. 4 is a block diagram of a power amplifier power control system in a TDD system according to an embodiment of the present disclosure, where the system may be implemented by software and/or hardware, and may be generally integrated in an electronic device, and may implement power amplifier power control by executing a power amplifier power control method in the TDD system. As shown in fig. 4, the system includes a main control module 31 and a power amplifier control module 32;
the main control module 31 is configured to obtain an output power of the power amplification unit 33, and adjust a reference signal for adjusting and controlling the power of the power amplification unit 33 to a target reference signal based on a target correction value in a current time slot when detecting that the output power of the power amplification unit 33 meets a power correction condition, where the target correction value is a difference value between a downlink power in a downlink normally open mode and the output power of the power amplification unit in a TDD time slot;
the power amplifier control module 32 is configured to control the power of the power amplifier unit 33 according to the target reference signal.
In this embodiment, the main control module 31 and the power amplifier control module 32 may be implemented by software or hardware. Illustratively, the main control module 31 and the power amplifier control module 32 are implemented by hardware, and in this case, the main control module 31 may include an FPGA unit, and the power amplifier control module 32 may include an ALC unit. The input end of the main control module 31 is electrically connected with the output end of the power amplification unit 33, the output end of the main control module 31 is electrically connected with the reference signal end of the power amplification control module 32, the output end of the power amplification control module 32 is electrically connected with the input end of the power amplification unit 33, and the power amplification control module 32 is positioned on the input channel of the power amplification unit 33, i.e. the power amplification control module 32 receives an input signal, such as a radio frequency signal, input to the power amplification unit 33.
The power amplifier power control system in the TDD system provided by the embodiment of the disclosure can execute the power amplifier power control method in the TDD system provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method. For details not described in detail in this embodiment, please refer to the above embodiments, and the details are not repeated here.
Alternatively, as shown in fig. 5, the main control module includes an FPGA chip 311 and a memory 312. The memory 312 may be a FLASH memory.
Optionally, the memory 312 is configured with a power slot correction correspondence table in the above embodiment, where the correspondence between slots and correction values is recorded in the power slot correction correspondence table.
Optionally, with continued reference to fig. 5, the fpga chip 311 obtains the output power of the power amplifying unit 33 via the power detection module 34. Wherein the power detection module 34 may include a power detector tube.
Optionally, the power amplifier control module comprises a radio frequency attenuation circuit, a standard reference voltage circuit and a control voltage input circuit; the radio frequency attenuation circuit comprises a radio frequency input end, a radio frequency output end, a first reference voltage end and a second reference voltage end; the radio frequency output end is electrically connected with the input end of the power amplification unit, the first reference voltage end is electrically connected with the output end of the standard reference voltage circuit, the second reference voltage end is electrically connected with the output end of the control voltage input circuit, and the input end of the control voltage input circuit is used as a reference signal end of the power amplification control module.
Referring to fig. 5 and 6, the rf attenuation circuit may include an rf attenuation path (u1_1 and u1_2) formed of four PIN diodes, and the standard reference voltage circuit provides a fixed reference voltage Vcc of 5V to a first reference voltage terminal of the rf attenuation circuit, and as a forward bias or reverse bias voltage of the PIN diodes, the control voltage input circuit provides a variable reference voltage v_alc to a second reference voltage terminal of the rf attenuation circuit. The radio frequency attenuation circuit adjusts the attenuation value by comparing Vcc and V_ALC to attenuate an input signal, such as a radio frequency signal RF_IN. In addition, the control voltage input circuit may further include a power supply filter circuit, where the power supply filter circuit may include a filter capacitor C5, and the capacitance value may be 100pF, so as to reduce the time delay of the reference voltage in the TDD system on the ALC, so that the power control is faster, and meanwhile, the op-amp integrating circuit is cancelled, so that the reference voltage v_alc is not gradually smoothed, and thus, the software may perform digital discretization processing on the reference voltage v_alc.
Optionally, referring to fig. 5 and fig. 7, the power amplifier power control system further includes an operational amplification module 35, where the operational amplification module 35 includes a voltage amplification circuit 1 and an emission follower circuit 2, an input end of the voltage amplification circuit 1 is electrically connected to an output end of the main control module 31, an output end of the voltage amplification circuit 1 is electrically connected to an input end of the emission follower circuit 2, and an output end of the emission follower circuit 2 is electrically connected to a reference signal end of the power amplifier control module 32.
The voltage amplifying circuit 1 can ensure a large dynamic range of ALC reference voltage and power control. The (voltage) emission follower circuit 2 can play a role in front-back circuit isolation, so that the reference voltage is not interfered by a front-stage circuit, and the stability of the function of the ALC circuit is ensured.
In this embodiment, the main control module 31 outputs the reference voltage da_alc to the input terminal of the voltage amplifying circuit 1, the voltage amplifying circuit 1 amplifies the reference voltage da_alc and outputs the reference voltage v_alc through the follower circuit 2, and the power amplifier control module 32 controls the attenuation of the power amplifier control module 32 based on the reference voltage v_alc.
Optionally, referring to fig. 7, the operational amplification module includes a first operational amplifier circuit 1, a second operational amplifier circuit 2, a third operational amplifier circuit 3 and a fourth operational amplifier circuit 4, where the first operational amplifier circuit 1 is used as a voltage amplifying circuit, the second operational amplifier circuit 2 is used as an emitter follower circuit, and the third operational amplifier circuit 3 and the fourth operational amplifier circuit 4 are used as reserved circuits in the FDD mode.
Fig. 8 is a schematic structural diagram of an electronic device according to an embodiment of the disclosure. As shown in fig. 8, the electronic device 400 includes one or more processors 401 and memory 402.
The processor 401 may be a Central Processing Unit (CPU) or other form of processing unit having data processing capabilities and/or instruction execution capabilities and may control other components in the electronic device 400 to perform desired functions.
Memory 402 may include one or more computer program products that may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. The volatile memory may include, for example, random Access Memory (RAM) and/or cache memory (cache), and the like. The non-volatile memory may include, for example, read Only Memory (ROM), hard disk, flash memory, and the like. One or more computer program instructions may be stored on the computer readable storage medium, and the processor 401 may execute the program instructions to implement the power amplifier power control method and/or other desired functions in the TDD system of the embodiments of the present disclosure as described above. Various contents such as an input signal, a signal component, a noise component, and the like may also be stored in the computer-readable storage medium.
In one example, the electronic device 400 may further include: an input device 403 and an output device 404, which are interconnected by a bus system and/or other forms of connection mechanisms (not shown).
In addition, the input device 403 may also include, for example, a keyboard, a mouse, and the like.
The output device 404 may output various information to the outside, including the determined distance information, direction information, and the like. The output device 404 may include, for example, a display, speakers, a printer, and a communication network and remote output devices connected thereto, etc.
Of course, only some of the components of the electronic device 400 that are relevant to the present disclosure are shown in fig. 8, with components such as buses, input/output interfaces, etc. omitted for simplicity. In addition, electronic device 400 may include any other suitable components depending on the particular application.
In addition to the methods and apparatus described above, embodiments of the present disclosure may also be a computer program product comprising computer program instructions which, when executed by a processor, cause the processor to perform the method for controlling power amplification in a TDD system provided by the embodiments of the present disclosure.
The computer program product may write program code for performing the operations of embodiments of the present disclosure in any combination of one or more programming languages, including an object oriented programming language such as Java, C++ or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device, partly on a remote computing device, or entirely on the remote computing device or server.
In addition, embodiments of the present disclosure may also be a computer readable storage medium, on which computer program instructions are stored, which when executed by a processor, cause the processor to execute the power amplifier power control method in the TDD mode provided by the embodiments of the present disclosure.
The computer readable storage medium may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. The readable storage medium may include, for example, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium would include the following: an electrical connection having one or more wires, a portable disk, a hard disk, random Access Memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
It should be noted that in this document, relational terms such as "first" and "second" and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The foregoing is merely a specific embodiment of the disclosure to enable one skilled in the art to understand or practice the disclosure. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present disclosure is not intended to be limited to the embodiments shown and described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (15)
1. The power amplifier power control method under the TDD system is characterized by comprising the following steps:
obtaining the output power of a power amplifier unit;
determining a target correction value under the current time slot based on a preset corresponding relation between the time slot and the correction value, wherein the target correction value is a difference value between the downlink power output by the power amplification unit under the downlink normally open mode and the output power of the power amplification unit under the TDD time slot;
when the output power of the power amplification unit is detected to meet the power correction condition, adjusting a reference signal for regulating and controlling the power of the power amplification unit to a target reference signal based on a target correction value in the current time slot;
and controlling the power of the power amplifier unit according to the target reference signal.
2. The method for controlling power of a power amplifier in a TDD system according to claim 1, wherein the power correction condition includes: and the output power of the power amplification unit exceeds a preset power threshold under the current time slot.
3. The method for controlling power of a power amplifier in a TDD system according to claim 1, wherein the preset correspondence between the time slots and the correction values includes:
respectively counting the downlink power in a downlink normally-open mode and the output power of a power amplifier unit in a TDD time slot when signals of various time slots are counted;
calculating the difference value between the downlink power and the output power of the power amplifier unit when each time slot signal is calculated;
and establishing the corresponding relation between the plurality of time slots and the correction value according to the calculation result.
4. The method for controlling power of a power amplifier in a TDD system according to claim 1, further comprising:
pre-establishing and storing a power time slot correction corresponding table;
and recording the corresponding relation between the time slot and the corrected value in the power time slot correction corresponding table.
5. The method for controlling power of a power amplifier in a TDD system according to claim 1, wherein adjusting a reference signal for adjusting power of a power amplifier unit to a target reference signal based on a target correction value in a current slot comprises:
determining a target attenuation value of the input power of the power amplifier unit based on the target voltage correction value in the current time slot;
and adjusting the reference signal to a target reference voltage corresponding to the target attenuation value according to the corresponding relation between the reference voltage and the attenuation value of the power amplifier control module.
6. The method for controlling power of a power amplifier in a TDD system according to claim 5, wherein adjusting the reference signal to a target reference voltage corresponding to the target attenuation value comprises:
the reference signal is adjusted to the target reference voltage via an operational amplification module.
7. The power amplification power control system under the TDD system is characterized by comprising a main control module and a power amplification control module, wherein the main control module is used for executing the power amplification power control method under the TDD system according to any one of the claims 1-6;
the main control module is used for acquiring the output power of the power amplification unit, determining a target correction value under the current time slot based on the corresponding relation between a preset time slot and the correction value, and adjusting a reference signal for regulating and controlling the power of the power amplification unit to the target reference signal based on the target correction value under the current time slot when the output power of the power amplification unit is detected to meet the power correction condition, wherein the target correction value is a difference value between the downlink power under a downlink normally open mode and the output power of the power amplification unit under a TDD time slot;
the power amplifier control module is used for controlling the power of the power amplifier unit according to the target reference signal.
8. The system of claim 7, wherein the input end of the main control module is electrically connected to the output end of the power amplification unit, the output end of the main control module is electrically connected to the reference signal end of the power amplification control module, and the output end of the power amplification control module is electrically connected to the input end of the power amplification unit.
9. The power amplifier power control system according to claim 7, wherein the main control module comprises an FPGA chip and a memory.
10. The power amplifier power control system according to claim 9, wherein the memory is configured with a power slot correction correspondence table, and the power slot correction correspondence table records a correspondence between slots and correction values.
11. The power amplifier power control system according to claim 7, wherein the power amplifier control module comprises a radio frequency attenuation circuit, a standard reference voltage circuit and a control voltage input circuit;
the radio frequency attenuation circuit comprises a radio frequency input end, a radio frequency output end, a first reference voltage end and a second reference voltage end; the radio frequency output end is electrically connected with the input end of the power amplification unit, the first reference voltage end is electrically connected with the output end of the standard reference voltage circuit, and the second reference voltage end is electrically connected with the output end of the control voltage input circuit, wherein the input end of the control voltage input circuit is used as a reference signal end of the power amplification control module.
12. The system of claim 7, further comprising an operational amplification module, wherein the operational amplification module comprises a voltage amplification circuit and an emission follower circuit, an input end of the voltage amplification circuit is electrically connected with an output end of the main control module, an output end of the voltage amplification circuit is electrically connected with an input end of the emission follower circuit, and an output end of the emission follower circuit is electrically connected with a reference signal end of the power amplification control module.
13. The power amplifier power control system according to claim 12, wherein the operational amplifier module comprises a first operational amplifier circuit, a second operational amplifier circuit, a third operational amplifier circuit and a fourth operational amplifier circuit, wherein the first operational amplifier circuit is used as the voltage amplifier circuit, the second operational amplifier circuit is used as the radio frequency follower circuit, and the third operational amplifier circuit and the fourth operational amplifier circuit are used as reserved circuits in the FDD system.
14. An electronic device, the electronic device comprising:
a processor;
a memory for storing the processor-executable instructions;
the processor is configured to read the executable instruction from the memory and execute the instruction to implement the power amplifier power control method in the TDD mode according to any one of claims 1 to 6.
15. A computer readable storage medium, wherein the storage medium stores a computer program for executing the power amplification power control method in the TDD system of any one of claims 1 to 6.
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| CN114666174A (en) * | 2022-05-20 | 2022-06-24 | 博为科技有限公司 | Method, device, equipment and medium for remotely adjusting gateway CATV output power |
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