CN111640402A - Control method and device of time schedule controller for image processing and storage medium - Google Patents
Control method and device of time schedule controller for image processing and storage medium Download PDFInfo
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- CN111640402A CN111640402A CN202010452430.2A CN202010452430A CN111640402A CN 111640402 A CN111640402 A CN 111640402A CN 202010452430 A CN202010452430 A CN 202010452430A CN 111640402 A CN111640402 A CN 111640402A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3607—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals for displaying colours or for displaying grey scales with a specific pixel layout, e.g. using sub-pixels
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N9/00—Details of colour television systems
- H04N9/64—Circuits for processing colour signals
- H04N9/73—Colour balance circuits, e.g. white balance circuits or colour temperature control
Abstract
The invention provides a control method and a control device for a time schedule controller for variable-frequency image processing and a computer readable storage medium, which can detect the frame rate change of an information Source (SOC), and dynamically update the settings of a white balance (WT) table and an Overdrive (OD) table through a Micro Control Unit (MCU), reduce the interference caused by frequency fluctuation, achieve the functions of dynamically adjusting the white balance and the overdrive and improve the display quality.
Description
Technical Field
The present invention relates to the field of liquid crystal display technologies, and in particular, to a method and an apparatus for controlling a timing controller for variable frequency (VRR) image processing, and a computer-readable storage medium.
Background
Due to the rise of the global information society and the development of technology, the field of display technology is changing day by day, and the variety of display technologies is increasing, for example, the display technologies include the conventional liquid crystal display technology, the blue phase liquid crystal display technology, the Organic Light Emitting Diode (OLED) display technology, the electrophoretic display technology, and the like. With the development of Display technology, flat panel Display devices such as Liquid Crystal Displays (LCDs) have advantages of high image quality, power saving, thin body, and wide application range, and thus are widely used in various consumer electronics products such as mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, and desktop computers, and become the mainstream of Display devices. Most of the existing liquid crystal displays in the market are backlight liquid crystal displays (lcds), which include a liquid crystal display panel and a backlight module (backlight module). The liquid crystal display panel has the working principle that liquid crystal molecules are placed in two parallel glass substrates, a plurality of vertical and horizontal fine wires are arranged between the two glass substrates, and the liquid crystal molecules are controlled to change directions by electrifying or not, so that light rays of the backlight module are refracted out to generate pictures.
The Timing Controller (TCON) of the current lcd terminal control board supports a fixed pixel clock frequency (pixel clock frequency), and supports a variable frame rate (frame rate) by adjusting the video idle area (V-blanking) time. When the pixel clock frequency (pixel clock frequency) is fixed and the line data (H _ total) scanned in the vertical direction is fixed, the change of the frame rate is supported by changing the video idle area (V-blanking) of the timing controller, that is, changing the V _ total, but since the image correction parameters (such as gamma value) such as the previous white balance are still used after the frame rate is changed, the display quality is seriously affected.
Disclosure of Invention
In view of the above, the present invention provides a method, an apparatus, and a computer readable storage medium for controlling variable frequency (VRR) image processing, which can detect a change in a signal Source (SOC) frame rate, and perform timing control by using a white balance table and an overdrive table corresponding to an unchanged image signal frame rate when the image signal frame rate is not changed through a Micro Control Unit (MCU); when the frame rate of the image signal changes, the white balance table and the overdrive table corresponding to the frame rate of the image signal after the change are adopted to carry out time sequence control, and the setting of the white balance (WT) table and the Overdrive (OD) table is dynamically updated, so that the method not only adapts to the change of the frequency, but also reduces the interference caused by frequency fluctuation, achieves the functions of dynamically adjusting the white balance and the overdrive, and improves the display quality.
Therefore, the embodiment of the invention provides the following technical scheme:
according to an aspect of the present invention, there is provided a control method of a timing controller for image processing, comprising the steps of:
detecting an input image signal to obtain an image signal frame rate;
judging whether the frame rate of the image signal changes or not;
if the frame rate of the image signal is not changed, performing time sequence control by adopting a white balance table and an overdrive table corresponding to the frame rate of the image signal which is not changed; and if the frame rate of the image signal changes, performing time sequence control by adopting a white balance table and an overdrive table corresponding to the changed frame rate of the image signal.
Further, the method further comprises corresponding the specified frame rate to the specified white balance table and the overdrive table by a schmitt algorithm.
Further, the method further comprises reading a white balance table and an overdrive table corresponding to different frame rates from the first memory and storing the white balance table and the overdrive table and other lookup tables corresponding to default frame rates in the second memory, and storing the white balance table and the overdrive table and other lookup tables corresponding to default frame rates in the third memory for timing control.
Further, detecting the input image signal to obtain the Frame Rate of the image signal includes determining total data V _ total scanned in the horizontal direction by counting, and calculating a Frame Rate according to a formula of Pixel _ Clock _ Frequency being H _ total × V _ total × Frame _ Rate, where Frame _ Rate is the Frame Rate, Pixel _ Clock _ Frequency is the Pixel Clock signal Frequency, V _ total is the total data scanned in the horizontal direction, and H _ total is the line data scanned in the vertical direction.
Further, the first memory is a flash memory, the second memory is a dynamic random access memory, and the third memory is a static random access memory.
Further, the image signal includes a valid display data strobe signal from which the low voltage differential signal or the VBO signal is decoded.
According to another aspect of the present invention, there is provided a timing control apparatus for image processing, characterized by comprising:
the detection module is used for detecting an input image signal to obtain an image signal frame rate;
the judging module is used for judging whether the frame rate of the image signal changes or not;
and the control module is used for performing time sequence control by adopting a white balance table and an overdrive table corresponding to the frame rate of the unchanged image signal when the frame rate of the image signal is not changed, and performing time sequence control by adopting the white balance table and the overdrive table corresponding to the frame rate of the changed image signal when the frame rate of the image signal is changed. Further, the device further comprises a loading module, wherein the loading module is used for reading the white balance table and the overdrive table corresponding to different frame rates from the first memory and storing the white balance table and the overdrive table and other lookup tables corresponding to default frame rates in the second memory, and storing the white balance table and the overdrive table and other lookup tables corresponding to default frame rates in the third memory for time sequence control, the first memory is a flash memory, the second memory is a dynamic random access memory, and the third memory is a static random access memory.
Furthermore, the control module comprises a micro control unit, and the specified frame rate is corresponding to the specified white balance table and the overdrive table through a Schmidt algorithm.
According to another aspect of the present invention, there is provided a computer-readable storage medium having stored therein a plurality of instructions adapted to be loaded by a processor to perform a control method of any one of the above-mentioned timing controllers.
According to the control method of the time sequence controller for image processing, provided by the technical scheme of the invention, the white balance table and the overdrive table for time sequence control are updated simultaneously, the white balance table and the overdrive table can adapt to various frame rates, the display quality is better under different frame rates, the interference caused by frequency fluctuation can be reduced, and the display quality is integrally improved. Of course, not all of the above-described advantages need to be achieved in the practice of any one product or method of the present invention.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
The components in the figures are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. For purposes of illustrating and describing some portions of the present invention, corresponding parts may be exaggerated in the drawings, i.e., made larger relative to other components in an exemplary apparatus actually manufactured according to the present invention. In the drawings, the same or similar technical features or components will be denoted by the same or similar reference numerals.
Fig. 1 is a schematic diagram showing a timing controller board related to a control method for a variable frequency (VRR) image processing timing controller according to an embodiment of the present invention.
Fig. 2 is a flowchart illustrating a control method of a timing controller for variable frequency (VRR) image processing according to an embodiment of the present invention.
Fig. 3 is another flowchart illustrating a control method of a timing controller for variable frequency (VRR) image processing according to an embodiment of the present invention.
Fig. 4 is another flowchart illustrating a control method of a timing controller for variable frequency (VRR) image processing according to an embodiment of the present invention.
Fig. 5 illustrates a white balance table switching block diagram of a control method of a timing controller for variable frequency (VRR) image processing according to an embodiment of the present invention.
Fig. 6 illustrates an overdrive table switching block diagram of a control method of a timing controller for variable frequency (VRR) image processing according to an embodiment of the present invention.
Fig. 7 shows a schematic diagram of a timing control apparatus usable for variable frequency (VRR) image processing according to an embodiment of the present invention.
Fig. 8 shows another schematic diagram of a timing control apparatus usable for variable frequency (VRR) image processing according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
First embodiment
According to a first embodiment of the present invention, there is provided a control method of a timing controller for variable frequency (VRR) image processing. For convenience of explanation, fig. 1 illustrates a schematic diagram of a timing controller board related to a control method of a timing controller for variable frequency (VRR) image processing according to an embodiment of the present invention. As shown in fig. 1, the timing controller board includes:
a Timing Controller 1 (TON), which includes a detection module 13, an Integrated Circuit Bus Controller 12(Inter-Integrated Circuit Bus Controller), a first memory 2 outside the Timing Controller, and a second Controller 11 inside the Timing Controller. The integrated circuit bus controller is electrically connected to a power integrated management circuit (PMIC) 3. The first memory 2 is used for storing lookup tables (LUTs) such as a white balance table and an overdrive table corresponding to the frequency, the second memory 11 is used for caching the lookup tables (LUTs) corresponding to the frequency, and the detection module 13 is used for detecting the image frame rate.
Referring to fig. 2, 3 and 4, according to a first embodiment of the present invention, there is provided a control method of a timing controller for variable frequency (VRR) image processing, including:
step S01, detecting an input image signal to obtain an image signal frame rate;
step S02, determining whether the frame rate of the image signal has changed;
step S031, if the frame rate of the image signal has not changed, performing timing control using a white balance table and an overdrive table corresponding to the frame rate of the image signal that has not changed;
step S032, if the frame rate of the image signal changes, performing timing control by using a white balance table and an overdrive table corresponding to the frame rate of the changed image signal.
Compared with the prior art that the prior image correction parameters (such as gamma values) such as white balance and the like are still used after the frame rate of the image is changed, the control method of the time sequence controller for image processing of the invention updates the white balance table and the overdrive table for time sequence control at the same time, can adapt to various frame rates, has better display quality under different frame rates, can reduce the interference caused by frequency fluctuation, and integrally improves the display quality.
In one embodiment, step S032 corresponds the specified frame rate to the specified white balance table and overdrive table by the schmitt algorithm. The specified frame rate may be a default frame rate or a frame rate after an image signal of the input signal is changed. For example, if the frame rate is f0, the white balance table is designated as WT table 0 and the overdrive table is designated as OD table 0; if the frame rate is designated as f (n-1), designating the white balance table as the corresponding WT table (n-1) and designating the overdrive table as the OD table (n-1); if the frame rate f (n) is designated, the white balance table is designated as the corresponding WT table (n), and the overdrive table is designated as the OD table (n). When the frame rate of the image signal is changed, the frame rate before the change is f (n-1), and the frame rate after the change is f (n), the frame rate is designated as f (n), the white balance table is designated as a corresponding WT table (n), and the overdrive table is designated as an OD table (n).
In one embodiment, the image signal is a valid display data strobe signal DE from which a low voltage differential signal LVDS or a VBO signal is decomposed.
In one embodiment, the step S01 of detecting the Frame Rate of the image signal obtained from the input image signal includes calculating a Frame Rate by counting V _ total and calculating a Frame Rate according to the formula H _ total × V _ total × Frame _ Rate ═ Pixel _ Clock _ Frequency, where Frame _ Rate is the Frame Rate, Pixel _ Clock _ Frequency is the Pixel Clock signal Frequency, V _ total is the total data scanned in the horizontal direction, and H _ total is the line data scanned in the vertical direction. More specifically, V _ total is determined by counting the number of de-blank parameters of VS-blanking and the Frame Rate is calculated according to the formula H _ total × V _ total × Frame _ Rate ═ Pixel _ Clock _ Frequency.
In one embodiment, the method further includes a step S00 of reading the white balance table and the overdrive table and other lookup tables corresponding to different frame rates from the first memory 2 and storing the white balance table and the overdrive table and other lookup tables corresponding to the default frame rate in the second memory 11 and storing them in a third memory (not shown) for timing control.
In one embodiment, the first memory 2 is a flash memory, the second memory 11 is a dynamic random access memory, and the third memory (not shown) is a static random access memory in step S00. More preferably, the second memory 11 is a double data rate synchronous dynamic random access memory (DDR SDRAM).
In one embodiment, referring to fig. 1, 3 and 4, the step S00 further includes reading other look-up tables LUT besides the white balance and overdrive tables corresponding to different frame rates, and the other look-up tables are stored in the second memory 11 and are also transformed when transformation is required, and the control method of the corresponding timing controller for variable frequency (VRR) image processing includes the following steps:
reading a white balance table and an overdrive table corresponding to different frame rates and other lookup tables from a first memory 2 and storing the white balance table and the overdrive table and other lookup tables corresponding to a default frame rate in a third memory (not shown) for timing control, wherein the first memory 2 is a flash memory, the second memory 11 is a dynamic random access memory, and the third memory (not shown) is a static random access memory;
detecting an input image signal to obtain an image signal frame rate;
judging whether the frame rate of the image signal changes or not;
if the frame rate of the image signal is not changed, performing time sequence control by adopting a white balance table and an overdrive table corresponding to the frame rate of the image signal which is not changed; and if the frame rate of the image signal changes, performing time sequence control by adopting a white balance table and an overdrive table corresponding to the changed frame rate of the image signal.
It should be noted that the image signal input in fig. 2, 3, and 4 is continuously performed, and the image signal detection is also continuously performed. The default white balance table and the overdrive table and other lookup tables stored in the third memory may be determined according to a default frame rate, or may be determined according to a frame rate of an initially input image signal.
It should also be noted that, in some embodiments, the second storage and the third storage may be arranged in one storage, and the first storage, the second storage and the third storage are not necessarily independent components, and may be a part or a region of other components.
In one embodiment, referring to fig. 5 and 6, if the frame rate of the image signal is not changed, the white balance table and the overdrive table corresponding to the frame rate of the image signal which is not changed are used for performing timing control; and if the frame rate of the image signal changes, the designated frame rate is corresponding to the designated white balance table and the overdrive table through a Schmidt algorithm, and the white balance table and the overdrive table corresponding to the frame rate of the image signal after the change are adopted for time sequence control. The schmitt principle has two stable states, but is different from the general schmitt principle that the schmitt algorithm adopts a frequency triggering mode, and the state of the schmitt algorithm is maintained by the frequency of an input signal; for input signals with two different changing directions of negative decreasing and positive increasing, the Schmitt has different threshold frequencies. When the image frame rate changes, the Schmitt algorithm is adopted for carrying out correspondence, the white balance table (WT table) and the overdrive table (OD table) are converted without slightly converting the frame rate, and one table is corresponding in a certain frequency range, so that the method can adapt to the change of the image frame rate on one hand, and cannot bring frequent disturbance on the other hand, thereby integrally improving the display quality of the image. As shown in fig. 5, when the frame rate is increased from frame rate 1 to frame rate 2, but frame rate 2 is not reached, the white balance table still maintains WT table 1. As shown in fig. 6, when the frame rate is decreased from frame rate 2 to frame rate 1, but frame rate 1 is not reached, the overdrive table still maintains OD table 2.
Therefore, the control method of the time schedule controller of the invention corresponds the designated frequency to the lookup tables such as the designated white balance (WT) and the Overdrive (OD) table and the like through the Schmidt algorithm, simultaneously dynamically updates the settings of the white balance (WT) and the Overdrive (OD) table and the like, and adopts the lookup tables such as the white balance table and the overdrive table corresponding to the frame rate of the image signal after the change to perform time schedule control, thereby not only adapting to the change of the frequency, but also reducing the interference introduced by the frequency fluctuation and further improving the display quality.
Second embodiment
According to a second embodiment of the present invention, there is provided a timing control apparatus for image processing.
In one embodiment, referring to fig. 1, 5-7, a timing control apparatus for variable frequency white for image processing includes:
a detecting module M01, for detecting the input image signal to obtain the image signal frame rate, which is shown as 13 in fig. 1;
a judging module M02, configured to judge whether the frame rate of the image signal changes;
and a conversion module M03, configured to, when the frame rate of the image signal is not changed, perform timing control by using the white balance table and the overdrive table corresponding to the frame rate of the image signal that is not changed, and perform timing control by using the white balance table and the overdrive table corresponding to the frame rate of the image signal that is changed.
In one embodiment, referring to fig. 1, 5, 6 and 8, the apparatus further includes a loading module M00, configured to read the white balance table and the overdrive table corresponding to different frame rates and other lookup tables from the first memory 2 and store the white balance table and the overdrive table corresponding to the default frame rate and other lookup tables in a third memory (not shown) for timing control. The first memory 2 is a flash memory and is used for storing a plurality of lookup tables such as white balance tables and overdrive tables corresponding to different frame rates; the second memory 11 is a dynamic random access memory and is configured to cache a plurality of lookup tables such as white balance tables and overdrive tables corresponding to different frame rates; the third memory (not shown) is a static random access memory for holding a white balance table, an overdrive table, etc. currently used for timing control. In some embodiments, the second memory 11 is preferably a double data rate synchronous dynamic random access memory (DDR SDRAM).
In one embodiment, referring to fig. 5 and 6, the control module M03 includes a micro control unit (not shown) to correspond the specified frame rate to the specified white balance table and overdrive table by the schmitt algorithm. If the frame rate of the image signal is not changed, performing time sequence control by adopting a white balance table and an overdrive table corresponding to the frame rate of the image signal which is not changed; and if the frame rate of the image signal changes, the designated frame rate is corresponding to the designated white balance table and the overdrive table through a Schmidt algorithm, and the white balance table and the overdrive table corresponding to the frame rate of the image signal after the change are adopted for time sequence control. The schmitt principle has two stable states, but is different from the general schmitt principle that the schmitt algorithm adopts a frequency triggering mode, and the state of the schmitt algorithm is maintained by the frequency of an input signal; for input signals with two different changing directions of negative decreasing and positive increasing, the Schmitt has different threshold frequencies. When the image frame rate changes, the Schmitt algorithm is adopted for carrying out correspondence, the white balance table (WT table) and the overdrive table (OD table) are converted without slightly changing the frame rate, and the white balance table (WT table) and the overdrive table (OD table) correspond to one table in a certain frequency range, so that the method can adapt to the change of the image frame rate on one hand, and cannot bring frequent disturbance on the other hand, thereby integrally improving the display quality of the image. As shown in fig. 5, when the frame rate is increased from frame rate 1 to frame rate 2, but frame rate 2 is not reached, the white balance table still maintains WT table 1. As shown in fig. 6, when the frame rate is decreased from frame rate 2 to frame rate 1, but frame rate 1 is not reached, the overdrive table still maintains OD table 2.
In specific implementation, the modules and units may be implemented as independent entities, or may be combined arbitrarily and implemented as one or several entities. One module in fig. 7 may correspond to one component or module in fig. 1, may correspond to a plurality of components or modules in fig. 1, and similarly, one component or module in fig. 1 may correspond to a plurality of modules in fig. 7. The specific implementation of each module and unit can refer to the foregoing method embodiments, and is not described herein again.
It can be seen that the timing control apparatus of the present invention, by using schmitt algorithm, corresponds the designated frequency to the lookup tables such as the designated white balance (WT) and Overdrive (OD) tables, and dynamically updates the settings of the white balance (WT) and Overdrive (OD) tables, and performs timing control using the lookup tables such as the white balance table and the overdrive table corresponding to the frame rate of the image signal after the change, thereby adapting to the change of the frequency, and reducing the interference caused by the frequency fluctuation, thereby improving the display quality.
Third embodiment
It will be understood by those skilled in the art that all or part of the steps of the methods of the above embodiments may be performed by instructions or by associated hardware controlled by the instructions, which may be stored in a computer readable storage medium and loaded and executed by a processor. To this end, the present application provides a storage medium, in which a plurality of instructions are stored, and the instructions can be loaded by a processor to execute the steps of any one of the control methods of the timing controller for image processing provided by the embodiments of the present application.
Wherein the storage medium may include: a Read Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and the like, and more specifically, specific categories of a Static Random-Access Memory (SRAM) and a Dynamic Random Access Memory (DRAM) may be included.
Since the instructions stored in the storage medium can execute the steps of any method for controlling a timing controller for image processing provided in the embodiments of the present application, the advantageous effects that can be achieved by any method for controlling a timing controller for image processing provided in the embodiments of the present application can be achieved, which are detailed in the foregoing embodiments and will not be described again here. The above operations can be implemented in the foregoing embodiments, and are not described in detail herein.
According to the above description, the technical effects of the present invention are: a method, apparatus and computer readable storage medium for controlling a timing controller for variable frequency (VRR) image processing are provided, which can detect a Source (SOC) frame rate change, correspond a designated frequency to lookup tables such as a designated white balance (WT) and an Overdrive (OD) table through a Schmitt algorithm, dynamically update settings of the white balance (WT) and the Overdrive (OD) table, and perform timing control using the lookup tables such as the white balance table and the overdrive table corresponding to the changed image signal frame rate, thereby adapting to the frequency change and reducing interference caused by frequency fluctuation, thereby improving display quality.
Regarding the technical effect, it should be further noted that, when the frame rate of the image signal changes, the technical solution of the present invention simultaneously uses the look-up tables, such as the white balance table and the overdrive table, corresponding to the changed frame rate to perform the timing control, so as to better adapt to the change of the frequency, and have a better and more reliable display effect than the case of independently updating the white balance table or the overdrive table.
The above description is only exemplary of the present application and should not be taken as limiting the present application, and any modifications, equivalents, improvements, etc. made within the spirit and principle of the present application should be included in the scope of the present application.
Those skilled in the art will appreciate that the above description is not meant to be limiting of the apparatus and may include more or less components, or combinations of certain components, or different arrangements of components.
It should be noted that the terms "first" and "second" in the description of the present application are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implying any number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. The term "comprising" is used to specify the presence of stated elements, but not to preclude the presence or addition of additional like elements in a process, method, article, or apparatus that comprises the stated elements. All the embodiments in the present specification are described in a related manner, and the same and similar parts among the embodiments may be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the device and electronic apparatus embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference may be made to some descriptions of the method embodiments for relevant points. The above description is only an example of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention. In the foregoing description of specific embodiments of the invention, features described and/or illustrated with respect to one embodiment may be used in the same or similar manner in one or more other embodiments, in combination with or instead of the features of the other embodiments.
In this application, the word "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the application. In the following description, details are set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes are not set forth in detail in order to avoid obscuring the description of the present application with unnecessary detail. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
It should be emphasized that the term "comprises/comprising" when used herein, is taken to specify the presence of stated features, elements, steps or components, but does not preclude the presence or addition of one or more other features, elements, steps or components. The terms "a," "an," "two," "1," "2," "n-" and the like, as they relate to ordinal numbers, do not necessarily denote the order of execution or importance of the features, elements, steps, or components identified by the terms, but are used merely for identification among the features, elements, steps, or components for clarity of description.
Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope defined by the appended claims.
Claims (10)
1. A control method of a timing controller for image processing, comprising the steps of:
detecting an input image signal to obtain an image signal frame rate;
judging whether the frame rate of the image signal changes or not;
if the frame rate of the image signal is not changed, performing time sequence control by adopting a white balance table and an overdrive table corresponding to the frame rate of the image signal which is not changed; and if the frame rate of the image signal changes, performing time sequence control by adopting a white balance table and an overdrive table corresponding to the changed frame rate of the image signal.
2. The method of claim 1, further comprising:
and the appointed frame rate is corresponding to the appointed white balance table and the overdrive table through a Schmidt algorithm.
3. The method of claim 1, further comprising:
and reading a white balance table and an overdrive table corresponding to different frame rates from the first memory and storing the white balance table and the overdrive table corresponding to the default frame rate in the second memory, and storing the white balance table and the overdrive table corresponding to the default frame rate in the third memory for timing control.
4. The method of claim 1, wherein detecting the input image signal to obtain an image signal frame rate comprises: the Frame Rate is calculated according to the formula, i.e., Pixel _ Clock _ Frequency, H _ total × V _ total × Frame _ Rate, where Frame _ Rate is the image signal Frame Rate, Pixel _ Clock _ Frequency is the Pixel Clock signal Frequency, V _ total is the total data scanned in the horizontal direction, and H _ total is the line data scanned in the vertical direction.
5. The method of claim 3, wherein the first memory is a flash memory, the second memory is a dynamic random access memory, and the third memory is a static random access memory.
6. The method of any one of claims 1 to 5, wherein the image signal comprises a valid display data strobe signal in which a low voltage differential signal or a VBO signal is deasserted.
7. A timing control apparatus for image processing, comprising:
the detection module is used for detecting an input image signal to obtain an image signal frame rate;
the judging module is used for judging whether the frame rate of the image signal changes or not;
and the control module is used for performing time sequence control by adopting a white balance table and an overdrive table corresponding to the frame rate of the unchanged image signal when the frame rate of the image signal is not changed, and performing time sequence control by adopting the white balance table and the overdrive table corresponding to the frame rate of the changed image signal when the frame rate of the image signal is changed.
8. The timing control apparatus according to claim 7, further comprising a loading module, wherein the loading module is configured to read the white balance table and the overdrive table corresponding to different frame rates from a first memory and store the white balance table and the overdrive table corresponding to a default frame rate in a second memory, and store the white balance table and the overdrive table corresponding to the default frame rate in a third memory for timing control, wherein the first memory is a flash memory, the second memory is a dynamic random access memory, and the third memory is a static random access memory.
9. The timing control apparatus according to any one of claims 7 to 8, wherein the control module comprises a micro control unit for associating the designated frame rate with the designated white balance table and the overdrive table by a schmitt algorithm.
10. A computer-readable storage medium having stored therein a plurality of instructions adapted to be loaded by a processor to perform the method of controlling a timing controller of any one of claims 1 to 6.
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