CN111048031A - Drive control circuit and control method of display panel and display device - Google Patents
Drive control circuit and control method of display panel and display device Download PDFInfo
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- CN111048031A CN111048031A CN202010002451.4A CN202010002451A CN111048031A CN 111048031 A CN111048031 A CN 111048031A CN 202010002451 A CN202010002451 A CN 202010002451A CN 111048031 A CN111048031 A CN 111048031A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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Abstract
The application discloses a drive control circuit of a display panel, which comprises a flash memory and a time schedule controller connected with the flash memory, wherein a first variable refresh rate table is stored in the flash memory, and the time schedule controller comprises a microprocessor, a double data rate storage module and a variable refresh rate module which are sequentially connected; the microprocessor reads the first variable refresh rate table stored on the flash memory, processes the first variable refresh rate table and stores the first variable refresh rate table in the double-data-rate storage module, detects the frame rate of the display panel in real time and instructs the double-data-rate storage module to send the processed variable refresh rate table corresponding to the frame rate to the variable refresh rate module. By the mode, the frame rate range can be divided more finely, so that more accurate change of the following frame rate is achieved, and a plurality of different variable refresh rate tables are called to enable the dynamic change of the display effect to be more fine.
Description
Technical Field
The present disclosure relates to the field of display technologies, and in particular, to a driving control circuit, a control method, and a display device for a display panel.
Background
The existing Timing Controller (TCON) mostly supports a Variable Refresh Rate (VRR) function, i.e. by fixing a pixel clock frequency (pixel clock frequency), adjusting a V-blanking time to support a varying frame rate (frame rate).
Generally, when the timing controller detects different frame rates, it will call different variable refresh rate tables (VRRtable) to achieve dynamic change of display effect, in the prior art, the variable refresh rate tables are stored in a flash memory (flash) on a control board, and because the flash memory is smaller, generally, only a smaller number of variable refresh rate tables can be stored, so that the frame rate range cannot be divided more finely, so as to achieve more precise change of following frame rate and call a plurality of different variable refresh rate tables to make dynamic change of display effect more fine.
Disclosure of Invention
The application provides a drive control circuit, a control method and a display device of a display panel, which can solve the problem that in the prior art, a plurality of variable refresh rate tables cannot be stored due to a small flash memory, so that the frame rate range cannot be divided more finely, and the display effect is dynamically changed more finely by calling a plurality of different variable refresh rate tables according to the change of the frame rate more accurately.
In order to solve the technical problem, the application adopts a technical scheme that: the driving control circuit comprises a flash memory and a time schedule controller connected with the flash memory, wherein a first variable refresh rate table is stored in the flash memory, and the time schedule controller comprises a microprocessor, a double data rate storage module and a variable refresh rate module which are sequentially connected; the microprocessor is connected with the flash memory and is used for reading the first variable refresh rate table stored on the flash memory, processing the first variable refresh rate table and storing the first variable refresh rate table in the double-data-rate storage module, detecting the frame rate of the display panel in real time and instructing the double-data-rate storage module to send the processed variable refresh rate table corresponding to the frame rate to the variable refresh rate module.
Wherein the processing of the first variable refresh rate table by the microprocessor comprises: and carrying out linear interpolation on the first variable refresh rate table to obtain a second variable refresh rate table.
The first variable refresh rate table and the second variable refresh rate table store gray-scale values required by each pixel in the display panel, and the number of the second variable refresh rate tables is twice of the number of the first variable refresh rate tables.
Wherein the variable refresh rate module further comprises a random access memory for receiving the second variable refresh rate table.
The drive control circuit further comprises a power management integrated circuit, and the power management integrated circuit is respectively connected with the flash memory and the time schedule controller.
In order to solve the above technical problem, another technical solution adopted by the present application is: the control method of the drive control circuit based on the display panel comprises the following steps: the microprocessor reading the first variable refresh rate table stored on the flash memory; processing the first variable refresh rate table and storing the first variable refresh rate table in the double-data-rate storage module; the microprocessor detects the frame rate of the display panel in real time; and instructing the double-data-rate storage module to send a processed variable refresh rate table corresponding to the frame rate to the variable refresh rate module.
Wherein the processing the first variable refresh rate table and storing it in the dual data rate storage module further comprises: and processing the first variable refresh rate table by a linear interpolation method to obtain a second variable refresh rate table.
The first variable refresh rate table and the second variable refresh rate table store gray-scale values required by each pixel in the display panel, and the number of the second variable refresh rate tables is twice of the number of the first variable refresh rate tables.
Wherein the variable refresh rate module further comprises a random access memory for receiving the second variable refresh rate table.
In order to solve the above technical problem, the present application adopts another technical solution: the display device comprises a display panel and any one of the drive control circuits, wherein the control circuit is connected with the display panel and is used for outputting signals to the display panel.
The application has the beneficial effects that: the method has the advantages that the first variable refresh rate table acquired from the flash memory is processed and stored in the double-data-rate storage module through the microprocessor in the time schedule controller, when different frame rates of the display panel are detected, the method can call a plurality of different variable refresh rate tables following the change of the frame rates, and the dynamic change of the display effect is more detailed.
Drawings
In order to illustrate the solution of the present application more clearly, the drawings that are needed in the description of the embodiments will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and that other drawings can be obtained by those skilled in the art without inventive effort.
FIG. 1 is a schematic structural diagram of an embodiment of a driving control circuit of a display panel according to the present application;
FIG. 2 is a flowchart illustrating an embodiment of a method for controlling a driving control circuit of a display panel according to the present invention;
fig. 3 is a schematic structural diagram of an embodiment of a display device according to the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the description of the application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the terms "including" and "having," and any variations thereof, in the description and claims of this application and the description of the above figures are intended to cover non-exclusive inclusions. The terms "first," "second," and the like in the description and claims of this application or in the above-described drawings are used for distinguishing between different objects and not for describing a particular order.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an embodiment of a driving control circuit of a display panel according to the present application, and as shown in fig. 1, an acquisition control circuit 100 of a display panel according to the present application includes a flash memory 110 and a timing controller 120 connected to the flash memory 110.
In this embodiment, the first variable refresh rate table may include a table1, a table3, a table5 … …, and the like.
The timing controller 120 includes a microprocessor 121, a double data rate memory module 122, and a variable refresh rate module 123, which are connected in sequence, and the functional modules are all turned on after the timing controller 120 is powered on.
The microprocessor 121 may be an mcu (micro Control unit), and the microprocessor 121 is connected to the flash memory 110, and is configured to read the first variable refresh Rate table stored in the flash memory 110, and store the first variable refresh Rate table in a Double Data Rate storage module (Double Data Rate SDRAM) 122.
Further, the microprocessor 121 processes the first variable refresh rate table, and stores the processed variable refresh rate table in the double data rate storage module 122 again.
Specifically, the microprocessor 121 processes the first variable refresh rate table by a linear interpolation method to obtain a second variable refresh rate table, where the number of the second variable refresh rate table is 2 times that of the first variable refresh rate table, and the second variable refresh rate table may include table1, table2, table3, table4, table5 … …, and the like. The second variable refresh rate table is further stored again in the dual data rate memory module 122.
Subsequently, the microprocessor 121 in the timing controller 120 detects the frame rate of the display panel in real time, and when a different frame rate is detected, the microprocessor 121 sends an instruction to the double data rate storage module 122, which instructs it to send the processed variable refresh rate table (i.e., the second variable refresh rate table) corresponding to the detected frame rate to the variable refresh rate module 123.
Specifically, the variable refresh rate module 123 further includes a Random Access Memory (RAM) 1231. The random access memory 1231 is configured to receive the second variable refresh rate table, thereby implementing dynamic variation of the display effect.
In the above embodiment, the microprocessor in the timing controller processes the first variable refresh rate table obtained from the flash memory and stores the processed variable refresh rate table in the dual data rate storage module, and when different frame rates of the display panel are detected, the microprocessor can call a plurality of different processed variable refresh rate tables from the dual data rate storage module in real time and send the processed variable refresh rate tables to the variable refresh rate module, thereby realizing more detailed dynamic change of display effect. In addition, the method of linear interpolation is adopted to increase the variable refresh rate table, and flash memory resources on the control panel cannot be increased.
In addition, the driving control circuit 100 provided in the present application further includes a Power Management Integrated Circuit (PMIC) 130, where the power management integrated circuit 130 is respectively connected to the flash memory 110 and the timing controller 120, and is configured to supply power to the timing controller 120. Of course, the driving control circuit 100 provided in the present application may further include a conversion circuit, a gamma circuit, and the like, which are described with reference to the prior art and will not be further described herein.
In the above embodiment, the microprocessor in the timing controller processes the first variable refresh rate table obtained from the flash memory and stores the processed first variable refresh rate table in the dual data rate storage module, and when different frame rates of the display panel are detected, the microprocessor can call a plurality of different variable refresh rate tables following the change of the frame rates, thereby realizing more detailed dynamic change of the display effect.
Referring to fig. 2, fig. 2 is a schematic flow chart of an embodiment of a control method for a driving control circuit of a display panel according to the present application, where the control method is based on the first embodiment, and as shown in fig. 2, the control method according to the present application includes the following steps:
s100, the microprocessor reads the first variable refresh rate table stored in the flash memory.
Referring to fig. 1, the power management ic 130 supplies power to the timing controller 120, and the functions of the microprocessor 121, the dual data rate memory module 122, and the variable refresh rate module 123 in the timing controller 120 are turned on.
Further, the microprocessor 121 reads the first variable refresh rate table stored on the flash memory 110, and stores the first variable refresh rate table in the dual data rate storage module 122.
And S200, processing the first variable refresh rate table and storing the first variable refresh rate table in a double-data-rate storage module.
Further, the microprocessor 121 processes the first variable refresh rate table, and stores the processed variable refresh rate table in the double data rate storage module 122 again.
Specifically, the microprocessor 121 processes the first variable refresh rate table by a linear interpolation method to obtain a second variable refresh rate table, where the number of the second variable refresh rate table is 2 times that of the first variable refresh rate table, and the second variable refresh rate table may include table1, table2, table3, table4, table5 … …, and the like. The second variable refresh rate table is further stored again in the dual data rate memory module 122.
S300, the microprocessor detects the frame rate of the display panel in real time.
S400, instructing the double data rate storage module to send the processed variable refresh rate table corresponding to the frame rate to the variable refresh rate module.
When the microprocessor 121 detects a different frame rate, the microprocessor 121 sends an instruction to the double data rate storage module 122, which instructs it to send a processed variable refresh rate table (i.e., a second variable refresh rate table) corresponding to the detected frame rate to the variable refresh rate module 123.
Specifically, the variable refresh rate module 123 further includes a Random Access Memory (RAM) 1231. The random access memory 1231 is configured to receive the second variable refresh rate table, thereby implementing dynamic variation of the display effect.
In the foregoing embodiment, the microprocessor in the timing controller processes the first variable refresh rate table obtained from the flash memory and stores the processed variable refresh rate table in the dual data rate storage module, and when different frame rates of the display panel are detected, the dual data rate storage module can call a plurality of different processed variable refresh rate tables in real time and send the processed variable refresh rate tables to the variable refresh rate module (frame rate range can be divided more finely to achieve more accurate change of following frame rate and call a plurality of different variable refresh rate tables), so that dynamic change of display effect is more finely. In addition, the method of linear interpolation is adopted to increase the variable refresh rate table, and flash memory resources on the control panel cannot be increased.
Referring to fig. 3, fig. 3 is a schematic structural diagram of an embodiment of a display device of the present application, where the display device 200 includes a display panel 210 and a control circuit a with any of the above structures, and the control circuit a is connected to the display panel 210 and is configured to output a signal to the display panel 210. Optionally, the structure of the control circuit a is described in detail in the foregoing embodiments, and is not described herein again.
In summary, it is easily understood by those skilled in the art that the present application provides a driving control circuit, a control method, and a display device for a display panel, in which a microprocessor in a timing controller processes and stores a first variable refresh rate table obtained from a flash memory in a dual data rate storage module, and when different frame rates of the display panel are detected, a plurality of different processed variable refresh rate tables can be called from the dual data rate storage module in real time and sent to the variable refresh rate module (a frame rate range can be divided more finely to achieve more accurate change of a following frame rate and call a plurality of different variable refresh rate tables), so as to achieve more dynamic change of a display effect.
The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application or are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.
Claims (10)
1. The drive control circuit of the display panel is characterized by comprising a flash memory and a time schedule controller connected with the flash memory, wherein a first variable refresh rate table is stored in the flash memory, and the time schedule controller comprises a microprocessor, a double data rate storage module and a variable refresh rate module which are sequentially connected;
the microprocessor is connected with the flash memory and is used for reading the first variable refresh rate table stored on the flash memory, processing the first variable refresh rate table and storing the first variable refresh rate table in the double-data-rate storage module, detecting the frame rate of the display panel in real time and instructing the double-data-rate storage module to send the processed variable refresh rate table corresponding to the frame rate to the variable refresh rate module.
2. The drive control circuit of claim 1, wherein the microprocessor processing the first variable refresh rate table comprises:
and carrying out linear interpolation on the first variable refresh rate table to obtain a second variable refresh rate table.
3. The driving control circuit according to claim 2, wherein the first variable refresh rate table and the second variable refresh rate table store gray scale values required for each pixel in the display panel, and the number of the second variable refresh rate table is twice as many as the number of the first variable refresh rate table.
4. The drive control circuit of claim 2, wherein the variable refresh rate module further comprises a random access memory configured to receive the second variable refresh rate table.
5. The driving control circuit of claim 1, further comprising a power management integrated circuit, wherein the power management integrated circuit is connected to the flash memory and the timing controller respectively.
6. A control method of a drive control circuit of a display panel according to claim 1, the control method comprising:
the microprocessor reading the first variable refresh rate table stored on the flash memory;
processing the first variable refresh rate table and storing the first variable refresh rate table in the double-data-rate storage module;
the microprocessor detects the frame rate of the display panel in real time;
and instructing the double-data-rate storage module to send a processed variable refresh rate table corresponding to the frame rate to the variable refresh rate module.
7. The method of claim 6, wherein the processing the first variable refresh rate table and storing the processed first variable refresh rate table in the dual data rate memory module further comprises:
and processing the first variable refresh rate table by a linear interpolation method to obtain a second variable refresh rate table.
8. The method according to claim 7, wherein the first variable refresh rate table and the second variable refresh rate table store gray scale values required for each pixel in the display panel, and the number of the second variable refresh rate table is twice the number of the first variable refresh rate tables.
9. The control method of claim 7, wherein the variable refresh rate module further comprises a random access memory configured to receive the second variable refresh rate table.
10. A display device, comprising a display panel and the driving control circuit of any one of claims 1 to 5, wherein the control circuit is connected to the display panel for outputting signals to the display panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010002451.4A CN111048031A (en) | 2020-01-02 | 2020-01-02 | Drive control circuit and control method of display panel and display device |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010002451.4A CN111048031A (en) | 2020-01-02 | 2020-01-02 | Drive control circuit and control method of display panel and display device |
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| CN111048031A true CN111048031A (en) | 2020-04-21 |
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| CN202010002451.4A Pending CN111048031A (en) | 2020-01-02 | 2020-01-02 | Drive control circuit and control method of display panel and display device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111640402A (en) * | 2020-05-26 | 2020-09-08 | Tcl华星光电技术有限公司 | Control method and device of time schedule controller for image processing and storage medium |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105074807A (en) * | 2013-03-13 | 2015-11-18 | 苹果公司 | Compensation methods for display brightness change associated with reduced refresh rate |
| CN107680554A (en) * | 2017-11-22 | 2018-02-09 | 深圳市华星光电技术有限公司 | Display device drive system and method |
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2020
- 2020-01-02 CN CN202010002451.4A patent/CN111048031A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105074807A (en) * | 2013-03-13 | 2015-11-18 | 苹果公司 | Compensation methods for display brightness change associated with reduced refresh rate |
| CN107680554A (en) * | 2017-11-22 | 2018-02-09 | 深圳市华星光电技术有限公司 | Display device drive system and method |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111640402A (en) * | 2020-05-26 | 2020-09-08 | Tcl华星光电技术有限公司 | Control method and device of time schedule controller for image processing and storage medium |
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Application publication date: 20200421 |
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