CN111628072A

CN111628072A - Josephson Array Bias Combination Calculation Method, Electronic Equipment and Medium

Info

Publication number: CN111628072A
Application number: CN202010443109.8A
Authority: CN
Inventors: 赵建亭; 鲁云峰; 富雅琼; 钱璐帅; 屈继峰; 贺青
Original assignee: National Institute of Metrology
Current assignee: National Institute of Metrology
Priority date: 2020-05-22
Filing date: 2020-05-22
Publication date: 2020-09-04
Anticipated expiration: 2040-05-22
Also published as: CN111628072B

Abstract

Disclosed are a Josephson junction array bias combination calculation method, electronic device and medium. The method may include: step 1: calculating the required summed number of Josephson junctions; step 2: grouping the Josephson sub-junctions included in the chip according to the number of junctions, including T group, R group, S group and O group ; Step 3: Decompose the summary number into the sum of n _Tj and n _Oj ; Step 4: Convert n _Tj in p decomposition methods to p bias combinations represented by T groups and R groups of sub-arrays respectively Step 5: Compensate by the quantization error compensation value of the S group to obtain the offset combination with the smallest residual error after compensation; Step 6: Arrange the offset combination in step 5 in the order of the atomic array. The present invention obtains an optimized sub-array bias combination scheme with wide adaptability by automatically grouping sub-arrays and matching redundant or non-redundant approximate calculation, quantization error compensation and other algorithms.

Description

Josephson junction array bias combination calculation method, electronic device and medium

Technical Field

The invention relates to the technical field of metering test, in particular to a Josephson junction array bias combination calculation method, electronic equipment and a medium.

Background

The josephson junctions are superconductor quantum devices designed and manufactured according to the josephson effect, and a plurality of josephson junctions to several tens of thousands of josephson junctions connected in series are manufactured on one chip, namely, a josephson junction array is formed. Under microwave radiation meeting certain conditions, the Josephson junction array can generate voltage under direct current bias current. This voltage has extremely stable and accurate characteristics, so the josephson junction array can be used as a key component of a quantum voltage reference. The Josephson junctions are divided into a plurality of sub-junction arrays on one chip according to different junction numbers, and each sub-junction array is applied with independent current bias respectively, so that the programmable Josephson voltage reference can be realized.

In the design of the sub-junction array junction number of the Josephson quantum voltage reference chip, a binary and ternary junction number design mode is adopted. Because the quantum characteristic of the Josephson junction has three states of positive bias, zero bias and reverse bias, the ternary junction number design is more beneficial to exerting the efficiency of the junction. For example, for generating voltages with a resolution of one in ten thousandth, a binary junction requires 14 sub-junction arrays, while a triple mechanism requires only 10 sub-junction arrays. In order to further balance between the quantum voltage reference chip process and the operation efficiency and balance between the number of the sub-junction arrays and the maximum number of the sub-junction arrays, other design methods are integrated on the basis of the ternary system, and a corresponding offset combination calculation method is designed. For example, in order to reduce the influence on the generated voltage when the individual sub-junction arrays are invalid or reduce the quantization error, the junction number of the partial sub-junction arrays can be designed to be a special junction number so as to improve the adaptability of the chip. The existing Josephson quantum voltage reference driving device cannot automatically adapt to the situation, and the quantization error generated under the condition that an invalid junction array exists is large. If the error exceeds the adjustable range of the microwave frequency, the driving will fail.

Therefore, it is necessary to develop a josephson junction array bias combination calculation method, an electronic device, and a medium.

The information disclosed in this background section is only for enhancement of understanding of the general background of the invention and should not be taken as an acknowledgement or any form of suggestion that this information forms the prior art already known to a person skilled in the art.

Disclosure of Invention

The invention provides a Josephson junction array bias combination calculation method, a device, electronic equipment and a medium, which can automatically group the junction arrays and match with algorithms such as redundant or non-redundant approximate calculation, quantization error compensation and the like, thereby obtaining an optimized junction array bias combination scheme with wide adaptability.

In a first aspect, an embodiment of the present disclosure provides a josephson junction matrix bias combination calculation method, including:

step 1: calculating the summary number n of the needed Josephson junctions;

step 2: grouping Josephson sub-junction arrays contained in a chip according to junction numbers, wherein the joint numbers comprise an ascending ternary T group, a ternary redundant R group, a quantization error compensation S group and a residual effective sub-junction array O group;

and step 3: decomposing the total number n into n_TjAnd n_OjThe sum of the two terms, wherein the decomposition modes are p, n_TjIs a non-negative integer less than the sum of the numbers of the T sets of sub-junction arrays, n_OjIs a non-negative integer represented by a biased combination of O groups of the subjunction arrays;

and 4, step 4: splitting n in p separately_TjConverting into p bias combination forms represented by T group and R group subcode arrays;

and 5: respectively compensating quantization errors generated by the p bias combination forms through the quantization error compensation values of the S group to obtain a bias combination mode with the minimum residual error after compensation;

step 6: and (5) arranging the bias combination modes in the step 5 according to the sequence of the atomic junction array.

Preferably, the number of summaries n of josephson junctions required is calculated by equation (1):

wherein f is the bias microwave frequency, V is the target voltage, K_JFor the Josephson constant, the ROUND () sign represents a rounding operation.

Preferably, the step 2 includes:

step 2-1: calculating the sum of the effective sub-junction arrays N, judging whether N is more than or equal to N, if so, putting all the effective sub-junction arrays into an O group and finishing the step 2, otherwise, entering the step 2-2;

step 2-2: searching and separating out the number of junctions in accordance with n from all the sub-junction arrays_Ti＝n_LSB·3ⁱThe T sub-junction arrays in the form are arranged in ascending order according to the number of junctions to serve as T groups, whether the sub-junction arrays in the T groups are all effective is judged, if yes, the step 2-4 is carried out, and if not, the step 2-3 is carried out;

step 2-3: in the remaining effective sub-junction arrays, it is found whether there is a junction number equal to n_R＝n_T＝n_LSB·∑3ⁱIf so, storing the obtained partial node array into R group, otherwise, continuously searching for the difference value equal to n_RIf the sub-knot array pair is found, the sub-knot array pair is arranged and stored into the R group according to the ascending order of the knot number, if the sub-knot array pair is not found, the R group is kept to be empty, and the step 2-4 is carried out; calculating the total number N of effective sub-junction arrays except the T group and the R group₁Judging whether n is present>N₁+N_TIf yes, all the subconjunctival arrays of the R group are moved into the O group, otherwise, the R group is reserved;

step 2-4: in the remaining effective sub-junction arrays, the search difference is less than n_LSBAnd different sub-junction array pairs store the found sub-junction arrays related to the sub-junction array pairs into the S group;

step 2-5: calculating the summary number N of the remaining effective sub-junction arrays except T, R, S groups₂Judging n>N₂+N_TAnd if the result is positive, all the S group and the rest of the sub-junction arrays are moved into the O group, otherwise, the S group is kept, and the rest of the sub-junction arrays are moved into the O group.

Preferably, the step 3 comprises:

step 3-1: dividing the groups again according to the number of the nodes of the O groups of the sub-node arrays, and putting the sub-node arrays with the same number of nodes into the same group;

step 3-2: calculating equivalent knot numbers which can be realized by the offset combinations in each group to obtain a surplus sub-array combination knot number table;

step 3-3: negative number items are removed from the combined knot number table, and the negative number items are arranged in a descending order and recorded as an optimized combined knot number table;

step 3-4: querying the optimized combined node table to satisfy n-n_Oj+n_Tjand-N_T≤n_Tj≤N_TP n of_OjAnd calculating corresponding n_Tj＝n-n_Oj。

Preferably, the step 4 comprises:

step 4-1: taking the minimum knot number n of the T groups_LSBAs a unit, n_TjAnd n_RRespectively unitized as an integer D₀And R₀Unitizing the knot numbers of all the sub-knot arrays in the T group into a balanced ternary base number array;

step 4-2: checking whether all the T groups are effective sub-junction arrays, if so, taking D₁＝D₀And entering the step 4-7, otherwise entering the step 4-3;

step 4-3: checking whether the R group is empty, if so, respectively calculating D by using a failure sub-junction array approximation algorithm₀Approximation D of₁And entering the step 4-7, otherwise entering the step 4-4;

step 4-4: judging to express n by using T groups of subjunction array offset combinations_TjIf so, entering the step 4-5, otherwise, entering the step 4-7;

and 4-5: judging whether n is represented by the offset combination of the R group and the T group of the sub-junction arrays_TjIf the positive bias or the negative bias invalid sub-junction array is needed, the step 4-6 is carried out, otherwise, the step 4-7 is carried out;

and 4-6: respectively calculating D by failure sub-junction array approximation algorithm₀And

approximation D of₁And D₂Judgment of D₁Is greater or less than

Is closer to D₀If yes, entering step 4-7, otherwise entering step 4-8;

and 4-7: will D₁Converting to balance ternary system, wherein each bit weight in the conversion result is 1 corresponding to positive bias, weight is 0 corresponding to zero bias, weight is-1 corresponding to negative bias, all the R groups of sub-junction arrays are zero-biased, and refreshing n_Tj＝n_LSBD₁Entering the step 4-9;

and 4-8: will D₂Converting into balanced ternary system, wherein the weight of each bit is 1 corresponding to positive bias, the weight is 0 corresponding to zero bias, the weight is-1 corresponding to negative bias, and if only single sub-junction array exists in R group, D is₀To positively bias it, D₀Reverse biasing it negative; if a binodal array exists in the R group, then D₀Positively biasing the larger node and negatively biasing the smaller node, D₀If the current is negative, the current is reversed, and refreshing is carried out

And 4-9: according to n_OjAnd n after refresh_TjAnd calculating the summary number generated by the corresponding bias combination mode.

Preferably, the failing sub-junction matrix approximation algorithm comprises:

taking a calculation object as an input value E₀；

Searching a first section of continuously invalid sub-knot array from a high order in the T group, recording the digits at two ends of the continuously invalid sub-knot array as j and k respectively, and obtaining a base number T according to the balanced ternary base number array_k+1；

Will E₀Decomposed into two integers F₀And G₀In which F is₀Is E₀Integer division radix number T_k+1Quotient of (1), G₀Is E₀Integer division T_k+1The remainder of (1);

judgment G₀If the current time is within the set interval, directly returning to the step E if the current time is within the set interval₁＝E₀And then the process is finished; otherwise, get and G₀The minimum interval end is G₀Approximation G of₁Return to E₁＝F₀T_k+1+G₁And then the process is finished.

Preferably, byFormula (2) calculates integer D₀：

Preferably, the integer R is calculated by formula (3)₀：

As a specific implementation of the embodiments of the present disclosure,

in a second aspect, an embodiment of the present disclosure further provides an electronic device, including:

a memory storing executable instructions;

a processor executing the executable instructions in the memory to implement the Josephson junction matrix bias combining computation method.

In a third aspect, the disclosed embodiments also provide a computer-readable storage medium storing a computer program, which when executed by a processor implements the josephson junction matrix bias combination calculation method.

The method and apparatus of the present invention have other features and advantages which will be apparent from or are set forth in detail in the accompanying drawings and the following detailed description, which are incorporated herein, and which together serve to explain certain principles of the invention.

Drawings

The above and other objects, features and advantages of the present invention will become more apparent by describing in more detail exemplary embodiments thereof with reference to the attached drawings, in which like reference numerals generally represent like parts.

Fig. 1 shows a flow chart of the steps of a josephson junction matrix bias combination calculation method according to the present invention.

Fig. 2 shows a flow chart of step 2 according to the invention.

Fig. 3 shows a flow chart of step 4 according to the invention.

Detailed Description

Preferred embodiments of the present invention will be described in more detail below. While the following describes preferred embodiments of the present invention, it should be understood that the present invention may be embodied in various forms and should not be limited by the embodiments set forth herein.

The invention provides a Josephson junction array bias combination calculation method, which comprises the following steps:

step 1: calculating the required summary number n of the Josephson junctions according to the target voltage and the bias microwave frequency; in one example, the number of summaries n of josephson junctions required is calculated by equation (1):

Fig. 2 shows a flow chart of step 2 according to the invention.

Step 2: grouping Josephson sub-junction arrays contained in a chip according to junction numbers, wherein the joint numbers comprise an ascending ternary T group, a ternary redundant R group, a quantization error compensation S group and a residual effective sub-junction array O group; in one example, step 2 comprises:

step 2-2: searching and separating out the number of junctions in accordance with n from all the sub-junction arrays_Ti＝n_LSB·3ⁱT sub-junction arrays in the form of T groups in ascending order of the number of junctions, where n_LSBIs the least significant of the T groupA bit; judging whether the neutron junction arrays in the T groups are all effective, if so, entering the step 2-4, otherwise, entering the step 2-3;

step 2-3: in the remaining effective sub-junction arrays, it is found whether there is a junction number equal to n_R＝n_T＝n_LSB·Σ3ⁱIf so, storing the obtained partial node array into R group, otherwise, continuously searching for the difference value equal to n_RIf the sub-knot array pair is found, the sub-knot array pair is arranged and stored into the R group according to the ascending order of the knot number, if the sub-knot array pair is not found, the R group is kept to be empty, and the step 2-4 is carried out; calculating the total number N of effective sub-junction arrays except the T group and the R group₁Judging whether n is present>N₁+N_TIf yes, all the subconjunctival arrays of the R group are moved into the O group, otherwise, the R group is reserved;

step 2-4: in the remaining effective sub-junction arrays, the search difference is less than n_LSBAnd different sub-junction array pairs (n)_S1-1，n_S1-2)、(n_S2-1，n_S2-2) … …, storing the found sub-junction arrays related to the sub-junction array pairs into S groups;

And step 3: decomposing the total number n into n_TjAnd n_OjThe sum of the two terms, wherein the decomposition modes are p, n_TjIs a non-negative integer less than the sum of the numbers of the T sets of sub-junction arrays, n_OjIs a non-negative integer represented by a biased combination of O groups of the subjunction arrays; in one example, step 3 comprises:

step 3-1: dividing the groups again according to the number of the nodes of the O groups of the sub-node arrays, putting the sub-node arrays with the same number of the nodes into the same group, and recording the number of the nodes of the single sub-node arrays in each group as n₀、n₁、n_m-1The number of the sub-knot arrays in each group is A₀、A₁、A_m-1；

Step 3-2: the equivalent knots which can be realized by calculating the offset combinations in each group are respectively as follows: -A_l*n_l，-(A_l-1)*n_l，，-n_l，0，n_l，...，(A_l-1)*n_l，A_l*n_lWhere l is 0,1,2, 1, m-1, the number of knots which may be produced in each subgroup being combined with one another to obtain

Combining the item remaining sub-arrays into a combined number table;

step 3-3: removing negative number items from the combined knot number table, if items with equal knot numbers exist, only keeping one item with the least number of positive bias/negative bias sub knot arrays, and recording the item as an optimized combined knot number table in descending order;

Fig. 3 shows a flow chart of step 4 according to the invention.

And 4, step 4: splitting n in p separately_TjConverting into p bias combination forms represented by T group and R group subcode arrays; in one example, step 4 comprises:

step 4-1: taking the minimum knot number n of the T groups_LSBAs a unit, n_TjAnd n_RRespectively unitized as an integer D₀And R₀The node numbers of all the sub-node arrays in the T group are unitized into a balanced ternary base number array (1, 3.., 3.)^t-1)；

step 4-4: judging to express n by using T groups of subjunction array offset combinations_TjWhether forward or reverse bias of the non-effective sub-junction array is required, i.e. D₀After the conversion into the balanced ternary form, whether the corresponding bit of the invalid sub-junction array in the T group has a non-zero weight value or not is judged, if so, the step is carried outStep 4-5, otherwise, entering step 4-7;

and 4-5: judging whether n is represented by the offset combination of the R group and the T group of the sub-junction arrays_TjWhether forward or reverse biased nulling sub-junction arrays are required, i.e.

(D₀Is the first item plus or minus, the second item plus or minus, D₀Negative or negative) is converted into a balanced ternary form, whether the bit corresponding to the invalid sub-junction array in the T group has a non-zero weight value or not is judged, if yes, the step 4-6 is carried out, and if not, the step 4-7 is carried out;

approximation D of₁And D₂Judgment of D₁Is greater or less than

Is closer to D₀If yes, entering step 4-7, otherwise entering step 4-8;

In one example, the failing sub-array approximation algorithm comprises:

taking a calculation object as an input value E₀Taking 4-6 steps as an example, D is calculated₀When E is₀Is equal to D₀Calculating

When E is₀Is equal to

Searching a first section of continuously invalid sub-knot array from a high order in the T group, recording digits at two ends of the continuously invalid sub-knot array as j and k respectively, and obtaining a base number T according to a balanced ternary base number array_k+1；

In one example, integer D is calculated by equation (2)₀：

In one example, the integer R is calculated by equation (3)₀：

And 5: respectively compensating quantization errors generated by the p bias combination forms through the quantization error compensation values of the S group to obtain a bias combination mode with the minimum residual error after compensation; calculating quantization errors generated in a bias combination mode according to the summary numbers generated in the bias combination mode, combining the S groups of the node arrays pairwise, wherein the difference of the two node numbers in each combination is a quantization error compensation value, wherein a positive compensation value is obtained by reducing the sum of the two node numbers, and a negative compensation value is obtained by reducing the sum of the two node numbers; and adding all the quantization error compensation values obtained by the S group with the quantization errors generated by the p types of offset combination forms, and selecting the mode with the minimum residual error after compensation.

Step 6: and (5) arranging the bias combination modes in the step 5 according to the sequence of the atomic junction array, namely the bias combination used for biasing the quantum voltage chip by the programmable Josephson voltage reference system. After the offset calculation is completed, the voltage generated by the offset combination is calculated according to the result as follows:

the present invention also provides an electronic device, comprising: a memory storing executable instructions; and the processor executes executable instructions in the memory to realize the Josephson junction matrix bias combination calculation method.

The present invention also provides a computer readable storage medium storing a computer program which, when executed by a processor, implements the josephson junction matrix bias combining computation method described above.

To facilitate understanding of the solution of the embodiments of the present invention and the effects thereof, three specific application examples are given below. It will be understood by those skilled in the art that this example is merely for the purpose of facilitating an understanding of the present invention and that any specific details thereof are not intended to limit the invention in any way.

Example 1

The chip comprises 23 total numbers of the sub-junction arrays, and the number of the junctions is shown in table 1.

TABLE 1

Among them, the J4 (node number 54) and J5 (node number 162) sub-node arrays are invalid, i.e., cannot be forward biased or reverse biased.

Target voltage V5.000000V, bias microwave frequency f 18.5GHz, josephson constant K_J＝483597.9GHz/V。

Step 1: computing

Step 2:

step 2-1: the sum of the number N of valid ones of the 23 sub-node arrays is calculated to be 223056, and N is judged not to be equal to N, so the next step is continued.

Step 2-2: searching and separating out the node number corresponding to n from all (including valid and invalid) sub-node arrays_Ti＝n_LSB·3ⁱT sets of partial junction arrays in the form of (where i is 0,1, 2.., T-1) are arranged in ascending order of the number of junctions as T sets, and the T sets of partial junction arrays are shown in table 2.

TABLE 2

Least significant bit n of T group_LSBSince J4 is invalid in group T, step 2-3 is continued;

step 2-3: in the remaining active sub-junction array, find out whether there is n_R＝n_LSB·Σ3ⁱFinding out whether the result is negative or not according to the sub-node array with 6558 node numbers; continue to find a difference equal to n_RThe finding result shows that the end difference values of the J19 and J7 sub-junction arrays meet the condition, the end difference values are put into R groups in ascending order, and then the R groups of sub-junction arrays are shown in the table 3.

TABLE 3

Calculating the total number N of effective sub-junction arrays except the T group and the R group₁When n is 193140, judge>N₁+N_TInstead, the R groups were determined to be J7 and J19 as described above.

Step 2-4: in the remaining effective bytes, the search difference is less than n_LSBAs for the 6 and different sub-junction array pairs, the difference between the sub-junction array pairs consisting of J8 and J9 is ± 2, and the difference between the sub-junction array pairs consisting of J8 and J10 is ± 4, so that the S groups are shown in table 4.

TABLE 4

Step 2-5:

calculating the summary number N of the remaining effective sub-junction arrays except T, R, S groups₂When n is 167946, judge>N₂+N_TIf it is determined that the S group determined in the previous step is not established, and the rest of the sub-junction arrays are shifted into the O group, the O group is shown in Table 5.

TABLE 5

And step 3:

step 3-1: and (4) dividing the O groups of the subjunction arrays into subgroups again according to the number of the nodes, and putting the subjunction arrays with the same number of the nodes into the same subgroup, wherein the number of the subgroups is 2.

In subgroup 1, the number of single subconjunctions was 16800 and the number of subconjunctions was 9, as shown in Table 6.

TABLE 6

In subgroup 2, the number of single subconjunctions 8400 and the number of subconjunctions 2 are shown in Table 7.

TABLE 7

Step 3-2: the equivalent junction numbers that can be generated under the bias combination (including forward bias, zero bias and reverse bias) of the computing group 1 are as follows: -151200, -134400, -117600, -100800, -84000, -67200, -50400, -3320016800,0,16800,33200,50400,67200,84000,100800,117600,134400, 151200; the equivalent junction numbers that can be generated under the bias combination (including forward bias, zero bias and reverse bias) of the computing group 2 are: -16800, -8400,0,8400,16800. Combining the possible knots of each subgroup to obtain

The entry remaining sub-arrays combine the table of counts as shown in table 8.

TABLE 8

Step 3-3: and (3) removing negative number items from the combined knot number table, if the items with equal knot numbers exist, only keeping one item with the least number of positive bias/negative bias sub knot arrays, and recording the item in descending order as an optimized combined knot number table as shown in table 9.

TABLE 9

Step 3-4: in table 9, the query is satisfied with n-130702-n_Oj+n_TjAnd-6558. ltoreq. n_TjQ n of 6558(j 0,1, q-1) or less_OjAnd calculating corresponding n_Tj＝n-n_OjTable 10 was obtained.

Watch 10

The O-set offset case corresponding to the sequence number j being 0 is table 11.

TABLE 11

The O-set offset case with the index j equal to 1 is table 12.

TABLE 12

Step 4

Because two groups of n are obtained in the last step_TjAnd n_OjThus, steps 4-1 to 4-9 should be performed for two rounds.

The first round first processes the decimal number-3698 by 4-1 to 4-9.

Step 4-1: taking the minimum number of knots (i.e. first elements) n of the T groups_LSBN is expressed in 6 units by formula (2) and formula (3), respectively_TjAnd n_RWith a unit of D₀And R₀。

The number of junctions of all the sub-junction arrays in the T group is unitized into a balanced ternary radix array (1,3, 9, 27, 81, 243, 729).

Step 4-2: the J4 and J5 sub-junction arrays in the T group are checked as invalid sub-junction arrays, and therefore the next step is continued.

Step 4-3: check that the R group has 2 subcontent arrays not empty, so proceed to the next step.

Step 4-4: will D₀Convert-616 to balanced ternary form as table 13.

Watch 13

It can be seen that the invalid J4 sub-junction array (corresponding to bit2 bits) and J5 sub-junction array (corresponding to bit3 bits) need to be biased positive, so the next step is continued.

And 4-5: due to D₀Is a negative number, calculating R₀+D₀1093+ (-616) 477, which is converted to the balanced ternary form as table 14.

TABLE 14

It can be seen that the invalid J4 subcolumn (corresponding to bit2 bits) needs to be reverse biased, so the next step is continued.

And 4-6: first, calculate an approximation of-616 using the failing sub-lattice approximation algorithm:

the number of digits j equals 2 and k equals 3 at two ends of the continuous invalid sub-junction array in the T group, and the base number of each digit is shown in a table 15.

Watch 15

Decompose-616 into two integers F₀And G₀In which F is₀Divide the radix T by-616_k+1Quotient-8, G of 81₀Is E₀Integer division T_k+1The remainder of (2).

Setting the calculation section includes: interval 1: [ -80, -77]And the interval 2: [ -4,4]And interval 3: [77,80]. The remainder 32 is not within the three ranges, so the end point value 4 of the range closest to it is taken as G₁Calculate E₁＝F₀T₄+G₁-8 × 81+32 ═ 644, so D₁＝E₁＝-644。

Then calculating 477 approximate value D by failure sub-knot array approximate algorithm₂＝482。

Calculating | D₁-D₀|＝28，|-R₀+D₂-D₀(ii) | 5, judge ± R₀+D₂Is closer to D₀And skipping to the step 4-8.

Steps 4-7 are skipped in this embodiment.

And 4-8: will D₂Transition to balanced ternary results are in table 16.

TABLE 16

Thus, T sets of bias combinations are obtained as table 17.

TABLE 17

If there is a binodal array in the R group, and D₀Negative, left shift results in R bias combinations for Table 18.

Watch 18

Refreshing

And 4-9: according to n_OjAnd n after refresh_TjCalculating the total number of the corresponding offset combination mode as n_T0+n_O0＝-3666+134400＝130734。

The second round again 4702 is processed according to steps 4-1 to 4-9

Step 4-4: will D₀783 is converted to balanced ternary form as table 19.

Watch 19

And 4-5: due to D₀Is a negative number, calculating R₀-D₀＝1093-783＝310

It is converted into a balanced ternary form as table 20.

Watch 20

It can be seen that the ineffective J4 subjunction array and J5 subjunction array need to be reversely biased, so that the next step is continued.

And 4-6: first, an approximation of 783 is calculated using a failing sub-lattice approximation algorithm:

the number of bits j equals 2 and k equals 3 at both ends of the consecutive invalid subjunction array in the T group, and the base number of each bit is table 21.

TABLE 21

Decompose-616 into two integers F₀And G₀In which F is₀Dividing the base number T for 783_k+1Quotient 9, G of 81₀Is E₀Integer division T_k+1The remainder 54 of the sequence. The remainder 54 is not within three intervals, so the closest endpoint 77 is taken as G₁CalculatingE₁＝F₀T₄+G₁9 × 81+54 is 806, so D₁＝E₁＝806。

An approximation D of 310 is calculated using the failing sub-lattice approximation algorithm₂＝320。

Calculating | D₁-D₀|＝23，|R₀-D₂-D₀(ii) | 10, judge R₀-D₂Is closer to D₀And skipping to the step 4-8.

Steps 4-7 are skipped in this embodiment.

And 4-8: will D₂Transition to balanced ternary results are in table 22.

TABLE 22

Thus, T sets of bias combinations are obtained as table 23.

TABLE 23

If there is a binodal array in the R group, and D₀Negative, left shift results in R bias combinations to Table 24.

Watch 24

Refreshing

And 4-9: according to n_OjAnd n after refresh_TjCalculating the total number of the corresponding offset combination mode as n_T1+n_O1＝4638+126000＝130638。

And 5: the quantization errors of the two combinations are respectively delta₁-32 and Δ r-130734-130702 |130734-n | >₂＝|130638-n|＝|130638-130702|＝64。

The number of knots that can be used to compensate for quantization error is + -2 and + -4, respectively, depending on the S set of conditions, it can be seen that matching the first combination with-4 results in the combination with the smallest total error, when the S set of bias conditions is shown in Table 25.

TABLE 25

Step 6: the T, R, S, O four sets of biases were rearranged in the order of the atomic junction array to obtain table 26.

Watch 26

And after the offset calculation is completed, the result can be used as an offset combination of the programmable Josephson voltage reference system for biasing the quantum voltage chip. The equivalent junction number of the bias combination is 130730, the generated voltage is

This voltage is the optimal (closest) solution to the target voltage of 5.000V generated with the chip at the specified frequency of 18.5GHz, with the J4 and J5 sub-junction arrays disabled.

Example 2

The present disclosure provides an electronic device including: a memory storing executable instructions; and the processor executes executable instructions in the memory to realize the Josephson junction matrix bias combination calculation method.

An electronic device according to an embodiment of the present disclosure includes a memory and a processor.

The memory is to store non-transitory computer readable instructions. In particular, the memory may include one or more computer program products that may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. The volatile memory may include, for example, Random Access Memory (RAM), cache memory (cache), and/or the like. The non-volatile memory may include, for example, Read Only Memory (ROM), hard disk, flash memory, etc.

The processor may be a Central Processing Unit (CPU) or other form of processing unit having data processing capabilities and/or instruction execution capabilities, and may control other components in the electronic device to perform desired functions. In one embodiment of the disclosure, the processor is configured to execute the computer readable instructions stored in the memory.

Those skilled in the art should understand that, in order to solve the technical problem of how to obtain a good user experience, the present embodiment may also include well-known structures such as a communication bus, an interface, and the like, and these well-known structures should also be included in the protection scope of the present disclosure.

For the detailed description of the present embodiment, reference may be made to the corresponding descriptions in the foregoing embodiments, which are not repeated herein.

Example 3

The disclosed embodiments provide a computer readable storage medium storing a computer program which, when executed by a processor, implements the josephson junction matrix bias combination calculation method.

A computer-readable storage medium according to an embodiment of the present disclosure has non-transitory computer-readable instructions stored thereon. The non-transitory computer readable instructions, when executed by a processor, perform all or a portion of the steps of the methods of the embodiments of the disclosure previously described.

The computer-readable storage media include, but are not limited to: optical storage media (e.g., CD-ROMs and DVDs), magneto-optical storage media (e.g., MOs), magnetic storage media (e.g., magnetic tapes or removable disks), media with built-in rewritable non-volatile memory (e.g., memory cards), and media with built-in ROMs (e.g., ROM cartridges).

It will be appreciated by persons skilled in the art that the above description of embodiments of the invention is intended only to illustrate the benefits of embodiments of the invention and is not intended to limit embodiments of the invention to any examples given.

Having described embodiments of the present invention, the foregoing description is intended to be exemplary, not exhaustive, and not limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments.

Claims

1. a Josephson formation offset combination calculation method, is characterized in that, comprises:

Step 1: Calculate the required summation number n of Josephson junctions;

Step 2: Group the Josephson sub-arrays included in the chip according to the number of nodes, including the ascending ternary T group, the ternary redundancy R group, the quantization error compensation S group and the remaining valid sub-array O group;

Step 3: Decompose the summation number n into the sum of n _Tj and n _Oj , where the decomposition method is p, n _Tj is a non-negative integer less than the sum of the number of sub-junctions in T groups, and n _Oj is the use of O A non-negative integer represented by the offset combination of the sub-array;

Step 4: Convert the n _Tj in the p decomposition methods to the p offset combination forms represented by the T group and the R group sub-array respectively;

Step 5: Compensate the quantization errors generated by the p types of offset combinations through the quantization error compensation values of the S groups, and obtain the offset combination method with the smallest residual error after compensation;

Step 6: Arrange the bias combinations in Step 5 in the order of atomic arrays.

2. The method for calculating the offset combination of a Josephson junction array according to claim 1, wherein the summation number n of the required Josephson junction is calculated by formula (1):

Among them, f is the bias microwave frequency, V is the target voltage, K _J is the Josephson constant, and the ROUND() symbol represents the rounding operation.

3. The method for calculating the offset combination of Josephson junction arrays according to claim 1, wherein the step 2 comprises:

Step 2-1: Calculate the summary number N of valid sub-arrays, and judge whether n≥N is true. If yes, put all valid sub-arrays into O group and end step 2, otherwise go to step 2-2;

Step 2-2: Find and separate t sub-junction arrays with the number of nodes in the form of n _Ti = n _LSB · 3 ⁱ from all the sub-junction arrays, and arrange them in ascending order of the number of nodes as T groups, and judge the neutron sub-junctions in the T group If all are valid, go to step 2-4, otherwise go to step 2-3;

Step 2-3: In the remaining valid sub-junction matrix, find out whether there is a sub-junction matrix with the number of nodes equal to n _R =n _T =n _LSB · ^∑3i , if yes, store it in the R group, otherwise continue to search for the difference. The sub-knot matrix pair whose value is equal to n _R , if found, will be stored in the R group in ascending order of the knot number, if not found, keep the R group empty and go to step 2-4; calculate except for T group and R group The summed number of valid sub-arrays N ₁ , judge whether n>N ₁ + _NT , if yes, move all sub-arrays of R group into O group, otherwise keep R group;

Step 2-4: In the remaining valid sub-junction arrays, find the sub-junction array pairs whose difference is less than n _LSB and are different from each other, and store the sub-junction arrays involved in the found sub-junction array pairs into S group;

Step 2-5: Calculate the summary number N ₂ of the remaining valid sub-arrays except for T, R, and S groups, and judge whether n>N ₂ +N _T is true. If yes, move the S group and the remaining sub-arrays to the O group. , otherwise keep the S group, and the remaining sub-arrays are moved into the O group.

4. The method for calculating the offset combination of Josephson junction arrays according to claim 1, wherein the step 3 comprises:

Step 3-1: Divide into groups again according to the number of knots in the O group of sub-groups, and put the sub-groups with the same number of knots into the same group;

Step 3-2: Calculate the equivalent number of knots that can be achieved by the offset combination in each group, and obtain the table of the number of knots of the remaining sub-group combinations;

Step 3-3: Remove negative items from the combined knot number table, and record them in descending order as the optimized combined knot number table;

Step 3-4: Query p n _Oj that satisfy n=n _Oj +n _Tj and -NT _{≤n Tj} _≤NT _in the optimized combination knot number table, and calculate the corresponding n _Tj =nn _Oj .

5. The method for calculating the offset combination of Josephson junction arrays according to claim 1, wherein the step 4 comprises:

Step 4-1: Take the minimum number of nodes n _LSB in group T as the unit, unitize n _Tj and n _R into integers D ₀ and R ₀ respectively, and unitize the number of nodes in all sub-node matrices in group T as balanced three. radix array;

Step 4-2: Check whether all the sub-arrays in the T group are valid sub-arrays, if yes, take D ₁ =D ₀ and go to Step 4-7, otherwise go to Step 4-3;

Step 4-3: Check whether the R group is empty, if yes, use the invalid sub-array approximation algorithm to calculate the approximate value D ₁ of D ₀ and go to step 4-7, otherwise go to step 4-4;

Step 4-4: Determine whether forward bias or reverse bias null sub-array is required when using T groups of sub-array bias combinations to represent n _Tj , if yes, go to step 4-5, otherwise go to step 4-7;

Step 4-5: Determine whether n _Tj needs to be forward biased or reverse biased and null sub-arrays are represented by the combination of R group and T group sub-array biases, if yes, go to step 4-6, otherwise go to step 4-7;

Steps 4-6: Calculate D ₀ and

Approximate values of D ₁ and D ₂ , judge whether D ₁ is larger than

It is closer to D ₀ , if yes, go to step 4-7, otherwise go to step 4-8;

Step 4-7: Convert D ₁ to balanced ternary. In the conversion result, each weight value of 1 corresponds to the positive bias, the weight value of 0 corresponds to the zero bias, the weight value of -1 corresponds to the reverse bias, and the sub-arrays of the R group are all formed Zero offset, refresh n _Tj =n _LSB D ₁ , go to step 4-9;

Step 4-8: Convert D ₂ to balanced ternary. In the result, each weight value of 1 corresponds to the positive bias, the weight value of 0 corresponds to the zero bias, and the weight value of -1 corresponds to the reverse bias. If there is only a single node in the R group array, then D ₀ is positive to bias it, and D ₀ is negative to reverse it; if there is a twin formation in the R group, then D ₀ is positive. D ₀ is negative, otherwise, refresh

Step 4-9: Calculate the summary number generated by the corresponding offset combination according to n _Oj and refreshed n _Tj .

6. The method for calculating the offset combination of Josephson junction arrays according to claim 5, wherein the failure sub-junction array approximation algorithm comprises:

Taking the calculation object as the input value E ₀ ;

Search the first segment of consecutive invalid sub-arrays from the high position in the T group, denote the number of digits at both ends of the continuous invalid sub-array as j and k respectively, and obtain the cardinality T _k+1 according to the balanced ternary cardinality array ;

Decompose E ₀ into two integers F ₀ and G ₀ , where F ₀ is the quotient of E ₀ 's divisible base T _k+1 , and G ₀ is the remainder of E ₀ 's divisible T _k+1 ;

Judging whether G ₀ is within the set interval, if yes, directly return E ₁ =E ₀ and end; otherwise, take the interval endpoint with the smallest distance from G ₀ as the approximate value G ₁ of G ₀ , and return E ₁ =F ₀ T _k+1 +G ₁ and end.

7. The method for calculating the offset combination of Josephson junction arrays according to claim 5, wherein the integer D ₀ is calculated by formula (2):

8. The method for calculating the offset combination of Josephson junction arrays according to claim 5, wherein the integer R ₀ is calculated by formula (3):

9. An electronic device, characterized in that the electronic device comprises:

memory, storing executable instructions;

A processor, wherein the processor executes the executable instructions in the memory to implement the method for calculating a Josephson array bias combination according to any one of claims 1-8.

10. A computer-readable storage medium, characterized in that, the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the Josephson formation according to any one of claims 1-8 is realized Offset combination calculation method.