CN111613165A

CN111613165A - Method and electronic device for displaying image in multi-display driving circuit system

Info

Publication number: CN111613165A
Application number: CN201910837787.XA
Authority: CN
Inventors: 韦育伦; 王琨; 王安立; 汪亮; 朱家庆
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2019-02-23
Filing date: 2019-09-05
Publication date: 2020-09-01
Anticipated expiration: 2039-09-05
Also published as: CN111613165B

Abstract

The application provides an electronic device and a method of displaying an image in a multi-display driving circuit system. The main controller splits the image to be displayed into at least two sub-images, and each sub-image and the adjacent sub-image thereof comprise at least one column of overlapped image pixels. The main controller sends the at least two sub-images to the at least two display driving circuits, so that the at least two display driving circuits can drive the display screen together to display the image to be displayed in an SPR mode. Or the main controller outputs at least two sub-images in the rendered SPR pixel format to at least two display driving circuits, so that the at least two display driving circuits can drive the display screen to display the image to be displayed in an SPR mode. The multiple display driving circuits do not need to establish a data channel to share pixel data, so that the problems of EPC area growth, EMI, ESD and the like can be avoided.

Description

Method and electronic device for displaying image in multi-display driving circuit system

This application claims priority from the national intellectual property office, PCT international patent application No. PCT/CN2019/075982, entitled "Method for cassette Driving System with Sub Pixel retrieving Electronic Device", filed on 23.02/2019, the entire contents of which are incorporated herein by reference.

Technical Field

The present application relates to the field of image display, and more particularly, to a method and an electronic device for displaying an image in a multi-display driving circuit system.

Background

Digital images typically include a number of image pixels, each image pixel containing a finite number of discrete color components. A conventional image pixel is composed of three color components, red (red), green (green), and blue (blue). The digital image can be displayed on the display screen by driving a plurality of screen pixels arranged in an array on the display screen according to the digital image.

When displaying according to the conventional sub-pixel driving method, one screen pixel includes three sub-pixels of red, green and blue, each of which is used for displaying one color component of an image pixel. In order to increase the resolution of the display screen, the number of screen pixels needs to be increased. However, in the design of the screen pixel circuit, the placement area of a single screen pixel in the active area of the panel is limited, and after the number of the screen pixels reaches a certain degree, the number of the screen pixels is difficult to increase, and the resolution of the display screen is difficult to improve continuously. For this purpose, a sub-pixel rendering (SPR) algorithm is proposed. In the SPR algorithm, three color components of an image pixel are displayed by one SPR pixel having fewer sub-pixels on the screen, but the same visual effect as three sub-pixels of a conventional screen pixel can be achieved. Currently, one SPR pixel includes two sub-pixels.

The basic principle of the SPR algorithm is to calculate pixel data of a target SPR pixel by referring to pixel data of nearby SPR pixels, for example, pixel data of upper, lower, left, and right SPR pixels. However, in a system including two display driving circuits (hereinafter, referred to simply as a dual display driving circuit system), the main controller divides an image into two and transmits the divided images to the two display driving circuits, respectively. The two display driving circuits must share pixel data to complete the rendering of the image according to the SPR algorithm. In order to realize sharing of pixel data between two display driving circuits, a data channel (i.e., an interface) is built between the two display driving circuits, and the data channel is specially used for exchanging pixel data between the two display driving circuits.

However, in order to build up a data channel, the area of the display driving circuit needs to be increased, so that the area of a Flexible Printed Circuit (FPC) is increased. In addition, building a data channel between the two display driving circuits inevitably brings problems of electromagnetic interference (EMI), electrostatic discharge (ESD), and the like between the two display driving circuits.

Disclosure of Invention

The application provides an electronic device and a method for displaying images in a system of multi-display driving circuits, which can avoid the problems of FPC area increase, EMI and ESD when the system of multi-display driving circuits displays images.

In a first aspect, the present application provides an electronic device comprising a main controller, a display screen, and at least two display driving circuits driving the display screen to display an image, wherein,

the main controller is used for splitting an image to be displayed into at least two sub-images in a non-sub-pixel rendering SPR pixel format and sending the at least two sub-images to the at least two display driving circuits, wherein each sub-image and adjacent sub-images comprise at least one column of overlapped image pixels;

each display driving circuit of the at least two display driving circuits is configured to receive one sub-image of the at least two sub-images from the main controller, and drive the display screen to display a part of the image to be displayed in an SPR manner according to the pixel data of the non-SPR pixel format of the one sub-image, where the at least two display driving circuits drive each part displayed by the display screen to jointly present the image to be displayed.

It should be understood that the system of multiple display driving circuits is a system including multiple display driving circuits. The multi-display driving circuit system may include two or more display driving circuits.

In the technical scheme of the application, a main controller in the electronic device splits an image to be displayed into at least two sub-images, wherein each sub-image comprises one or more columns of image pixels which are located at the boundary of the sub-image and adjacent to the sub-image and belong to the adjacent sub-image. The main controller sends the at least two sub-images to at least two display driving circuits of the multi-display driving circuitry. Because each sub-image received by each display driving circuit contains one or more columns of image pixels which are at the boundary of the sub-image and adjacent to the sub-image and belong to the adjacent sub-image, each display driving circuit can drive the display screen to display the sub-image in an SPR mode based on the principle of SPR technology according to the non-SPR pixels contained in the received sub-image. Each display driving circuit of the at least two display driving circuits drives the display screen to display a part of the image to be displayed, so that the parts displayed by the display screen driven by the at least two display driving circuits jointly present the image to be displayed. Therefore, the display driving circuits in the multi-display driving circuit system can display images without establishing data channels, so that the problems of FPC area increase, EMI, ESD and the like caused by establishing the data channels are avoided.

With reference to the first aspect, in certain implementation manners of the first aspect, the electronic device specifically includes a first display driving circuit and a second display driving circuit, where the main controller is configured to split the image to be displayed into a first sub-image and a second sub-image in a non-SPR pixel format, send the first sub-image to the first display driving circuit, and send the second sub-image to the second display driving circuit, where the first sub-image and the second sub-image include at least one column of overlapped image pixels;

the first display driving circuit is used for driving the display screen to display a part of the image to be displayed in an SPR mode according to the pixel data of the first sub-image in the non-SPR pixel format;

and the second display driving circuit is used for driving the display screen to display the other part of the image to be displayed in the SPR mode according to the pixel data of the non-SPR pixel format of the second sub-image.

With reference to the first aspect, in certain implementations of the first aspect, the first sub-image and the second sub-image include at least one column of overlapping image pixels, including: the first sub-image comprises image pixels with a column range of [1, M + N ]₁]The second sub-image comprises image pixels with a column range of [ M-N₂,Z]Wherein Z is the total column number of image pixels included in the image to be displayed, and Z, M, N₁And N₂Are all positive integers, 1<M<Z,Z>1。

In one implementation, N₁＝N₂It means that the number of columns of image pixels of the second sub-image adjacent to the first sub-image included in the first sub-image is equal to the number of columns of image pixels of the first sub-image adjacent to the second sub-image included in the second sub-image.

Alternatively, M ═ Z/2, meaning that the two display drivers each drive half of the display screen to display the image to be displayed.

In certain implementations of the first aspect, N-8 or 16.

In a second aspect, another electronic device is provided, which includes a main controller, a display screen, and at least two display driving circuits, wherein the main controller is configured to generate at least two sub-images in an SPR pixel format according to non-SPR pixel format pixel data of an image to be displayed, and send the at least two sub-images to the at least two display driving circuits;

and each display driving circuit of the at least two display driving circuits is used for receiving one sub-image of the at least two sub-images from the main controller and driving the display screen to display a part of the image to be displayed in an SPR mode, wherein the at least two display driving circuits drive each part displayed by the display screen to jointly present the image to be displayed.

In the technical solution of the present application, a main controller in an electronic device outputs a rendered sub-image (that is, a sub-image in an SPR pixel format) to each display driving circuit in a multi-display driving circuit system, so that each display driving circuit can directly drive a display screen to display the received sub-image in an SPR mode according to pixel data in the SPR pixel format of the received sub-image. Each display driving circuit in the multi-display driving circuit system drives the display screen to display a sub-image, so that the sub-images displayed by the display screen are driven by the at least two display driving circuits to jointly present an image to be displayed. Therefore, the display driving circuits in the multi-display driving circuit system can display images without establishing data channels, so that the problems of FPC area increase, EMI, ESD and the like caused by establishing the data channels are avoided.

With reference to the second aspect, in certain implementation manners of the second aspect, the electronic device includes a first display driving circuit and a second display driving circuit, where the main controller is configured to generate a third sub-image and a fourth sub-image in a non-SPR pixel format of an image to be displayed according to pixel data in the SPR pixel format, send the third sub-image to the first display driving circuit, and send the fourth sub-image to the second display driving circuit;

the first display driving circuit is used for driving the display screen to display the third sub-image in an SPR mode;

and the second display driving circuit is used for driving the display screen to display the fourth sub-image in an SPR mode.

In a third aspect, the present application provides a method of displaying an image in multi-display driving circuitry comprising a main controller, a display screen and at least two display driving circuits, the method comprising: the main controller divides an image to be displayed into at least two sub-images in a non-sub-pixel rendering SPR pixel format, and sends the at least two sub-images to the at least two display driving circuits, wherein each sub-image and adjacent sub-images comprise at least one column of overlapped image pixels; each display driving circuit of the at least two display driving circuits receives one sub-image of the at least two sub-images from the main controller, and drives the display screen to display a part of the image to be displayed in an SPR mode according to pixel data of a non-SPR pixel format of the one sub-image, wherein the at least two display driving circuits drive each part displayed by the display screen to jointly present the image to be displayed.

It should be understood that the method for displaying an image in a multi-display driving circuit system of the third aspect and the electronic device of the first aspect are based on the same inventive concept, and therefore, the advantageous technical effects that can be achieved by the technical solution of the third aspect may refer to the description of the first aspect, and are not described again.

With reference to the third aspect, in some implementations of the third aspect, the multi-display driving circuitry includes a first display driving circuit and a second display driving circuit, where the main controller splits an image to be displayed into at least two sub-images in a non-SPR pixel format, and sends the at least two sub-images to the at least two display driving circuits, including:

the main controller splits the image to be displayed into a first sub-image and a second sub-image in a non-SPR pixel format, sends the first sub-image to the first display driving circuit, and sends the second sub-image to the second display driving circuit, wherein the first sub-image and the second sub-image comprise at least one column of overlapped image pixels;

each of the at least two display driving circuits receives one sub-image of the at least two sub-images from the main controller, and drives the display screen to display a part of the image to be displayed in an SPR manner according to the pixel data of the non-SPR pixel format of the one sub-image, including:

the first display driving circuit drives the display screen to display a part of the image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image;

and the second display driving circuit drives the display screen to display the other part of the image to be displayed in the SPR mode according to the pixel data of the non-SPR pixel format of the second sub-image.

With reference to the third aspect, in certain implementations of the third aspect, the first sub-image and the second sub-image include at least one column of overlapping image pixels, including: the first sub-image comprises image pixels with a column range of [1, M + N ]₁]The second sub-image comprises image pixels with a column range of [ M-N₂,Z]Wherein Z is the total column number of image pixels included in the image to be displayed, and Z, M, N₁And N₂Are all positive integers, 1<M<Z,Z>1。

With reference to the third aspect, in certain implementations of the third aspect, N₁＝N₂。

In a fourth aspect, the present application provides a method of displaying an image in multi-display driving circuitry comprising a main controller, a display screen, and at least two display driving circuits, the method comprising: the main controller generates at least two sub-images in an SPR pixel format according to pixel data in a non-SPR pixel format of an image to be displayed, and sends the at least two sub-images to the at least two display driving circuits; and each display driving circuit of the at least two display driving circuits receives one sub-image of the at least two sub-images from the main controller and drives the display screen to display a part of the image to be displayed in an SPR mode, wherein the at least two display driving circuits drive all parts displayed by the display screen to jointly present the image to be displayed.

It should be understood that the method for displaying an image in a multi-display driving circuit system according to the fourth aspect and the electronic device according to the second aspect are based on the same inventive concept, and therefore, the technical solution of the fourth aspect can obtain beneficial technical effects, and reference may be made to the description of the second aspect, and no further description is given.

With reference to the fourth aspect, in some implementation manners of the fourth aspect, the multi-display driving circuit system includes a first display driving circuit and a second display driving circuit, wherein the main controller generates a third sub-image and a fourth sub-image in an SPR pixel format according to pixel data of the image to be displayed, the pixel data being in a non-SPR pixel format, sends the third sub-image to the first display driving circuit, and sends the fourth sub-image to the second display driving circuit; the first display driving circuit drives the display screen to display the third sub-image in an SPR mode according to the pixel data of the SPR pixel format of the third sub-image; and the second display driving circuit drives the display screen to display the fourth sub-image in the SPR mode according to the pixel data of the SPR pixel format of the fourth sub-image.

In a fifth aspect, the present application provides circuitry comprising one or more processors. The one or more processors are configured to read and execute the computer program stored in the memory to perform the method of the third aspect or any possible implementation thereof, or to perform the method of the fourth aspect or any possible implementation thereof.

Alternatively, the memory may be external to the circuitry or integrated within the circuitry.

Optionally, the memory may be one or more.

Further optionally, the circuitry further comprises one or more communication interfaces.

In a sixth aspect, the present application provides a computer-readable storage medium having stored thereon computer instructions which, when executed on a computer, cause the computer to perform the method of the third aspect or any possible implementation thereof, or perform the method of the fourth aspect or any possible implementation thereof.

In a seventh aspect, the present application provides a computer program product comprising computer program code to, when run on a computer, cause the computer to perform a method of, or perform a method of, the third aspect or any possible implementation thereof.

Drawings

Fig. 1 is a schematic diagram of an RGB pixel.

Fig. 2 shows an example of arrangement of SPR pixels.

Fig. 3 is a schematic block diagram of a system 100 of dual display driver circuits.

Fig. 4 is a schematic diagram of pixel data that needs to be shared between a first image and a second image.

Fig. 5 is a schematic diagram of pixel data sharing between two display driving circuits.

Fig. 6 is a schematic structural diagram of an electronic device 7000 provided in the present application.

Fig. 7 is an example of a method of displaying an image in a multi-display driving system provided herein.

FIG. 8 is a diagram illustrating a method of displaying an image in a dual display driving circuit system.

Fig. 9 is an example of a method of displaying an image provided herein.

Fig. 10 is another schematic diagram of a method for displaying an image provided by the present application.

Fig. 11 is a schematic structural block diagram of a main controller provided in the present application.

Fig. 12 is a schematic block diagram of the display driver circuit 2000.

Fig. 13 is a schematic block diagram showing the structure of the driver circuit 3000.

Fig. 14 is a schematic structural diagram of the electronic device 5000 provided in the present application.

Detailed Description

The technical solution in the present application will be described below with reference to the accompanying drawings.

To facilitate understanding of the technical solutions, some concepts and technologies related to the present application will be briefly described.

In the present application, an "image pixel" refers to a pixel in an image to be displayed, i.e., a point on the image expressed in a certain numerical value. And "screen pixel" refers to a physical display element on the display screen that is used to display a pixel of an image. Conventionally, one image pixel corresponds to one screen pixel. Conventionally, an image pixel comprises three color components, red, green and blue, each representing the color level or gray value of the color by a numerical value. In a typical 24-bit color display, each color component is represented by 8 bits, corresponding to 0-255 decimal numbers. The image pixels may also include other components, such as gamma components. The image pixels may also comprise more than three color components, e.g. using 2 green components, or 2 blue components, or introducing a yellow component, etc.

When the display screen displays images, the images to be displayed are sent to the display driving circuit by the main controller, pixel data in the images to be displayed are converted into voltage or current signals for regulating and controlling the brightness of the pixels of the screen by the display driving circuit, and the voltage or current signals are sent to the display screen, so that the display screen is controlled to display the images. Here, the main controller may be one or more processors, and may specifically be a main chip of the mobile phone, i.e., a system on chip (SoC). For example, cellucon series chips of gotu corporation, or kylin series chips of haisi semiconductor corporation. The display driver circuit may be a Display Driver Integrated Circuit (DDIC), such as CD40110BE from texas instruments, MM5450YV from Microchip (Microchip), and the like.

Referring to fig. 1, fig. 1 is a schematic diagram of a conventional screen pixel on a display screen. A conventional screen pixel is typically composed of three sub-pixels, red, green and blue, called a Red Green Blue (RGB) pixel. In conventional techniques, each sub-pixel displays one color component of the corresponding image pixel, and the three sub-pixels collectively represent the color of the image pixel. In the conventional art, a screen pixel may also include more sub-pixels, for example, on some display screens, a screen pixel may include a white sub-pixel in addition to red, green and blue, and this type of screen pixel is called a red, green, blue and white (RGBW) pixel. The RGBW pixel can display purer white since a special white sub-pixel is provided. On other display screens, a screen pixel includes a red subpixel, a grass-green subpixel, an emerald-green subpixel, and a blue subpixel, which is referred to as a red green blue (RGGB) pixel. Since the human eye is most sensitive to green light, providing two green sub-pixels can represent a richer color.

The color components of the image pixels are converted into light transmittance (for a liquid crystal display) or light emitting brightness (for a Light Emitting Diode (LED) screen) of corresponding sub-pixels on the screen through a main chip and/or a display driving circuit to realize display.

In contrast to conventional display technologies, in sub-pixel rendering (SPR) technologies, each pixel is generally composed of two sub-pixels, and is generally arranged periodically in the order of "red + green", "green + blue", or "blue + red". Such a pixel composed of two sub-pixels is called an SPR pixel. The arrangement of the SPR pixels may be different based on different designs.

Referring to FIG. 2, FIG. 2 is an example of an arrangement of SPR pixels. Fig. 2 shows SPR pixels of 3 rows and 4 columns, each consisting of two sub-pixels. The arrangement of the SPR pixels of the 2 nd column and the 4 th column is the same. The arrangement of the sub-pixels in the first sub-pixel column of the SPR pixels in the 1 st column and the 3 rd column is the same, and the arrangement of the sub-pixels in the second sub-pixel column is different.

The basic principle of the SPR technique is to calculate pixel data of a target pixel by using pixel data of nearby pixels as a reference. In other words, the values of the sub-pixels of a target pixel are calculated based on the values of the sub-pixels of the neighboring pixels. The value of each sub-pixel of a pixel is also referred to as the pixel data of the pixel. This is because in the SPR technique, each screen pixel has a missing color, and therefore, it is necessary to realize color display by the nearby screen pixels.

Taking the gray-filled SPR pixel shown in fig. 2 as an example of a target pixel, the pixel data of this target pixel can be calculated with reference to the pixel data of its neighboring pixels. For example, pixel data of this target pixel is calculated with pixels of the upper, lower, left, right, and four diagonal corners thereof as references. For example, pixel data of the target pixel is calculated with reference to the upper, lower, left, and right pixels. Specifically, one color component of a plurality of adjacent image pixels of the target pixel may be averaged to obtain pixel data of the sub-pixels on the corresponding display screen. For example, the screen pixels m and n in fig. 2, 1, 2, and 3 in the figure represent red, green, and blue sub-pixels, respectively. It can be seen that m lacks a red sub-pixel, and thus the display data for the red sub-pixel in the next n pixels can be averaged over the red components of the image pixels corresponding to m and n. In this way, a mapping of the original RGB image and the SPR image actually displayed on the screen may be achieved. Of course, this is only a simple example, and the present SPR algorithm is much more complex than this approach, but the basic principle is the same. There are many SPR algorithms, which are not limited in the embodiments of the present application.

It will be appreciated by those skilled in the art that in SPR techniques, the number of sub-pixels on a display screen is less than the number of color components of image pixels of an image to be displayed in a non-SPR pixel format (e.g., RGB format). For example, an RGB image with a resolution of 1920 × 1080, where the number of color components of an image pixel is 1920 × 1080 × 3, and the corresponding sub-pixels on a display screen with a resolution of 1920 × 1080, may be only 1920 × 1080 × 2. When the display screen displays at a resolution less than its maximum resolution, several actual sub-pixels can be combined into one virtual sub-pixel for display. For example, several actual sub-pixels of the same color in the same column or the same diagonal line may be displayed as a whole (which may be referred to as a virtual sub-pixel). At this point, it should be understood that the number of virtual sub-pixels is less than the number of image pixel color components. For example, if an image with a resolution of 1024 × 768 is displayed on a display screen with a maximum resolution of 1920 × 1080, the number of virtual sub-pixels may be only 1024 × 768 × 2, which is less than the number of color components of the image pixels 1024 × 768 × 3.

In recent years, flexible display screens are widely used in terminal products such as mobile phones due to their advantages of being light, thin, not fragile, foldable, and rollable. However, existing flexible displays are less used in foldable and rollable end products, called foldable end devices.

When the foldable terminal device displays images, due to the characteristic that the flexible display screen can be flexibly folded, a multi-display driving circuit system is generally considered. A multi-display driver circuitry generally includes a main controller, at least two display driver circuits, and a display screen. The at least two display driving circuits drive the display screen together to display images.

However, based on the basic principle of the SPR technique, when an image is displayed by a plurality of display driving circuits, pixel data needs to be shared between the display driving circuits. The following description will be made by taking a dual drive display circuit system as an example with reference to fig. 3 and 4.

Referring to FIG. 3, FIG. 3 is a diagram of a system 100 for dual drive display circuitry. As shown in fig. 3, the system 100 includes a main controller 101, a display driving circuit 102 and a display driving circuit 103, and a display screen 104. The main controller divides the image to be displayed into two parts to obtain a first image and a second image. Then, the main controller sends the first image and the second image to the display driving circuit 102 and the display driving circuit 103, respectively, and the display driving circuit 102 and the display driving circuit 103 drive the display screen to display the first image and the second image, so that the image to be displayed is presented on the display screen.

According to the basic principle of the SPR technique described above, pixel data needs to be shared between the display driving circuit 102 and the display driving circuit 103 to meet the requirement of the SPR algorithm. The reason is explained below with reference to fig. 4.

Referring to fig. 4, fig. 4 is a schematic diagram of pixel data that needs to be shared between a first image and a second image. It should be appreciated that in a multi-display driver circuitry, each display driver circuit drives a display screen to display a portion of an image to be displayed. On the basis of the system 100 shown in fig. 3, it is assumed that the display driving circuit 102 in fig. 3 is used for driving the display screen to display a part of the image to be displayed (hereinafter referred to as a first image), and the display driving circuit 103 is used for driving the display screen to display another part of the image to be displayed (hereinafter referred to as a second image).

As shown in fig. 4, in order to display the first image, the display driving circuit 102 needs to calculate pixel data of all SPR pixels of the first image, or to calculate a numerical value of a sub-pixel of each SPR pixel included in the first image. All the SPR pixels of the first image obviously include SPR pixels in the rightmost column of the first image (e.g. pixels in the filled portion in fig. 4), and the calculation of the pixel data of the SPR pixels in the rightmost column needs to refer to the values of the sub-pixels of the SPR pixels on the right side as well as the values of the sub-pixels of the SPR pixels on the upper side, the lower side and the left side. However, the pixel on the right side is located in the second image, and is transmitted to the display drive circuit 103 by the main controller 101.

Similarly, in order to display the second image, the display driving circuit 103 needs to calculate the pixel data of all the SPR pixels included in the second image, including the pixel data of the SPR pixel in the leftmost column of the second image. The pixel data of the SPR pixels in the leftmost column of the second image is calculated with reference to the pixel data of the SPR pixels above, below and right thereof and the pixel data of the SPR pixel to left thereof. Similarly, the SPR pixels in the leftmost column are in the first image and are sent by the main controller 101 to the display driving circuit 102.

Therefore, the pixel data required by the display driving circuit 102 and the display driving circuit 103 can be shared between the two circuits, the pixel rendering can be completed by adopting the SPR technology, the first image and the second image are respectively displayed, and the display of the image to be displayed is further realized.

For this purpose, one prior art solution proposes to build an interface (or data channel) for pixel data transmission between two display driving circuits of the system 100, so as to implement sharing of pixel data, as shown in fig. 5.

Referring to fig. 5, fig. 5 is a schematic diagram of pixel data sharing between two display driving circuits. An interface (interface) for sharing pixel data is established between two display driving circuits (such as the display driving circuit 1 and the display driving circuit 2 shown in fig. 5), and each display driving circuit can share pixel data required by the other display driving circuit to the other through the interface.

However, the configuration shown in fig. 5 solves the problem of pixel data sharing, but brings about other problems. For example, building an interface between two display driver circuits requires that the area of the display driver circuit be made larger to leave an area for building the interface on each display driver circuit, which will increase the area of a Flexible Printed Circuit (FPC) of the display driver. Meanwhile, as the physical distance between the display driving circuit 1 and the display driving circuit 2 is short, the signal transmission on each display driving circuit will cause interference to each other through the interface, and thus the problems of EMI and ESD will be inevitably caused.

Based on the above current situation of the multi-display driving circuit system when displaying images, the present application provides an electronic device with the multi-display driving circuit system and a method for displaying images through the multi-display driving circuit system, aiming to avoid the problems of the increase of the FPC area of the display screen, EMI, EMD, and the like.

The technical solution of the present application is explained in detail below.

Referring to fig. 6, fig. 6 is a schematic block diagram of an electronic device 7000 provided in the present application. As shown in fig. 6, the electronic device 7000 includes one or more processors 7001 and one or more transceivers 7002.

Optionally, electronic device 7000 also includes one or more memories 7003. The processor 7001, the transceiver 7002, and the memory 7003 may communicate with each other via internal connection paths to transmit control and/or data signals. The memory 7003 is used for storing computer programs, and the processor 7001 is used for calling and running the computer programs from the memory 7003 so as to make the electronic device execute the method for displaying images provided by the application.

The processor 7001 may include a baseband processor 70071 and an application processor 70072, among others.

Alternatively, the processor 7001 may further include a Graphics Processing Unit (GPU), an Image Signal Processor (ISP), a display subsystem (DSS), a neural Network Processing Unit (NPU), and the like. Alternatively, the various processing units described above may be integrated on a chip to form a system on chip (SoC).

Optionally, electronic device 7000 may also include antenna 7004. Wherein the transceiver 7002 transmits or receives a signal through the antenna 7004.

Alternatively, the processor 7001 and the memory 7003 may be integrated into one processing apparatus, and the processor 7001 is configured to execute the program codes stored in the memory 7003 to realize the corresponding functions. In particular, the memory 7003 may be integrated in the processor 7001, i.e., an on-chip memory. Alternatively, the memory 7003 is separate from the processor 7001, and is located outside the processor 7001, i.e., an off-chip memory.

In addition to this, in order to further improve the functions of the terminal device, the terminal device 7000 may further include one or more of the input unit 7006, the display unit 7007, the audio circuit 7008, the camera 7009, the sensor 7010, and the like. The audio circuitry may also include a speaker 70082, a microphone 70084, and the like.

The input unit 7006 is a signal input interface, and the display unit 7007 is a signal output interface, such as a display screen. The signals output by the display unit 7007 may include audio, video, images, and the like.

In this application, the display unit 7007 may be an AMOLED including the module 70072. Among them, the module 70072 may be provided with a plurality of display driving circuits, such as the display driving circuits 1, … shown in fig. 6, and the display driving circuit n. n is more than or equal to 2. In addition, the module 70072 further includes an OLED 70074 thereon.

In addition, the AMOLED may be a flexible display screen. That is, electronic device 7000 may be a foldable electronic device.

The technical scheme of the application can be applied to the foldable electronic equipment shown in fig. 6, and images are displayed through the multi-display driving circuit system. As described in detail below.

In the following embodiments, the main controller may refer to one or more processors, and may be a system on chip (SoC).

In some embodiments provided herein, at least two sub-images in a non-SPR pixel format (e.g., RGB format) are generated by a main controller of an electronic device and sent to a display driving circuit, which then drives a display screen to display the image using an SPR algorithm.

Specifically, the main controller splits the image to be displayed into at least two sub-images in a non-SPR pixel format and sends the at least two sub-images to the at least two display driving circuits. Wherein each sub-image and adjacent sub-image comprises at least one column of overlapping image pixels.

It should be understood that the at least one column of overlapping image pixels refers to one or more columns of image pixels at the interface of each sub-image and its neighboring sub-image.

For example, suppose that the image to be displayed is split laterally into a plurality of sub-images, except for two sub-images at edge positions, each sub-image containing at least the rightmost column of image pixels of its left-adjacent sub-image and the leftmost column of image pixels of its right-adjacent sub-image.

The sub-image at the left edge position contains at least the left-most column of image pixels of the right adjacent sub-image. The sub-image at the right edge position contains at least the rightmost column of image pixels of its left adjacent sub-image.

In addition, rows and columns are relative concepts for a pixel array. It will be understood by those skilled in the art that "columns" of the pixel array may alternatively be described as "rows," and such variations should not be construed as limiting the scope of the present application. The following is described in terms of "columns".

Each display driving circuit of the at least two display driving circuits receives one sub-image of the at least two sub-images from the main controller, and drives the display screen to display a part of the image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the sub-image. And the at least two display driving circuits drive each part displayed by the display screen to present the image to be displayed.

Wherein each display driver circuit drives a portion of the display screen corresponding to a sub-image received by the display driver circuit from the main controller. In other words, each display driving circuit receives a sub-image from the main controller and drives the display screen to display the sub-image in an SPR manner according to pixel data of image pixels included in the sub-image, thereby rendering a portion of an image to be displayed. The at least two display driving circuits each drive the display screen to display (or present) a part of an image to be displayed, and the parts together present the image to be displayed.

It should be understood that the display screen displays the sub-images in an SPR manner, i.e., the display screen displays the sub-images using SPR techniques.

Optionally, in an implementation, the main controller may split the image to be displayed into at least two sub-images according to the number of the display driving circuits, and send one of the at least two sub-images to each display driving circuit. Accordingly, each display driver circuit receives a sub-image from the main controller and controls the display screen to display a portion of the image to be displayed.

Or, in another implementation, the main controller splits the image to be displayed into at least two sub-images, sends more than one sub-image to some of the at least two display driving circuits, and sends one sub-image to each of the other display driving circuits. Accordingly, the display driving circuit receiving more than one sub-image may drive the display screen to display a plurality of portions of the image to be displayed. Each of the display driving circuits receiving one of the sub-images may drive the display screen to display a portion of the image to be displayed. Thus, the parts displayed by the display screen jointly present the image to be displayed.

This will be explained with reference to fig. 7.

Referring to fig. 7, fig. 7 is an example of a method of displaying an image in a system of multi-display driving circuits provided in the present application. Fig. 7 illustrates an example in which a system of a multi-display driver circuit includes 3 display driver circuits. Of course, the multi-display driver circuitry may include other numbers of display driver circuits.

As shown in fig. 7, the main controller splits the image to be displayed into 3 sub-images, which are respectively a first sub-image, a second sub-image and a third sub-image, and sends the sub-images to the 3 display driving circuits. Wherein the first sub-image and the adjacent second sub-image have overlapping image pixels. The second sub-image and the adjacent first sub-image and the adjacent third sub-image each have overlapping image pixels. In particular, each two adjacent sub-images comprises at least one column of overlapping image pixels.

As mentioned above, the at least one column of overlapping image pixels included in each two adjacent sub-images should be one or more columns of image pixels at the boundary between the two adjacent sub-images.

As shown in fig. 7, the first sub-picture should at least contain the leftmost column of image pixels of the second sub-pixel. The second sub-image should contain at least the rightmost column of image pixels of the first sub-image. At the same time, the second sub-pixel should contain at least the leftmost column of image pixels of the third sub-image. The third sub-image should contain at least the rightmost column of image pixels of the second sub-image.

The display driving circuit 1 receives the first sub-image from the main controller. The display drive circuit 1 calculates pixel data in the SPR pixel format required to display a first portion of an image to be displayed on the display screen based on the pixel data in the non-SPR pixel format of the first sub-image, and drives the display screen to display the first portion.

It should be understood that the principle of calculating the pixel data of the SPR pixel by the display driving circuit 1 may refer to the basic principle of the SPR algorithm described above, as illustrated in fig. 2, and will not be described herein again.

Similarly, the display driving circuit 2 receives the second sub-image from the main controller. The display drive circuit 2 calculates the pixel data in the SPR pixel format required for displaying the second portion of the image to be displayed on the display screen based on the pixel data in the non-SPR pixel format of the second sub-image, and drives the display screen to display the second portion.

The display driver circuit 3 receives the third sub-picture from the main controller. The display drive circuit 3 calculates pixel data in the SPR pixel format required for displaying the third portion of the image to be displayed on the display screen based on the pixel data in the non-SPR pixel format of the third sub-image, and drives the display screen to display the third portion.

It should be understood that the display driving circuit 1, the display driving circuit 2 and the display driving circuit 3 respectively drive the display screen to display a part of the image to be displayed, so that the complete image to be displayed is presented on the display screen.

In these embodiments, since the main controller splits the image to be displayed into a plurality of sub-images with overlapping image pixels, after each sub-image is sent to the display driving circuits, each display driving circuit obtains more image pixels than the portion of the image that needs to be displayed. Therefore, the image pixels at the edge of the image portion to be displayed are known for each display driving circuit, so that the pixel data do not need to be shared between the display driving circuits, and the SPR pixel data of each portion of the image to be displayed can be calculated to drive the display panel to display.

In addition, it will be appreciated that the first sub-image comprises a greater number of columns of pixels than the first portion. The second sub-image comprises a larger number of columns of pixels than the second portion. The third sub-image comprises a larger number of columns of pixels than the third portion.

In other words, the image pixels of the sub-image obtained by each display driving circuit drive the image pixels of the portion displayed on the display screen more than the display driving circuit, i.e. the "overlapped image pixels" in the present application.

The application of the method for displaying images provided by the present application in a dual display driving circuit system is described below with reference to fig. 8.

Referring to fig. 8, fig. 8 is a schematic diagram of a method of displaying an image in a dual display driving circuit system.

In the dual display driving circuit system, a main controller splits an image to be displayed into a first sub-image and a second sub-image in a non-SPR pixel format, wherein the first sub-image and the second sub-image comprise at least one column of overlapped image pixels.

The main controller sends a first sub-image to a first display driving circuit in the double-display driving circuit system and sends a second sub-image to a second display driving circuit.

The first display driving circuit receives the first sub-image from the main controller, and drives the display screen to display a part of the image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image.

Meanwhile, the second display driving circuit receives a second sub image from the main controller, and drives the display screen to display the other part of the image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the second sub image.

In fig. 8, a portion of the display panel displayed by the first display driving circuit is referred to as a first image, and another portion of the display panel displayed by the second display driving circuit is referred to as a second image.

Alternatively, the non-SPR pixel format may be an RGB pixel format.

Specifically, the main controller splits the image to be displayed into a plurality of sub-images, and sends the sub-images to the plurality of display driving circuits respectively. Assuming that the plurality of display driving circuits drive the display screen to display a plurality of parts of the image to be displayed, the plurality of parts comprise pixels with column ranges as follows:

[1,L₁],[L₁+1,L₂],…,[L_n,Z]wherein L is₁,L₂…, Ln are positive integers.

Then, the column ranges of the pixels included in the plurality of sub-images may be as follows:

[1,L₁+P₁],[L₁+1-P₂,L₂+P₃],…,[L_n-P_n,Z]wherein P is₁，P₂，P₃,P_nAre all positive integers.

Taking the first sub-image and the second sub-image as an example, the column ranges of the image pixels included in the first sub-image and the second sub-image can be calculated as follows:

the first sub-image comprises image pixels with a column range of [1, M + N ]₁]The second sub-image comprises image pixels having a column range of [ M-N₂,Z]。

Wherein Z is the total column number of image pixels contained in the image to be displayed, and Z, M and N₁And N₂Are all positive integers, 1<M<Z,Z>1。

It should be understood that M may be any column between column 1 and column Z.

For example, suppose that the image to be displayed includes 100 columns of image pixels in total (i.e., Z100), N₁＝N₂1, M is 50, the first sub-image output by the main controller includes the image pixels in the 1 st to 51 th columns, that is, the first sub-image includes the image pixels in the column range of [1, 51%]. The second sub-image comprises image pixels from column 49 to column 100, i.e. the second sub-image comprises image pixels in a column range of [49,100 ]]。

The first display driving circuit drives the display screen to display a part of an image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image. Specifically, the first display driving circuit drives the display screen to display image parts corresponding to the image pixels of the 1 st column to the 50 th column of the image to be displayed according to the image pixels of the 1 st column to the 51 st column received from the main controller.

In addition, the second display driving circuit drives the display screen to display another part of the image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the second sub-image. Specifically, the second display driving circuit drives the display screen to display the image parts corresponding to the image pixels of the 51 st column to the 100 th column of the image to be displayed according to the image pixels of the 49 th column to the 100 th column received from the main controller.

As can be seen, the image portions corresponding to the image pixels of the 1 st to 50 th columns of the image to be displayed and the image portions corresponding to the image pixels of the 51 st to 100 th columns of the image to be displayed are displayed on the display screen, so that the image to be displayed is presented.

It should be understood that in this example, M is Z/2, and thus, the first display driving circuit and the second display driving circuit each drive the display screen to display half of the image to be displayed.

In fig. 7 and 8, adjacent sub-images are displayed with a shift therebetween for the convenience of illustrating the overlapping portion. In practice, one or more columns of the border portions of two adjacent sub-images are completely overlapping.

Referring to fig. 9, fig. 9 is an example of a method of displaying an image provided by the present application. As shown in fig. 9, the dotted lines shown on the image to be displayed indicate the boundaries of the portions that the two display driving circuits drive the display panel to display, respectively. For example, the first display driving circuit drives the display screen to display an image to the left of the dotted line, and the second display driving circuit drives the display screen to display an image to the right of the dotted line.

Taking the architecture shown in fig. 8 as an example, the main controller 101 splits an image to be displayed, and outputs a first sub-image and a second sub-image with overlapping image pixels. Wherein the overlapped image pixels are one or more columns of image pixels of the boundary portion of the first sub-image and the second sub-image. The main controller 101 sends the first sub-image to the display driving circuit 102 and the second sub-image to the display driving circuit 103.

It can be seen that the display driver circuit 102 obtains not only all image pixels of the left image to the left of the dotted line, but also image pixels near the dividing line, which mainly refers to one or more columns of image pixels to the right of the dividing line. Likewise, the display driver circuit 103 also simultaneously obtains all image pixels of the right image to the right of the dotted line, and also obtains one or more columns of image pixels to the left of the dividing line.

Accordingly, the display driving circuit 102 may calculate pixel data of all pixels of the SPR pixel format of the left image from all image pixels of the obtained first sub-image, thereby driving the display screen 104 to display the left image in the SPR scheme. The display driving circuit 103 may calculate pixel data of all pixels of the SPR pixel format of the right image from all image pixels of the obtained second sub-image, thereby driving the display screen 104 to display the right image in the SPR scheme.

It is to be understood that the boundary shown in fig. 9 may be a center position or a non-center position of the image to be displayed.

Optionally, in a specific implementation, the main controller and the display driving circuit may interact through a Display Serial Interface (DSI), or may also use another communication interface other than the DSI, which is not limited in this application.

In other embodiments provided herein, the main controller renders pixel data in SPR pixel format according to non-subpixels of an image to be displayed, generates at least two sub-images in SPR pixel format, and sends the at least two sub-images to the at least two display driving circuits.

And each display driving circuit in the at least two display driving circuits receives one sub-image in the at least two sub-images from the main controller and drives the display screen to display the received sub-image.

It should be understood that in the previously described embodiments, the sub-images are in a non-SPR pixel format (e.g., RGB format). In the embodiment, the main controller splits the image to be displayed into a plurality of sub-images in an SPR pixel format according to an SPR algorithm. I.e., the mapping of the original non-SPR pixel format (e.g., RGB format) to the SPR pixel format image is done by the main controller. The image in the SPR pixel format directly gives display data of each sub-pixel on the display screen, for example, a tone scale or a gray scale value of each sub-pixel, etc. Thus, the display driving circuit can directly drive the display screen to display the sub-image received from the main controller. The above operations may be implemented by an Application Processor (AP), a Graphics Processing Unit (GPU), or a display subsystem (DSS), which is not limited in this application. Those skilled in the art will appreciate that the circuit units may be discrete devices or integrated on a chip, such as a system on chip (SoC) of a mobile phone.

As mentioned earlier, the number of sub-pixels on the display screen is less than the number of color components of pixels in the non-SPR pixel format in the image to be displayed. It will be appreciated by those skilled in the art that in SPR techniques, the number of sub-pixels on a display screen is less than the number of color components of image pixels of an image to be displayed in a non-SPR pixel format (e.g., RGB format). For example, an RGB image with a resolution of 1920 × 1080, where the number of color components of an image pixel is 1920 × 1080 × 3, and the corresponding sub-pixels on a display screen with a resolution of 1920 × 1080, may have only 1920 × 1080 × 2. Accordingly, the number of sub-pixels indicated by the union of sub-images in the SPR pixel format described above is also less than the number of color components of an image pixel of the image to be displayed.

Generally, the number of sub-pixels indicated by the union of sub-images in the above-described SPR pixel format is equal to the number of sub-pixels on the display screen. When a display screen is displayed at a resolution less than its maximum resolution, it is usually displayed with several actual sub-pixels combined into one virtual sub-pixel. For example, several actual sub-pixels of the same color in the same column or the same diagonal line may be displayed as a whole (which may be referred to as a virtual sub-pixel). At this point it should be understood that the number of virtual sub-pixels is less than the number of image pixel color components. For example, if an image with a resolution of 1024 × 768 is displayed on a display screen with a maximum resolution of 1920 × 1080, the number of virtual sub-pixels may be only 1024 × 768 × 2, which is less than the number of color components of the image pixels 1024 × 768 × 3. At this time, the number of sub-pixels indicated by the union of sub-images of the SPR pixel format described above may be generally equal to the number of virtual sub-pixels.

Those skilled in the art will appreciate that the main controller generating the sub-image in the SPR pixel format generally needs to know the arrangement of the sub-pixels on the display screen, and the information of the arrangement can be written into the setting parameters of the main controller, for example, the information of the arrangement can be written into the memory of the main controller or an external memory.

The following description will be made by taking the dual display driving circuit as an example.

And the main controller generates a third sub-image and a fourth sub-image in the SPR pixel format according to the pixel data in the non-SPR pixel format of the image to be displayed and an SPR algorithm.

And the main controller sends the third sub-image to the first display driving circuit and sends the fourth sub-image to the second display driving circuit.

The first display driving circuit drives the display screen to display the third sub-image in an SPR mode according to the pixel data of the SPR pixel format of the third sub-image.

And the second display driving circuit drives the display screen to display the fourth sub-image in an SPR mode according to the pixel data of the SPR pixel format of the fourth sub-image.

That is, in this embodiment, the main controller renders the image to be displayed according to the SPR algorithm, and directly outputs the rendered image to the display driving circuit. Therefore, each display driving circuit can directly drive the display screen to display the rendered sub-image.

Here, the rendered image is also an image in the SPR pixel format.

For example, the SPR algorithm block, splitter, and MIPI interface may be integrated on the host controller. The SPR algorithm module renders an image to be displayed according to an SPR algorithm to obtain a rendered image. The SPR algorithm module outputs the rendered image to a splitter (splitter). The splitter splits the rendered image into two sub-images, and then outputs the two sub-images to two display driving circuits respectively through two Mobile Industry Processor Interfaces (MIPI) transmitting interfaces (referred to as MIPI Tx). And each display driving circuit respectively drives the display screen to display the sub-image received by the display driving circuit, so that the image to be displayed is displayed on the display screen.

Referring to fig. 10, fig. 10 is another schematic diagram of a method for displaying an image provided by the present application. As shown in fig. 10, the main controller 101 outputs the rendered third sub-image and fourth sub-image to the display driving circuit 102 and the display driving circuit 103, respectively. The display drive circuit 102 drives the display screen 104 to display the first SPR image in the SPR scheme, and the display drive circuit 103 drives the display screen 104 to display the second SPR image in the SPR scheme.

Here, the SPR image represents an image in an SPR pixel format.

The method for displaying images by the multi-display driving circuit system provided by the present application is described in detail above. Compared with the traditional multi-display driving circuit system, the multi-display driving circuit system avoids the problems of FPC (flexible printed circuit) area increase, EMI (electro-magnetic interference), ESD (electro-static discharge) and the like caused by pixel data sharing by establishing a data channel between two display driving circuits, and can improve the performance of the multi-display driving circuit system.

The main controller and the display driving circuit provided by the present application are described below.

The main controller provided in this embodiment of the present application may specifically be one or more processors, and these processors may be integrated on one chip to form a system on chip (SoC), and by designing a circuit structure of the one or more processors or configuring appropriate codes, the one or more processors may be enabled to perform the function of splitting the image to be displayed and sending the image to the display driving circuit, which is described in the foregoing embodiments.

Referring to fig. 11, fig. 11 is a schematic block diagram of a main controller according to some embodiments of the present disclosure. As shown in fig. 11, the main controller 1000 includes a splitting unit 1100 and a communication interface 1200.

In one implementation, the units of the main controller 1000 have the following functions:

a splitting unit 1100, configured to split an image to be displayed into at least two sub-images in a non-sub-pixel rendering SPR pixel format, where each sub-image and an adjacent sub-image include at least one column of overlapped image pixels;

a communication interface 1200 for sending the at least two sub-images to at least two display driving circuits.

Alternatively, the communication interface 1200 may be one or more. When there are multiple communication interfaces 1200, each communication interface 1200 is configured to send one of the at least two sub-images to one of the at least two display driving circuits.

In one implementation, the splitting unit 1100 may be a hardware-implemented splitter. The communication interface 1200 may be a DSI interface.

Optionally, in an implementation manner, the multi-display driving circuit system includes a first display driving circuit and a second display driving circuit, where the splitting unit 1100 is configured to split the image to be displayed into a first sub-image and a second sub-image in a non-SPR pixel format, where the first sub-image and the second sub-image include at least one column of overlapped image pixels in the non-SPR pixel format;

the communication interface 1200 is configured to send the first sub-image to the first display driving circuit, and send the second sub-image to the second display driving circuit.

Optionally, in an implementation manner, the first sub-image includes image pixels with a column range of [1, M + N ]₁]The second sub-image comprises image pixels with a column range of [ M-N₂,Z]Wherein Z is the total column number of image pixels contained in the image to be displayed, and Z, M and N₁And N₂Are all positive integers, 1<M<Z,Z>1。

Alternatively, N₁＝N₂。

Two display driving circuits referred to in the present application will be explained below.

Referring to fig. 12, fig. 12 is a schematic configuration diagram showing the drive circuit 2000. As shown in fig. 12, the display driver circuit 2000 includes a communication interface 2100 and a processing unit 2200.

A communication interface 2100, configured to receive the first sub-image in the non-SPR pixel format from the communication interface 1200 of the main controller 1000, and input the first sub-image in the non-SPR pixel format to the processing unit 2200;

and a processing unit 2200, configured to drive the display screen to display a part of the image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image.

In one implementation, processing unit 2000 may include a rendering unit 2202. The rendering unit 2202 is configured to render the first sub-image in the non-SPR pixel format according to an SPR algorithm, so as to obtain a part of the image to be displayed in the SPR pixel format.

Optionally, as one embodiment, communication interface 2100 may be a DSI interface.

In addition, the functions of the processing unit 2200 may be implemented by hardware, or by a combination of software and hardware. When the functions of the processing unit 2200 are implemented by hardware, the processing unit 2200 may be a logic circuit, an integrated circuit, or the like. For example, the processing unit 2200 may be a Display Driver Integrated Circuit (DDIC). When implemented in a combination of software and hardware, the processing unit 2200 may be a processor. The processor implements the above-described functions of the processing unit 2200 by reading computer program code or instructions stored in the storage unit.

Alternatively, the storage unit may be integrated into the processor, or may be located outside the processor and stand-alone.

Referring to fig. 13, fig. 13 is a schematic block diagram showing the structure of the driver circuit 3000. As shown in fig. 13, the display drive circuit 3000 includes a communication interface 3100 and a processing unit 3200.

Communication interface 3100, configured to receive the second sub-image in non-SPR pixel format from main controller 1000, and input the second sub-image in non-SPR pixel format to processing unit 3200;

the processing unit 3200 is configured to drive the display screen to display another portion of the image to be displayed in an SPR manner according to the pixel data of the non-SPR pixel format of the second sub-image.

Alternatively, communication interface 3100 may be a DSI interface and processing unit 3200 may be a processor.

In addition, the functions of the processing unit 3200 may be implemented by hardware, or by a combination of software and hardware. When implemented in hardware, processing unit 3200 may be a logic circuit, an integrated circuit, or the like, e.g., processing unit 3200 may be a DDIC. When implemented in a combination of software and hardware, the processing unit 3200 may be a processor. The processor implements the functions of the processing unit 3200 by reading computer program code or instructions stored in the memory unit. Alternatively, the memory unit may be integrated into the processor or may be located separately from the processor.

In another implementation, the main controller 1000 further includes a processing unit 1300.

Alternatively, each unit of the main controller 1000 has the following functions:

the processing unit 1300 is configured to render an image to be displayed according to an SPR algorithm, and output the rendered image in an SPR pixel format;

the splitting unit 1100 is configured to split the rendered image in the SPR pixel format into at least two sub-images in the SPR pixel format;

and the communication interface 1200 is configured to send the at least two sub-images in the SPR pixel format to at least two display driving circuits, respectively.

Optionally, in an implementation manner, the multi-display driving circuit system includes a first display driving circuit and a second display driving circuit, where the processing unit 1300 is configured to generate a third sub-image and a fourth sub-image in the SPR pixel format according to pixel data in a non-SPR pixel format of an image to be displayed;

a communication interface 1200, configured to send the third sub-image to the first display driving circuit, and send the fourth sub-image to the second display driving circuit.

Optionally, in this embodiment, the processing unit 1300 may include a rendering unit 1302, configured to render an image to be displayed according to an SPR algorithm, and output the rendered image in the SPR pixel format.

Alternatively, the functions of the processing unit 1300 may be implemented by hardware, or by a combination of software and hardware. When implemented in hardware, the processing unit 1300 may be a logic circuit, an integrated circuit, or the like, such as a DDIC. When implemented in a combination of software and hardware, the processing unit 1300 may be a processor. The processor is implemented by reading computer program code stored in the memory unit. Alternatively, the memory unit may be integrated into the processor or may be located separately from the processor.

In the present embodiment, the functions of the units of the display drive circuit 2000 are as follows:

a communication interface 2100 for receiving a third sub-image in SPR pixel format from the communication interface 1200 of the host controller;

and a processing unit 2200, configured to drive the display screen to display the third sub-image in an SPR mode according to the pixel data of the SPR pixel format of the third sub-image.

The functions of the units of the display driving circuit 3000 are as follows:

communication interface 3100, for receiving a fourth sub-image in SPR pixel format from communication interface 1200 of the host controller;

the processing unit 3200 is configured to drive the display screen to display the fourth sub-image in an SPR mode according to the pixel data of the SPR pixel format of the fourth sub-image.

The main controller and the display driving circuit provided in the present application are explained in detail above.

It should be understood that the above embodiment is described with two display driving circuits, and when there are more than two display driving circuits, the function of each display driving circuit is similar to that of the display driving circuit 2000 or the display driving circuit 3000, and the description thereof is omitted.

In addition, the present application also provides an electronic device 5000, see fig. 14.

Fig. 14 is a schematic structural diagram of the electronic device 5000 provided in the present application. As shown in fig. 14, the electronic device 5000 may include a flexible display screen 510, one or more processors (not shown), one or more memories (not shown), and one or more radio frequency circuits (not shown).

The processor is used for processing data, and may specifically be a Central Processing Unit (CPU), or other general-purpose processor, an Application Processor (AP), a baseband processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component. A general purpose processor may be a microprocessor or any conventional processor or the like. In particular, the various processors may be integrated on one chip, referred to as a system on a chip.

The memory is used for storing data, and may specifically be a Random Access Memory (RAM), a flash memory, a read-only memory (ROM), a Programmable ROM (PROM), an Erasable PROM (EPROM), an Electrically Erasable PROM (EEPROM), a register, a hard disk, and the like.

The radio frequency circuit is used for receiving or transmitting signals to interact with other equipment.

The flexible display 510 may be a display as described in various embodiments herein, such as display 104. At least one application icon 511 and a virtual button 512 may be displayed on the flexible display. The flexible display screen 510 has strong rigidity, and can be bent at a certain radian when the display screen is folded or curled, so that folds, arches or creases caused by folding or curling are avoided, and the visual experience of a user can be improved.

It should be understood that fig. 14 mainly shows the flexible display 510 of the foldable electronic device, and the processor, the memory, the radio frequency circuit, and the like included therein can be referred to as shown in fig. 6. In addition, the electronic device 5000 may further include other devices shown in fig. 6, which is not limited in this application.

Further, the present application provides circuitry that includes one or more processors. The one or more processors are configured to execute processing performed by the main controller in the method for displaying an image provided by the present application, which may be specifically referred to as method embodiments.

Optionally, the present application further provides a circuit system, which includes one or more processors, which are configured to read and execute the computer program stored in the memory to perform the processing performed by the controller in the method for displaying an image provided by the present application.

Alternatively, the memory may be external to or integrated in the circuitry, and the processor is connected to the memory by a circuit or a wire. The memory may be one or more.

Further optionally, the circuitry further comprises a communication interface.

The present application provides a computer readable storage medium having stored therein computer instructions, which when run on a computer, cause the computer to perform the method of displaying an image in a system of multi-display driving circuits provided herein.

The present application provides a computer program product comprising computer program code which, when run on a computer, causes the computer to perform the method of displaying images in a system of multi-display driver circuits as provided herein.

In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the technical solution of the embodiments of the present application.

The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application.

The above description is only an embodiment of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art will be within the technical scope of the present disclosure. The protection scope of the present application shall be subject to the protection scope of the claims.

Claims

1. An electronic device comprising a main controller, a display screen, and at least two display driving circuits that drive the display screen to display an image, wherein,

each of the at least two display driving circuits is configured to receive one sub-image of the at least two sub-images from the main controller, and drive the display screen to display a part of the image to be displayed in an SPR manner according to image pixel data of the one sub-image, where the at least two display driving circuits drive the parts displayed by the display screen to jointly present the image to be displayed.

2. The electronic device of claim 1, comprising a first display driver circuit and a second display driver circuit, wherein,

the main controller is configured to split the image to be displayed into a first sub-image and a second sub-image in a non-SPR pixel format, send the first sub-image to the first display driving circuit, and send the second sub-image to the second display driving circuit, where the first sub-image and the second sub-image include at least one column of overlapped image pixels;

3. The electronic device of claim 2, wherein the first sub-image and the second sub-image comprise at least one column of overlapping image pixels, comprising:

the first sub-image comprises image pixels with a column range of [1, M + N ]₁]The second sub-image comprises image pixels with a column range of [ M-N₂,Z]，

4. The electronic device of claim 3, wherein N is₁＝N₂。

5. An electronic device comprising a main controller, a display screen, and at least two display driving circuits that drive the display screen to display an image, wherein,

the main controller is used for rendering pixel data in an SPR pixel format according to non-sub-pixels of an image to be displayed, generating at least two sub-images in the SPR pixel format and sending the at least two sub-images to the at least two display driving circuits;

and each display driving circuit of the at least two display driving circuits is used for receiving one sub-image of the at least two sub-images from the main controller and driving the display screen to display a part of the image to be displayed in an SPR mode, wherein the at least two display driving circuits drive each part displayed by the display screen to present the image to be displayed.

6. The electronic device of claim 5, wherein the electronic device comprises two display driver circuits, wherein,

the main controller is used for rendering pixel data in an SPR pixel format according to non-sub-pixels of an image to be displayed, generating a third sub-image and a fourth sub-image in the SPR pixel format, sending the third sub-image to a first display driving circuit of the two display driving circuits, and sending the fourth sub-image to a second display driving circuit of the two display driving circuits;

the first display driving circuit is used for driving the display screen to display the third sub-image in the SPR mode;

and the second display driving circuit is used for driving the display screen to display the fourth sub-image in the SPR mode.

7. A method of displaying images in a multi-display driver circuitry, the multi-display driver circuitry comprising a main controller, a display screen, and at least two display driver circuits, the method comprising:

the main controller divides an image to be displayed into at least two sub-images in a non-sub-pixel rendering SPR pixel format, and sends the at least two sub-images to the at least two display driving circuits, wherein each sub-image and adjacent sub-images comprise at least one column of overlapped image pixels;

each display driving circuit of the at least two display driving circuits receives one sub-image of the at least two sub-images from the main controller, and drives the display screen to display a part of the image to be displayed in an SPR mode according to the pixel data of the non-SPR pixel format of the sub-image, wherein the at least two display driving circuits drive each part displayed by the display screen to jointly present the image to be displayed.

8. The method of claim 7, wherein the system comprises a first display driver circuit and a second display driver circuit, wherein,

the main controller splits an image to be displayed into a plurality of sub-images in a non-SPR pixel format and sends the sub-images to the two display driving circuits, and the method comprises the following steps:

each of the plurality of display driving circuits receives one sub-image of the at least two sub-images from the main controller, and drives the display screen to display a part of the image to be displayed in an SPR manner according to the pixel data of the non-SPR pixel format of the one sub-image, including:

9. The method of claim 8, wherein the first sub-image and the second sub-image comprise at least one column of overlapping image pixels, comprising:

10. The method of claim 9, wherein N is₁＝N₂。

11. A method of displaying images in a multi-display driver circuitry, the multi-display driver circuitry comprising a main controller, a display screen, and at least two display driver circuits, the method comprising:

the main controller renders pixel data in an SPR pixel format according to non-sub-pixels of an image to be displayed, generates at least two sub-images in the SPR pixel format, and sends the at least two sub-images to the at least two display driving circuits;

each display driving circuit of the at least two display driving circuits receives one sub-image of the at least two sub-images from the main controller and drives the display screen to display a part of the image to be displayed in an SPR mode, wherein the at least two display driving circuits drive each part displayed by the display screen to present the image to be displayed.

12. The method of claim 11, wherein the multi-display driver circuitry comprises a first display driver circuit and a second display driver circuit, wherein,

the main controller renders pixel data in an SPR pixel format according to non-sub-pixels of an image to be displayed, generates at least two sub-images in the SPR pixel format, and sends the at least two sub-images to the at least two display driving circuits, and the method comprises the following steps:

the main controller renders pixel data in an SPR pixel format according to the non-sub-pixels of the image to be displayed, generates a third sub-image and a fourth sub-image in the SPR pixel format, sends the third sub-image to the first display driving circuit, and sends the fourth sub-image to the second display driving circuit;

each of the at least two display driving circuits receives one sub-image of the at least two sub-images from the main controller and drives the display screen to display a part of the image to be displayed in an SPR manner, including:

the first display driving circuit drives the display screen to display the third sub-image in the SPR mode;

and the second display driving circuit drives the display screen to display the fourth sub-image in the SPR mode.

13. A computer-readable storage medium, in which a computer program is stored which, when executed on a computer, causes the computer to carry out the method according to any one of claims 7-12.

14. Circuitry, comprising at least one processor configured to:

splitting an image to be displayed into at least two sub-images in a non-SPR pixel format, wherein each sub-image and an adjacent sub-image comprise at least one column of overlapped image pixels;

and sending the at least two sub-images to at least two display driving circuits, so that the at least two display driving circuits drive the display screen to display the image to be displayed in an SPR mode according to the at least two sub-images in the non-SPR pixel format.

15. The circuitry of claim 14, wherein the processor is specifically configured to:

splitting the image to be displayed into a first sub-image and a second sub-image in a non-SPR pixel format, wherein the first sub-image and the second sub-image comprise at least one column of overlapped image pixels;

sending the first sub-image to a first display driving circuit, so that the first display driving circuit drives the display screen to display a part of the image to be displayed in the SPR mode according to the pixel data of the non-SPR pixel format of the first sub-image;

and sending the second sub-image to a second display driving circuit, so that the second display driving circuit drives the display screen to display another part of the image to be displayed in the SPR mode according to the pixel data of the non-SPR pixel format of the second sub-image.

16. The circuitry of claim 15, wherein the first sub-image comprises a range of columns of image pixels [1, M + N ]₁]The second sub-image comprises image pixels with a column range of [ M-N₂,Z]，

17. The circuitry of claim 16, wherein N is₁＝N₂。

18. Circuitry, comprising at least one processor configured to:

generating at least two sub-images in an SPR pixel format according to pixel data in a non-SPR pixel format of an image to be displayed;

and sending the at least two sub-images to at least two display driving circuits, so that the at least two display driving circuits drive the display screen to display a part of the image to be displayed in an SPR mode according to the pixel data of the SPR pixel format of each sub-image in the at least two sub-images.

19. The circuitry of claim 18, wherein the processor is specifically configured to:

generating a third sub-image and a fourth sub-image in the SPR pixel format according to the pixel data in the non-SPR pixel format of the image to be displayed;

sending the third sub-image to a first display driving circuit, so that the first display driving circuit drives the display screen to display the third sub-image in an SPR mode according to pixel data of an SPR pixel format of the third sub-image;

and sending the fourth sub-image to a second display driving circuit, so that the second display driving circuit drives the display screen to display the fourth sub-image in the SPR mode according to the pixel data of the SPR pixel format of the fourth sub-image.