CN111601427A

CN111601427A - LED driving chip and LED driving system

Info

Publication number: CN111601427A
Application number: CN202010608366.2A
Authority: CN
Inventors: 林斌斌; 黄梅芳
Original assignee: Shenzhen Jueming Technology Co ltd
Current assignee: Shenzhen Jueming Technology Co ltd
Priority date: 2020-06-29
Filing date: 2020-06-29
Publication date: 2020-08-28

Abstract

The embodiment of the invention provides an LED driving chip and an LED driving system. The LED driving chip includes: the code rate detection module is used for detecting code rate parameters corresponding to display data input to the LED driving chip of the current stage by the previous stage element; the data buffer module is used for buffering the display data input to the current-level LED driving chip by the previous-level element; the data encoding and decoding module is used for receiving the code rate parameter sent by the code rate detection module, extracting the display data from the data buffering module, and decoding the display data according to the code rate parameter to obtain decoded display data; and the display output module is used for controlling the LED lamp to display according to the decoded display data so as to achieve the effect of dynamically decoding the display data.

Description

LED driving chip and LED driving system

Technical Field

The embodiment of the invention relates to the technical field of Light Emitting Diodes (LEDs), in particular to an LED driving chip and an LED driving system.

Background

With the rapid development of LEDs, more and more kinds of LED driving chips are coming up.

At present, a commonly used controller decodes a video to obtain display data, and then sends the display data to an LED driving chip for display at a fixed code rate of 800 KHz. The LED driving chip is controlled to send display data to the LED driving chip for display at a fixed code rate, so that the decoding mode of the LED driving chip is also fixed.

However, controllers for transmitting display data with different code rates adapted according to video images have appeared, and the decoding manner fixed by the conventional LED driving chip has not been satisfactory for decoding display data according to dynamic code rates, so that there is an urgent need for an LED driving chip capable of dynamically decoding display data.

Disclosure of Invention

The embodiment of the invention provides an LED driving chip and an LED driving system, which can realize the effect of dynamically decoding display data.

In a first aspect, an embodiment of the present invention provides an LED driving chip, including:

the code rate detection module is used for detecting code rate parameters corresponding to display data input to the LED driving chip of the current stage by the previous stage element;

the data buffer module is used for buffering the display data input to the current-level LED driving chip by the previous-level element;

the data encoding and decoding module is used for receiving the code rate parameter sent by the code rate detection module, extracting the display data from the data buffering module, and decoding the display data according to the code rate parameter to obtain decoded display data;

and the display output module is used for controlling the LED lamp to display according to the decoded display data.

Optionally, the method further includes:

and the filtering module is arranged in front of the code rate detection module and the data buffering module and is used for filtering the display data and sending the filtered display data to the code rate detection module and the data buffering module.

Optionally, the filtering module is configured to filter out noise and repair a waveform interfered by the noise, where the noise includes at least one of complex noise and spur noise.

Optionally, the display output module is a PWM display output module, and the PWM display output module is configured to convert the decoded display data into a PWM signal to control the LED lamp to display.

Optionally, the display data is one frame of image data of a video to be displayed.

Optionally, the LED driver chip is connected in series between a previous element and a next LED driver chip, the display data includes current-level display data and display data of each subsequent LED driver chip, and the data encoding and decoding module is specifically configured to extract the current-level display data from the display data, decode the current-level display data according to the code rate parameter, and send the decoded current-level display data to the display output module.

Optionally, the data encoding module is further configured to send the display data of each subsequent LED driving chip to the next LED driving chip according to the code rate parameter.

Optionally, the data encoding and decoding module is specifically configured to determine a decoding threshold associated with the code rate parameter, and decode the display data according to the decoding threshold.

Optionally, the decoding threshold is 1/(a preset coefficient rate parameter), where the preset coefficient is greater than 1;

if the display data is high-level data which is larger than the decoding threshold, the logic of the display data is 1;

and if the display data is high-level data smaller than the decoding threshold, the logic of the display data is 0.

In a second aspect, an embodiment of the present invention provides an LED driving system, including a controller, where the controller is configured to send display data according to the code rate parameter; the LED driving system further comprises n LED driving chips according to any one embodiment of the invention, the n LED driving chips are connected in series to form a cascade driving circuit, and the input end of the first-stage LED driving chip is connected with the output end of the controller.

The LED driving chip comprises a code rate detection module, a code rate detection module and a control module, wherein the code rate detection module is used for detecting a code rate parameter corresponding to display data input to the LED driving chip of the current level by a previous level element; the data buffer module is used for buffering the display data input to the current-level LED driving chip by the previous-level element; the data encoding and decoding module is used for receiving the code rate parameter sent by the code rate detection module, extracting the display data from the data buffering module, and decoding the display data according to the code rate parameter to obtain decoded display data; and the display output module is used for controlling the LED lamp to display according to the decoded display data, so that the problem that the decoding mode fixed by the common LED driving chip cannot meet the requirement of decoding the display data according to the dynamic code rate is solved, and the effect of dynamically decoding the display data is realized.

Drawings

Fig. 1 is a schematic structural diagram of an LED driving chip according to an embodiment of the present invention;

FIG. 2 is a diagram of a clock signal according to an embodiment of the present invention;

fig. 3 is a schematic structural diagram of a cascade of 3 LED driving chips according to an embodiment of the present invention;

fig. 4 is a schematic structural diagram of another LED driving chip according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of an LED driving system according to an embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Wherein the terms "first position" and "second position" are two different positions.

In the description of the present invention, it should be noted that unless otherwise explicitly stated or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection or a removable connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.

Fig. 1 is a schematic structural diagram of an LED driving chip according to an embodiment of the present invention. As shown in fig. 1, an embodiment of the invention provides an LED driving chip 100, which includes a rate detection module 110, a data buffering module 120, a data encoding/decoding module 130, and a display output module 140. The LED driving chip 100 of this embodiment is configured to perform adaptive decoding according to a code rate parameter corresponding to the received display data. Wherein:

the code rate detecting module 110 is configured to detect a code rate parameter corresponding to display data input to the current LED driving chip 100 by a previous device;

the data buffer module 120 is configured to buffer the display data input to the current-stage LED driving chip 100 by the previous-stage element;

the data encoding and decoding module 130 is configured to receive the code rate parameter sent by the code rate detecting module 110, extract the display data from the data buffering module 120, and decode the display data according to the code rate parameter to obtain decoded display data;

the display output module 140 is configured to control the LED lamp to display according to the decoded display data.

The code rate parameter is a specific code rate reference value, for example, the code rate parameter is 800KHz (hertz) or 1.6MHz, and the like, and is not limited herein specifically, and is determined according to the code rate of the previous-stage element for sending the display data. The data transmission of the present embodiment may be controlled by a clock signal. Optionally, the display output module 140 may be a DC display output module 140 in a DC dimming manner, and may also be a PWM display output module 140, which is not limited herein. DC dimming is to change the brightness of the screen by increasing or decreasing the power of the circuit of the screen panel, and since the power is equal to the voltage and the current, the brightness of the screen can be changed by only changing the voltage or the current. Taking the PWM display output module 140 as an example, the PWM display output module 140 outputs the PWM modulation format to the LED lamp for displaying, and converts the decoded display data into a PWM signal to control the LED lamp to display.

Optionally, the display data is one frame of image data of the video to be displayed, that is, the n LED driving chips 100 control the LED lamp to display one frame of image at a time.

In this embodiment, specifically, the previous-stage element sends the display data to the current-stage LED driving chip 100 in a dynamic code rate manner, and when the current-stage LED driving chip 100 receives the display data, the code rate detection module 110 detects a code rate parameter corresponding to the display data, and the data buffer module 120 buffers the display data. After the detection of the code rate detection module 110 is completed, the data encoding and decoding module 130 extracts the display data from the data buffering module 120, decodes the display data according to the code rate parameter, and sends the decoded display data to the display output module 140, so that the display output module 140 can control the LED lamp to display according to the decoded display data.

For example, a video file of a dynamic motion image has a first half with a frame rate of 60 and a second half with a frame rate of almost still picture of 10. Then, a common controller decodes the video and sends the decoded video to the LED driving chips 100 at a fixed rate of 800KHz for display, and each LED driving chip 100 needs to acquire 24-bit data for calculation, and when 1080 chips are cascaded, high-definition display can be realized, and the frame rate is 1S/(1080 × 24 × 1.25US) ═ 30.86 frames. The controller may send the display data with different code rates according to the requirement of the image display, in this embodiment, when the code rate detection module 110 detects that the display data input from the upper-level element to the current-level LED driving chip 100 is a dynamic image, the display data is sent to the lower-level LED driving chip 100 with the first code rate; when the code rate detection module 110 detects that the display data input from the previous-stage element to the current-stage LED driving chip 100 is a static picture, the display data is sent to the next-stage LED driving chip 100 at the second code rate; wherein the first code rate is greater than the second code rate. Specifically, for example, when the display data is a high dynamic picture, the display data is sent at a code rate of 1.6MHz, and when the display data is a static or nearly static picture, the display data is sent at a code rate of 266 KHz. In addition, the controller sends display data in a dynamic code rate mode, the LED driving chip 100 performs adaptive decoding, a high dynamic picture adopts a high code rate to transmit a larger data volume, a high frame rate picture is displayed, and a static or slow moving picture adopts a low code rate to transmit, so that power consumption is saved.

It should be noted that the display data sent by the upper-level component is sent in the form of a return-to-zero code. The return-to-zero code is a code where two digital level signals of different duty cycles represent 0 and 1. The data codec module 130 converts the return-to-zero code into a general binary code. The data codec module 130 encodes the display data, and essentially converts the return-to-zero-code-characterized data signal sent from the previous stage element into a common binary-code-characterized data signal. Specifically, in a time period for acquiring data, the high level time > the low level time is binary code 1, and the low level time > the high level time is binary code 1. Optionally, when the duration of the low level is greater than the preset time, the signal is considered as a RESET synchronization signal RESET.

In an embodiment, the data encoding and decoding module 130 is specifically configured to determine a decoding threshold associated with the code rate parameter, and decode the display data according to the decoding threshold.

Specifically, the decoding threshold refers to a threshold for decoding the display data, and is associated with the code rate parameter. The decoding threshold is 1/(the preset coefficient rate parameter), wherein the preset coefficient is greater than 1, that is, 1/the preset coefficient is less than 1. For example, the 1/preset coefficient may be 1/2, 1/3 or the like which is close to 1/2, for example, a number which is not more than 1/6 different from 1/2, or the like, and may be set as needed, and is not particularly limited herein. Preferably, the decoding threshold is 1/(2 × rate parameter). Illustratively, when the code rate parameter is 1Mbps, the period is 1us (microseconds), the preset coefficient is 2, the decoding threshold is 500ns (nanoseconds), and when the high level time of the data signal of the display data is 250ns less than 500ns in one time period, the binary code is 0; when the high level time is 750ns and is more than 500ns, the binary code is 1.

In one embodiment, the number of the data codec modules 130 is multiple, wherein each of the data codec modules 130 is configured to receive input data input by the upper level element and decode the input data;

the display output module 140 is electrically connected to the plurality of data encoding and decoding modules 130 in sequence, and the display output module 140 is configured to receive the decoded display data sent by the data encoding and decoding modules 130 when the input data is display data, so as to control the LED lamp to display according to the decoded display data.

In this embodiment, each data codec module 130 is configured to receive input data input by an upper component and decode the input data. The input data may be display data, configuration data, other data, and the like, and is not limited in particular here. The display data is used for controlling the LED lamp to display, and the configuration data is used for configuring parameters of the LED driving chip 100, such as the number of operations performed by the configuration data codec module 130. When the input data is display data, the display output module 140 receives the decoded display data to control the LEDs to display. The number of the data codec modules 130 can be increased according to the need, and is not limited in particular. The plurality of data codec modules 130 means that the number of the data codec modules 130 is at least two.

It can be understood that, regardless of whether the input data is configuration data or display data, when a part of the plurality of data codec modules 130 is damaged or abnormal, as long as one data codec module 130 is normal, the input data can be normally received and normally decoded, and then configured or displayed.

In an embodiment, optionally, the data coding and decoding modules 130 sequentially receive the display data sent by the upper level element according to a preset time interval; the display output module 140 sequentially receives the display data sent by the data encoding and decoding modules 130.

Optionally, the display data is a frame of image data of the video to be displayed, and the preset time interval is a ratio of a continuous display time of each frame of image data to the number of operations of the data encoding and decoding modules 130.

In the present embodiment, the upper-level element may be a controller, a previous-level LED driving chip 100 and/or a previous-n-level LED driving chip 100, etc., which is determined according to specific situations and is not particularly limited herein. It can be understood that, by sequentially receiving the display data sent by the upper-level element by the plurality of data codec modules 130, the display quality of the picture can be improved without improving the performance of the single data codec module 130.

For example, the video frame rate is 140, and assuming that the code stream of the highest-energy codec of the data codec module 130 is 800KHz, then 24 × 1.25US × 1080 is 32.4ms, that is, about 30 frame rates, that is, when 1080 LED driver chips 100 are cascaded, a single channel can only decode 30 frames of pictures, and the decoding of 30 frames by a conventional single channel chip is the limit. However, according to the technical solution of the present embodiment, when the number of the plurality of data codec modules 130 is 4, 4 × 30 frames (a single data codec module 130) is 140 frames. On the premise of not improving the performance of a single data encoding and decoding module 130, that is, on the premise of not improving the highest encoding and decoding code stream of the data encoding and decoding module 130 to 800KHz, the 4 data encoding and decoding modules 130 can improve the display quality of the picture, and the picture display with the frame rate of 140 is achieved.

It should be noted that, the data coding and decoding modules 130 sequentially receive the display data sent by the upper-level element according to a preset time interval, where the preset time interval is a ratio of a continuous display time of each frame of image data to a working quantity of the data coding and decoding modules 130. For example, assuming that each frame of image data is 32ms, there are 4 data encoding/decoding modules 130 and 4 data encoding/decoding modules 130 work, a first frame of display data is sent to a first data encoding/decoding module 130 first, after (32/4) equals 8ms, a second frame of display data is sent to a second data encoding/decoding module 130, after 8ms, a third frame of display data is sent to a third data encoding/decoding module 130, and after 8ms, a fourth frame of display data is sent to a fourth data encoding/decoding module 130. It can be understood that, when there are 4 data encoding and decoding modules 130, each frame of data is 32ms, when there are 1 data encoding and decoding module 130, a frame of data is refreshed every 32ms, and the frame rate is about 30, but when there are 4 data encoding and decoding modules 130, a frame of data can be refreshed every 8ms, so that the display frame rate of the video is improved. It is understood that when the number of operations of the data codec module 130 is 2, one frame of image data is transmitted at an interval 32/2 of 16 ms.

In one embodiment, optionally, the output end of the LED driving chip 100 is connected in series with the lower LED driving chip 100, and each of the data codec modules 130 is further configured to send output data to the lower LED driving chip 100, where the output data serves as input data of the lower LED driving chip 100.

Specifically, the plurality of LED driving chips 100 form a cascade circuit in series.

Referring to fig. 2, fig. 2 is a schematic diagram of a clock signal provided in this embodiment. As can be seen from fig. 2, data acquisition is started at the rising edge signal, and in an acquisition period, when the time of the high level is less than the decoding threshold, the signal is a binary code 0; when the time of the high level is greater than the decoding threshold, the binary code is 1.

Specifically, the present-stage LED driving chip 100 receives the display data sent by the previous-stage element. The previous-stage element may be a controller, and may also be a previous-stage LED driving chip 100, which is not specifically limited herein and is determined according to actual conditions. For example, when the LED driving chip 100 of the current stage is directly connected to the controller for receiving the display data sent by the controller, the upper stage element is the controller; when n LED driving chips 100 are cascaded and the current stage LED driving chip 100 is not the first stage LED driving chip 100, the previous stage element is the previous stage LED driving chip 100.

Referring to fig. 3, fig. 3 is a schematic structural diagram of a cascade of 3 LED driving chips according to an embodiment of the present invention. As can be seen from fig. 3, if the current-stage LED driving chip 100 is the first-stage LED driving chip 100, the previous-stage element is the controller 200, and if the current-stage LED driving chip 100 is the second-stage LED driving chip 100, the previous-stage element is the first-stage LED driving chip 100. If the current-stage LED driving chip 100 is the third-stage LED driving chip 100, the previous-stage element is the second-stage LED driving chip 100.

In an embodiment, the LED driving chip 100 is connected in series between a previous element and a next LED driving chip 100, the display data includes current-level display data and display data of each subsequent LED driving chip 100, and the data encoding and decoding module 130 is specifically configured to extract the current-level display data from the display data, decode the current-level display data according to the code rate parameter, and send the decoded current-level display data to the display output module 140.

In the present embodiment, n LED driving chips 100 are connected in series to form a cascade circuit. Firstly, the display data of the whole cascade circuit is controlled and sent, the first-stage LED driving chip 100 extracts the current-stage display data, decodes the current-stage display data according to the code rate and then controls the LED lamp to display, the display data of each subsequent-stage LED driving chip 100 is sent to the second-stage LED driving chip 100, and the second-stage LED driving chip 100 repeatedly extracts the current-stage display data to decode until the last-stage LED driving chip 100 of the cascade circuit completes decoding and displaying.

Preferably, the data encoding module is further configured to send the display data of each subsequent LED driving chip 100 to the next LED driving chip 100 according to the code rate parameter.

Specifically, the data encoding module re-encodes the display data of each subsequent LED driving chip 100, and transmits the display data to the next LED driving chip 100 at the optimal adapted code rate.

Referring to fig. 4, fig. 4 is a schematic structural diagram of another LED driving chip provided in this embodiment. As can be seen from fig. 4, the LED driving chip 100 further includes a filtering module 150, wherein:

the filtering module 150 is disposed before the rate detection module 110 and the data buffering module 120, and configured to filter the display data, and send the filtered display data to the rate detection module 110 and the data buffering module 120.

It can be understood that the display data entering the present-stage LED driving chip 100 is a data signal, and if the display data exists in the morning, the detection of the code rate parameter corresponding to the display data by the code rate detecting module 110 is directly affected, so that the accurate detection of the code rate parameter by the filtering module 150 is very important. The display data is filtered by the filtering module 150, and the code rate detection module 110 detects the filtered display data, so that the detection result is more accurate.

Specifically, the filtering module 150 is configured to filter out noise, which includes at least one of complex noise and glitch noise, and repair a waveform interfered by the noise.

According to the technical scheme of the embodiment of the invention, the LED driving chip comprises a code rate detection module, a code rate detection module and a code rate control module, wherein the code rate detection module is used for detecting code rate parameters corresponding to display data input to the LED driving chip at the current level by an upper-level element; the data buffer module is used for buffering the display data input to the current-level LED driving chip by the previous-level element; the data encoding and decoding module is used for receiving the code rate parameter sent by the code rate detection module, extracting the display data from the data buffering module, and decoding the display data according to the code rate parameter to obtain decoded display data; and the display output module is used for controlling the LED lamp to display according to the decoded display data, decoding according to the code rate after detecting the code rate, and when the code rate is dynamic floating, the LED driving chip of the embodiment can also normally decode, so that the technical effect of dynamically decoding the display data is achieved. In addition, the LED driving chip carries out adaptive decoding, a high code rate can be adopted for high dynamic pictures to transmit larger data volume, high frame rate pictures are displayed, and low code rate transmission is adopted when static or slow motion pictures are displayed, so that the power consumption is saved.

Fig. 5 is a schematic structural diagram of an LED driving system according to an embodiment of the present invention. As shown in fig. 5, an embodiment of the present invention provides an LED driving system, which includes a controller 200 and n LED driving chips 100, where the n LED driving chips 100 are connected in series to form a cascade driving circuit, and an input end of a first-stage LED driving chip 100 is connected to an output end of the controller 200. Wherein:

the controller 200 is configured to send display data according to the code rate parameter;

each LED driving chip 100 includes a rate detection module 110, a data buffering module 120, a data encoding and decoding module 130, and a display output module 140.

In this embodiment, the controller 200 sends display data according to different image requirements of a video file with dynamic code rate parameters, and each LED driving chip 100 in the cascade driving circuit can adapt to decoding, so that a higher data amount can be transmitted when a high dynamic image adopts a high code rate, a high frame rate image is displayed, and a low code rate transmission is adopted when a static or slow moving image is displayed, thereby saving power consumption.

In this embodiment, specifically, the present stage LED driving chip 100 sends data to the next stage LED driving chip 100. It should be noted that the data encoding/decoding module 130 of the LED driving chip 100 sends the data to the next LED driving chip 100. Specifically, after the data is decoded, the data coding and decoding module 130 recodes the data required by the remaining LED driving chip 100 and sends the recoded data to the next LED driving chip 100, so that the remaining LED driving chip 100 can also receive the data normally.

In an embodiment, the LED driving chip 100 further includes a filtering module, which is disposed before the code rate detecting module and the data buffering module, and is configured to filter the display data and send the filtered display data to the code rate detecting module and the data buffering module. It should be noted that the data to be coded to the following LED driving chip 100 should be sent with appropriate 0 and 1 data signals on the premise that the 0 code and 1 code are as far away from the threshold as possible and are not filtered out by the appropriate glitch. For example, when the decoding threshold is 500ns, then code 0 is sent with a high time of 250ns in the middle and code 1 is sent with a high time of 750ns in the middle.

In addition, when data is transmitted from the previous LED driving chip 100 to the next LED driving chip 100 through the cascade line, due to a load of a transmission medium, a transmitted data signal is clipped, so that a low level time or a high level time of the data signal is narrowed, and if the clipping is too large, codes 0 and 1 may be considered as glitch noise to be filtered out or errors occur, such as 0 to 1, or 1 to 0, and thus the middle high level time needs to be adjusted. For error codes, the display screen can be caused to flash, and the playing effect is very poor. Specifically, when clipping is to clip a high level, the high level is narrowed and the low level is widened; when clipping is clipping low, it narrows the low level and widens the high level. The specific clipping method is related to the operation method, and the high level time and the low level time may be adjusted according to the type of clipping without being limited thereto.

Specifically, when the clipping is to clip the low level and the binary code is 0, the high level time is adjusted to make the high level time far away from the decoding threshold and the difference between the high level time and the decoding threshold is larger than the clipping amplitude; when the clipping is to clip the low level and the binary code is 1, adjusting the high level time to make the high level time close to the decoding threshold and the high level time larger than the decoding threshold; when clipping is to cut high level and the binary code is 0, adjusting the high level time to make the high level time close to the decoding threshold and the high level time smaller than the decoding threshold; when clipping is clipping high level and the binary code is 1, the high level time is adjusted to make the high level time far away from the decoding threshold and the difference between the high level time and the decoding threshold is larger than the clipping amplitude.

For example, when the decoding threshold is 500ns, a high time of 250ns is generally used as the data signal of code 0, and a high time of 750ns is used as the data signal of code 1. When the clipping is to lower the level and the coding is 0, the high level time can be adjusted to 150ns for transmission; when clipping is clipping low level and coding is 1, then the high level time can be adjusted to 650 ns; when clipping is clipping high level and coding is 0, the high level time can be adjusted to 350 ns; when clipping is clipping high and the code is 1, then the high time can be adjusted to 850 ns.

It is understood that a configuration data may be sent before transmitting the data to inform each LED driving chip 100 of the operation mode, so that the LED driving chip 100 re-encodes the data according to the clipping mode related to the operation mode and sends the data to the next LED driving chip 100.

In one embodiment, optionally, one end of each of the LED driving chips 100 is electrically connected to the positive electrode of the common power line;

the other end of each of the LED driving chips 100 is electrically connected to the cathode of the common power line;

wherein, the anode and the cathode of the common power line are respectively connected to the controller 200, and the controller 200 is configured to transmit data to each of the LED driving chips 100 at the anode of the common power line in the form of an initial carrier signal.

In the present embodiment, data is transmitted to each LED driving chip 100 in the form of an initial carrier signal at the positive electrode of the common power line, and each LED driving chip 100 may control the LED lamp to display or configure the operating state of the LED driving chip 100 according to the received data. It can be understood that, by transmitting data to each LED driving chip 100 in the form of an initial carrier signal at the positive electrode of the common power line, the complexity is lower, and even if one of the LED driving chips 100 is damaged, the transmission of the other LED driving chips 100 is not affected, thereby improving the stability of data transmission.

For example, when the LED driving circuit 100 transmits display data to display a picture, when one of the LED driving chips 100 is damaged, only the LED driving chip 100 cannot drive the LED lamp to display, and the other LED driving chips 100 can normally drive the LED lamp to display, and the failed LED driving chip 100 only turns off the LED lamp, and the failed LED driving chip can be quickly located to a dead spot.

It should be noted that the data of this embodiment may be configuration data and/or display data, that is, the data may be only the display data or the configuration data, or the display data and the configuration data may be sent together. Wherein the configuration data is used for configuring the operating state of the LED driving chip 100. Optionally, the configuration data may be used to configure one or more of gamma coefficient, current adjustment, and grayscale accuracy. The display data is used for driving the LED driving chip 100 to control the LED lamp to display. The n LED driving chips in the LED driving circuit 100 of the present embodiment are not cascaded.

In the present embodiment, each LED driving chip 100 in the LED driving circuit 100 is configured with an address in advance. It can be understood that the pre-configured address may be a fixed address that is initialized before the LED driver chips 100 leave the factory, and thus no cascade connection is required between the LED driver chips 100; in addition, the pre-configured address may not be initialized to a fixed address before shipping, and the LED driving chip 100 needs to perform address initialization by cascade connection.

According to the technical scheme of the embodiment of the invention, the LED driving system comprises a controller and n LED driving chips, wherein the controller is used for sending display data according to the code rate parameter, the n LED driving chips are connected in series to form a cascade driving circuit, the input end of the first-stage LED driving chip is connected with the output end of the controller, and each LED driving chip comprises a code rate detection module used for detecting the code rate parameter corresponding to the display data input to the current-stage LED driving chip by the previous-stage element; the data buffer module is used for buffering the display data input to the current-level LED driving chip by the previous-level element; the data encoding and decoding module is used for receiving the code rate parameter sent by the code rate detection module, extracting the display data from the data buffering module, and decoding the display data according to the code rate parameter to obtain decoded display data; and the display output module is used for controlling the LED lamp to display according to the decoded display data, decoding according to the code rate after detecting the code rate, and when the code rate is dynamic floating, the LED driving chip of the embodiment can also normally decode, so that the technical effect of dynamically decoding the display data is achieved. In addition, the controller sends display data according to different image requirements and different code rate parameters, the LED driving chip carries out adaptive decoding, a high dynamic image adopts a high code rate to transmit larger data volume, a high frame rate image is displayed, and a low code rate is adopted for transmission when the image is static or in slow motion, so that the power consumption is saved.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. An LED driving chip, comprising:

2. The LED driving chip according to claim 1, further comprising:

3. The LED driving chip of claim 2, wherein the filtering module is configured to filter out noise and repair waveforms disturbed by the noise, the noise comprising at least one of complex noise and glitch noise.

4. The LED driving chip according to claim 1, wherein the display output module is a PWM display output module, and the PWM display output module is configured to convert the decoded display data into a PWM signal to control the LED lamp to display.

5. The LED driving chip according to claim 1, wherein the display data is one frame image data of a video to be displayed.

6. The LED driving chip according to claim 1, wherein the LED driving chip is connected in series between a previous-stage element and a next-stage LED driving chip, the display data includes current-stage display data and display data of each subsequent-stage LED driving chip, and the data encoding and decoding module is specifically configured to extract the current-stage display data from the display data, decode the current-stage display data according to the code rate parameter, and send the decoded current-stage display data to the display output module.

7. The LED driver chip of claim 6, wherein the data encoding module is further configured to send the display data of each subsequent LED driver chip to the next LED driver chip according to the code rate parameter.

8. The LED driver chip of claim 1, wherein the data codec module is specifically configured to determine a decoding threshold associated with the code rate parameter, and decode the display data according to the decoding threshold.

9. The LED driving chip according to claim 8, wherein the decoding threshold is 1/(preset coefficient rate parameter), wherein the preset coefficient is greater than 1;

10. An LED driving system, comprising:

a controller for transmitting display data according to the code rate parameter;

the LED driving system further comprises n LED driving chips according to any one of claims 1 to 9, the n LED driving chips are connected in series to form a cascade driving circuit, and the input end of the first stage LED driving chip is connected with the output end of the controller.